Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
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Software Version and Target Device
Product Version: ISE:11.5 (WebPack) Target Family: spartan3a
OS Platform: NT Target Device: xc3s700an
Project ID (random number) 4704eb2fd85449d28d93ab8d4946ffa3.e94b0be598bf474ab3b2de6d3dbb7e17.2 Target Package: fgg484
Registration ID 0_0_456 Target Speed: -4
Date Generated Di 2. Nov 16:43:51 2010
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=9
  • 3-bit subtractor=2
  • 4-bit subtractor=2
  • 5-bit adder=1
  • 5-bit subtractor=1
  • 6-bit subtractor=2
  • 8-bit subtractor=1
Comparators=7
  • 17-bit comparator less=1
  • 5-bit comparator equal=1
  • 5-bit comparator greater=4
  • 5-bit comparator less=1
Xors=31
  • 1-bit xor2=31
FSMs=6 ROMs=6
  • 16x4-bit ROM=6
Registers=823
  • Flip-Flops=823
Multiplexers=3
  • 1-bit 16-to-1 multiplexer=2
  • 1-bit 32-to-1 multiplexer=1
Counters=19
  • 10-bit up counter=1
  • 16-bit down counter=1
  • 16-bit up counter=1
  • 3-bit down counter=6
  • 4-bit up counter=2
  • 5-bit down counter=1
  • 5-bit up counter=1
  • 6-bit up counter=2
  • 7-bit down counter=1
  • 8-bit down counter=3
MiscellaneousStatistics
  • AGG_BONDED_IO=157
  • AGG_IO=157
  • AGG_SLICE=332
  • NUM_4_INPUT_LUT=487
  • NUM_BONDED_DIFFMI_NDT=1
  • NUM_BONDED_DIFFMLR=3
  • NUM_BONDED_DIFFMTB=5
  • NUM_BONDED_DIFFSI_NDT=1
  • NUM_BONDED_DIFFSLR=3
  • NUM_BONDED_DIFFSTB=5
  • NUM_BONDED_IBUF=79
  • NUM_BONDED_IOB=21
  • NUM_BONDED_IOBLR=39
  • NUM_BUFGMUX=3
  • NUM_CYMUX=66
  • NUM_DCM=1
  • NUM_IOB_FF=20
  • NUM_LUT_RT=31
  • NUM_ODDR2_NONE=24
  • NUM_SLICEL=330
  • NUM_SLICEM=2
  • NUM_SLICE_FF=284
  • NUM_XOR=66
NetStatistics
  • NumNets_Active=856
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=276
  • NumNodesOfType_Active_CNTRLPIN=263
  • NumNodesOfType_Active_DOUBLE=1020
  • NumNodesOfType_Active_DUMMY=1571
  • NumNodesOfType_Active_DUMMYBANK=3
  • NumNodesOfType_Active_DUMMYESC=6
  • NumNodesOfType_Active_GLOBAL=92
  • NumNodesOfType_Active_HFULLHEX=6
  • NumNodesOfType_Active_HLONG=1
  • NumNodesOfType_Active_HUNIHEX=34
  • NumNodesOfType_Active_INPUT=1738
  • NumNodesOfType_Active_IOBOUTPUT=5
  • NumNodesOfType_Active_OMUX=662
  • NumNodesOfType_Active_OUTPUT=620
  • NumNodesOfType_Active_PREBXBY=475
  • NumNodesOfType_Active_VFULLHEX=52
  • NumNodesOfType_Active_VLONG=15
  • NumNodesOfType_Active_VUNIHEX=48
  • NumNodesOfType_Vcc_CNTRLPIN=27
  • NumNodesOfType_Vcc_INPUT=16
  • NumNodesOfType_Vcc_PREBXBY=14
  • NumNodesOfType_Vcc_VCCOUT=29
SiteStatistics
  • DIFFMI_NDT-DIFFMTB=1
  • DIFFSI_NDT-DIFFSTB=1
  • IBUF-DIFFMLR=17
  • IBUF-DIFFMTB=15
  • IBUF-DIFFSLR=18
  • IBUF-DIFFSTB=14
  • IOB-DIFFMLR=4
  • IOB-DIFFMTB=6
  • IOB-DIFFSLR=4
  • IOB-DIFFSTB=7
  • IOBLR-DIFFMLR=20
  • IOBLR-DIFFSLR=19
  • SLICEL-SLICEM=154
SiteSummary
  • BUFGMUX=3
  • BUFGMUX_GCLKMUX=3
  • BUFGMUX_GCLK_BUFFER=3
  • DCM=1
  • DCM_DCM=1
  • DIFFMI_NDT=1
  • DIFFMI_NDT_DELAY_ADJ_BBOX=1
  • DIFFMI_NDT_INBUF=1
  • DIFFMI_NDT_PAD=1
  • DIFFMLR=3
  • DIFFMLR_OFF1=3
  • DIFFMLR_OFF2=3
  • DIFFMLR_OFFDDRBLACKBOX=3
  • DIFFMLR_OUTBUF=3
  • DIFFMLR_PAD=3
  • DIFFMLR_TFF1=2
  • DIFFMTB=5
  • DIFFMTB_OUTBUF=5
  • DIFFMTB_PAD=5
  • DIFFSI_NDT=1
  • DIFFSI_NDT_PAD=1
  • DIFFSI_NDT_PADOUT_USED=1
  • DIFFSLR=3
  • DIFFSLR_OFF1=3
  • DIFFSLR_OFF2=3
  • DIFFSLR_OFFDDRBLACKBOX=3
  • DIFFSLR_OUTBUF=3
  • DIFFSLR_PAD=3
  • DIFFSLR_TFF1=2
  • DIFFSTB=5
  • DIFFSTB_DIFFO_IN_USED=5
  • DIFFSTB_OUTBUF=5
  • DIFFSTB_PAD=5
  • IBUF=79
  • IBUF_DELAY_ADJ_BBOX=79
  • IBUF_INBUF=79
  • IBUF_PAD=79
  • IOB=21
  • IOBLR=39
  • IOBLR_OFF1=38
  • IOBLR_OFF2=18
  • IOBLR_OFFDDRBLACKBOX=18
  • IOBLR_OUTBUF=39
  • IOBLR_PAD=39
  • IOBLR_TFF1=16
  • IOB_OUTBUF=21
  • IOB_PAD=21
  • SLICEL=330
  • SLICEL_C1VDD=19
  • SLICEL_C2VDD=18
  • SLICEL_CYMUXF=36
  • SLICEL_CYMUXG=30
  • SLICEL_F=244
  • SLICEL_F5MUX=23
  • SLICEL_F6MUX=3
  • SLICEL_FFX=141
  • SLICEL_FFY=143
  • SLICEL_G=239
  • SLICEL_GNDF=17
  • SLICEL_GNDG=12
  • SLICEL_XORF=33
  • SLICEL_XORG=33
  • SLICEM=2
  • SLICEM_F=2
  • SLICEM_F5MUX=2
  • SLICEM_F6MUX=2
  • SLICEM_G=2
 
Configuration Data
BUFGMUX
  • S=[S_INV:3] [S:0]
BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:3]
  • S=[S_INV:3] [S:0]
DCM
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:0] [PSINCDEC:1]
  • RST=[RST:1] [RST_INV:0]
DCM_DCM
  • CLKDV_DIVIDE=[2:1]
  • CLKOUT_PHASE_SHIFT=[NONE:1]
  • CLK_FEEDBACK=[1X:1]
  • DESKEW_ADJUST=[8:1]
  • DFS_FREQUENCY_MODE=[LOW:1]
  • DLL_FREQUENCY_MODE=[LOW:1]
  • DUTY_CYCLE_CORRECTION=[TRUE:1]
  • FACTORY_JF1=[0XC0:1]
  • FACTORY_JF2=[0X80:1]
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC_INV:0] [PSINCDEC:1]
  • RST=[RST:1] [RST_INV:0]
DIFFMI_NDT_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:1]
  • IBUF_DELAY_VALUE=[DLY0:1]
  • IFD_DELAY_VALUE=[DLY0:1]
  • SEL_IN=[SEL_IN:1] [SEL_IN_INV:0]
DIFFMI_NDT_PAD
  • IOATTRBOX=[LVDS_33:1]
DIFFMLR
  • O1=[O1_INV:2] [O1:1]
  • O2=[O2:3] [O2_INV:0]
  • OCE=[OCE:3] [OCE_INV:0]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:3]
  • OTCLK2=[OTCLK2_INV:3] [OTCLK2:0]
  • REV=[REV_INV:0] [REV:3]
  • SR=[SR:3] [SR_INV:0]
  • T1=[T1_INV:2] [T1:0]
DIFFMLR_OFF1
  • CE=[CE:3] [CE_INV:0]
  • CK=[CK:3] [CK_INV:0]
  • D=[D:1] [D_INV:2]
  • LATCH_OR_FF=[FF:3]
  • OFF1_INIT_ATTR=[INIT0:3]
  • OFF1_SR_ATTR=[SRLOW:3]
  • OFFATTRBOX=[SYNC:3]
  • REV=[REV_INV:0] [REV:3]
  • SR=[SR:3] [SR_INV:0]
DIFFMLR_OFF2
  • CE=[CE:3] [CE_INV:0]
  • CK=[CK:0] [CK_INV:3]
  • D=[D:3] [D_INV:0]
  • LATCH_OR_FF=[FF:3]
  • OFF2_INIT_ATTR=[INIT0:3]
  • OFF2_SR_ATTR=[SRLOW:3]
  • OFFATTRBOX=[SYNC:3]
  • REV=[REV_INV:0] [REV:3]
  • SR=[SR:3] [SR_INV:0]
DIFFMLR_OUTBUF
  • IN=[IN_INV:0] [IN:3]
  • SUSPEND=[3STATE:3]
  • TRI=[TRI_INV:0] [TRI:2]
DIFFMLR_PAD
  • IOATTRBOX=[DIFF_SSTL18_II:3]
DIFFMLR_TFF1
  • CK=[CK:2] [CK_INV:0]
  • D=[D:0] [D_INV:2]
  • LATCH_OR_FF=[FF:2]
  • TFF1_INIT_ATTR=[INIT0:2]
DIFFMTB
  • O1=[O1_INV:0] [O1:5]
DIFFMTB_OUTBUF
  • IN=[IN_INV:0] [IN:5]
  • SUSPEND=[3STATE:5]
DIFFMTB_PAD
  • IOATTRBOX=[LVDS_33:5]
DIFFSI_NDT_PAD
  • IOATTRBOX=[LVDS_33:1]
DIFFSLR
  • O1=[O1_INV:1] [O1:2]
  • O2=[O2:0] [O2_INV:3]
  • OCE=[OCE:3] [OCE_INV:0]
  • OTCLK1=[OTCLK1_INV:0] [OTCLK1:3]
  • OTCLK2=[OTCLK2_INV:3] [OTCLK2:0]
  • REV=[REV_INV:0] [REV:3]
  • SR=[SR:3] [SR_INV:0]
  • T1=[T1_INV:2] [T1:0]
DIFFSLR_OFF1
  • CE=[CE:3] [CE_INV:0]
  • CK=[CK:3] [CK_INV:0]
  • D=[D:2] [D_INV:1]
  • LATCH_OR_FF=[FF:3]
  • OFF1_INIT_ATTR=[INIT0:3]
  • OFF1_SR_ATTR=[SRLOW:3]
  • OFFATTRBOX=[SYNC:3]
  • REV=[REV_INV:0] [REV:3]
  • SR=[SR:3] [SR_INV:0]
DIFFSLR_OFF2
  • CE=[CE:3] [CE_INV:0]
  • CK=[CK:0] [CK_INV:3]
  • D=[D:0] [D_INV:3]
  • LATCH_OR_FF=[FF:3]
  • OFF2_INIT_ATTR=[INIT0:3]
  • OFF2_SR_ATTR=[SRLOW:3]
  • OFFATTRBOX=[SYNC:3]
  • REV=[REV_INV:0] [REV:3]
  • SR=[SR:3] [SR_INV:0]
DIFFSLR_OUTBUF
  • IN=[IN_INV:0] [IN:3]
  • SUSPEND=[3STATE:3]
  • TRI=[TRI_INV:0] [TRI:2]
DIFFSLR_PAD
  • IOATTRBOX=[DIFF_SSTL18_II:3]
DIFFSLR_TFF1
  • CK=[CK:2] [CK_INV:0]
  • D=[D:0] [D_INV:2]
  • LATCH_OR_FF=[FF:2]
  • TFF1_INIT_ATTR=[INIT0:2]
DIFFSTB_OUTBUF
  • SUSPEND=[3STATE:5]
DIFFSTB_PAD
  • IOATTRBOX=[LVDS_33:5]
IBUF_DELAY_ADJ_BBOX
  • DELAY_ADJ_ATTRBOX=[FIXED:79]
  • IBUF_DELAY_VALUE=[DLY0:79]
  • IFD_DELAY_VALUE=[DLY0:79]
  • SEL_IN=[SEL_IN:79] [SEL_IN_INV:0]
IBUF_PAD
  • IOATTRBOX=[LVCMOS33:79]
  • PULL=[PULLUP:2] [PULLDOWN:5]
IOB
  • O1=[O1_INV:0] [O1:21]
IOBLR
  • O1=[O1_INV:0] [O1:39]
  • O2=[O2:18] [O2_INV:0]
  • OCE=[OCE:18] [OCE_INV:0]
  • OTCLK1=[OTCLK1_INV:38] [OTCLK1:0]
  • OTCLK2=[OTCLK2_INV:0] [OTCLK2:18]
  • REV=[REV_INV:0] [REV:18]
  • SR=[SR:18] [SR_INV:0]
  • T1=[T1_INV:16] [T1:0]
IOBLR_OFF1
  • CE=[CE:18] [CE_INV:0]
  • CK=[CK:0] [CK_INV:38]
  • D=[D:38] [D_INV:0]
  • LATCH_OR_FF=[FF:38]
  • OFF1_INIT_ATTR=[INIT0:38]
  • OFF1_SR_ATTR=[SRLOW:18]
  • OFFATTRBOX=[SYNC:18]
  • REV=[REV_INV:0] [REV:18]
  • SR=[SR:18] [SR_INV:0]
IOBLR_OFF2
  • CE=[CE:18] [CE_INV:0]
  • CK=[CK:18] [CK_INV:0]
  • D=[D:18] [D_INV:0]
  • LATCH_OR_FF=[FF:18]
  • OFF2_INIT_ATTR=[INIT0:18]
  • OFF2_SR_ATTR=[SRLOW:18]
  • OFFATTRBOX=[SYNC:18]
  • REV=[REV_INV:0] [REV:18]
  • SR=[SR:18] [SR_INV:0]
IOBLR_OUTBUF
  • IN=[IN_INV:0] [IN:39]
  • SUSPEND=[3STATE:39]
  • TRI=[TRI_INV:0] [TRI:16]
IOBLR_PAD
  • IOATTRBOX=[SSTL18_II:39]
IOBLR_TFF1
  • CK=[CK:0] [CK_INV:16]
  • D=[D:0] [D_INV:16]
  • LATCH_OR_FF=[FF:16]
  • TFF1_INIT_ATTR=[INIT0:16]
IOB_OUTBUF
  • IN=[IN_INV:0] [IN:21]
  • SUSPEND=[3STATE:21]
IOB_PAD
  • DRIVEATTRBOX=[8:21]
  • IOATTRBOX=[LVCMOS33:21]
  • SLEW=[SLOW:21]
SLICEL
  • BX=[BX_INV:3] [BX:65]
  • BY=[BY:91] [BY_INV:5]
  • CE=[CE:81] [CE_INV:57]
  • CIN=[CIN_INV:0] [CIN:29]
  • CLK=[CLK:124] [CLK_INV:82]
  • SR=[SR:104] [SR_INV:0]
SLICEL_CYMUXF
  • 0=[0:36] [0_INV:0]
  • 1=[1_INV:0] [1:36]
SLICEL_CYMUXG
  • 0=[0:30] [0_INV:0]
SLICEL_F5MUX
  • S0=[S0:23] [S0_INV:0]
SLICEL_F6MUX
  • S0=[S0:3] [S0_INV:0]
SLICEL_FFX
  • CE=[CE:61] [CE_INV:51]
  • CK=[CK:95] [CK_INV:46]
  • D=[D:138] [D_INV:3]
  • FFX_INIT_ATTR=[INIT0:133] [INIT1:8]
  • FFX_SR_ATTR=[SRLOW:136] [SRHIGH:5]
  • LATCH_OR_FF=[FF:141]
  • REV=[REV_INV:0] [REV:13]
  • SR=[SR:58] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:83] [SYNC:58]
SLICEL_FFY
  • CE=[CE:70] [CE_INV:22]
  • CK=[CK:86] [CK_INV:57]
  • D=[D:138] [D_INV:5]
  • FFY_INIT_ATTR=[INIT0:132] [INIT1:11]
  • FFY_SR_ATTR=[SRLOW:136] [SRHIGH:7]
  • LATCH_OR_FF=[FF:143]
  • REV=[REV_INV:0] [REV:10]
  • SR=[SR:76] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:67] [SYNC:76]
SLICEL_XORF
  • 1=[1_INV:0] [1:33]
SLICEM
  • BX=[BX_INV:0] [BX:2]
  • BY=[BY:2] [BY_INV:0]
SLICEM_F
  • LUT_OR_MEM=[LUT:2]
SLICEM_F5MUX
  • S0=[S0:2] [S0_INV:0]
SLICEM_F6MUX
  • S0=[S0:2] [S0_INV:0]
SLICEM_G
  • LUT_OR_MEM=[LUT:2]
 
Pin Data
BUFGMUX
  • I0=3
  • O=3
  • S=3
BUFGMUX_GCLKMUX
  • I0=3
  • OUT=3
  • S=3
BUFGMUX_GCLK_BUFFER
  • IN=3
  • OUT=3
DCM
  • CLK0=1
  • CLK90=1
  • CLKFB=1
  • CLKIN=1
  • LOCKED=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
DCM_DCM
  • CLK0=1
  • CLK90=1
  • CLKFB=1
  • CLKIN=1
  • LOCKED=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
DIFFMI_NDT
  • DIFFI_IN=1
  • I=1
  • PAD=1
DIFFMI_NDT_DELAY_ADJ_BBOX
  • IBUF_OUT=1
  • SEL_IN=1
DIFFMI_NDT_INBUF
  • DIFFI_IN=1
  • OUT=1
  • PAD=1
DIFFMI_NDT_PAD
  • PAD=1
DIFFMLR
  • O1=3
  • O2=3
  • OCE=3
  • OTCLK1=3
  • OTCLK2=3
  • PAD=3
  • REV=3
  • SR=3
  • T1=2
DIFFMLR_OFF1
  • CE=3
  • CK=3
  • D=3
  • Q=3
  • REV=3
  • SR=3
DIFFMLR_OFF2
  • CE=3
  • CK=3
  • D=3
  • Q=3
  • REV=3
  • SR=3
DIFFMLR_OFFDDRBLACKBOX
  • OFF1=3
  • OFF2=3
  • OFFDDR=3
DIFFMLR_OUTBUF
  • IN=3
  • OUTP=3
  • TRI=2
DIFFMLR_PAD
  • PAD=3
DIFFMLR_TFF1
  • CK=2
  • D=2
  • Q=2
DIFFMTB
  • DIFFO_OUT=5
  • O1=5
  • PAD=5
DIFFMTB_OUTBUF
  • IN=5
  • OUTN=5
  • OUTP=5
DIFFMTB_PAD
  • PAD=5
DIFFSI_NDT
  • PAD=1
  • PADOUT=1
DIFFSI_NDT_PAD
  • PAD=1
DIFFSI_NDT_PADOUT_USED
  • 0=1
  • OUT=1
DIFFSLR
  • O1=3
  • O2=3
  • OCE=3
  • OTCLK1=3
  • OTCLK2=3
  • PAD=3
  • REV=3
  • SR=3
  • T1=2
DIFFSLR_OFF1
  • CE=3
  • CK=3
  • D=3
  • Q=3
  • REV=3
  • SR=3
DIFFSLR_OFF2
  • CE=3
  • CK=3
  • D=3
  • Q=3
  • REV=3
  • SR=3
DIFFSLR_OFFDDRBLACKBOX
  • OFF1=3
  • OFF2=3
  • OFFDDR=3
DIFFSLR_OUTBUF
  • IN=3
  • OUTP=3
  • TRI=2
DIFFSLR_PAD
  • PAD=3
DIFFSLR_TFF1
  • CK=2
  • D=2
  • Q=2
DIFFSTB
  • DIFFO_IN=5
  • PAD=5
DIFFSTB_DIFFO_IN_USED
  • 0=5
  • OUT=5
DIFFSTB_OUTBUF
  • DIFFO_IN=5
  • OUTP=5
DIFFSTB_PAD
  • PAD=5
IBUF
  • I=79
  • PAD=79
IBUF_DELAY_ADJ_BBOX
  • IBUF_OUT=79
  • SEL_IN=79
IBUF_INBUF
  • IN=79
  • OUT=79
IBUF_PAD
  • PAD=79
IOB
  • O1=21
  • PAD=21
IOBLR
  • O1=39
  • O2=18
  • OCE=18
  • OTCLK1=38
  • OTCLK2=18
  • PAD=39
  • REV=18
  • SR=18
  • T1=16
IOBLR_OFF1
  • CE=18
  • CK=38
  • D=38
  • Q=38
  • REV=18
  • SR=18
IOBLR_OFF2
  • CE=18
  • CK=18
  • D=18
  • Q=18
  • REV=18
  • SR=18
IOBLR_OFFDDRBLACKBOX
  • OFF1=18
  • OFF2=18
  • OFFDDR=18
IOBLR_OUTBUF
  • IN=39
  • OUT=39
  • TRI=16
IOBLR_PAD
  • PAD=39
IOBLR_TFF1
  • CK=16
  • D=16
  • Q=16
IOB_OUTBUF
  • IN=21
  • OUT=21
IOB_PAD
  • PAD=21
SLICEL
  • BX=68
  • BY=96
  • CE=138
  • CIN=29
  • CLK=206
  • COUT=30
  • F1=242
  • F2=206
  • F3=179
  • F4=150
  • F5=6
  • FX=1
  • FXINA=3
  • FXINB=3
  • G1=239
  • G2=205
  • G3=170
  • G4=121
  • SR=104
  • X=135
  • XQ=141
  • Y=147
  • YQ=143
SLICEL_C1VDD
  • 1=19
SLICEL_C2VDD
  • 1=18
SLICEL_CYMUXF
  • 0=36
  • 1=36
  • OUT=36
  • S0=36
SLICEL_CYMUXG
  • 0=30
  • 1=30
  • OUT=30
  • S0=30
SLICEL_F
  • A1=242
  • A2=206
  • A3=179
  • A4=150
  • D=244
SLICEL_F5MUX
  • F=23
  • G=23
  • OUT=23
  • S0=23
SLICEL_F6MUX
  • 0=3
  • 1=3
  • OUT=3
  • S0=3
SLICEL_FFX
  • CE=112
  • CK=141
  • D=141
  • Q=141
  • REV=13
  • SR=58
SLICEL_FFY
  • CE=92
  • CK=143
  • D=143
  • Q=143
  • REV=10
  • SR=76
SLICEL_G
  • A1=239
  • A2=205
  • A3=170
  • A4=121
  • D=239
SLICEL_GNDF
  • 0=17
SLICEL_GNDG
  • 0=12
SLICEL_XORF
  • 0=33
  • 1=33
  • O=33
SLICEL_XORG
  • 0=33
  • 1=33
  • O=33
SLICEM
  • BX=2
  • BY=2
  • F1=2
  • F2=2
  • F3=2
  • F5=2
  • FX=1
  • FXINA=2
  • FXINB=2
  • G1=2
  • G2=2
  • G3=2
  • Y=1
SLICEM_F
  • A1=2
  • A2=2
  • A3=2
  • D=2
SLICEM_F5MUX
  • F=2
  • G=2
  • OUT=2
  • S0=2
SLICEM_F6MUX
  • 0=2
  • 1=2
  • OUT=2
  • S0=2
SLICEM_G
  • A1=2
  • A2=2
  • A3=2
  • D=2
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700an-fgg484-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700an-fgg484-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700an-fgg484-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700an-fgg484-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700an-fgg484-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700an-fgg484-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700an-fgg484-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd ipcore_dir -nt timestamp -i -p xc3s700an-fgg484-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s700an-fgg484-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • fuse
 
Software Quality
Run Statistics
_impact 7 6 0 0 0 0 0
arwz 1 1 0 0 0 0 0
bitgen 8 8 0 0 0 0 0
map 21 13 0 0 0 0 0
netgen 2 2 0 0 0 0 0
ngcbuild 9 9 0 0 0 0 0
ngdbuild 209 208 0 0 0 0 0
par 14 8 6 0 0 0 0
trce 11 11 0 0 0 0 0
xbash 1 1 0 0 0 0 0
xps 1 1 0 0 0 0 0
xst 242 242 0 0 0 0 0
 
Help Statistics
Search words with results
generate ( 1 )
Help files
/doc/usenglish/isehelp/ise_c_overview.htm ( 1 ) /doc/usenglish/isehelp/ite_c_overview.htm ( 1 )
/doc/usenglish/isehelp/pim_p_addingfiles_promdevices.htm ( 1 ) /doc/usenglish/isehelp/pn_db_nsw_select_ip.htm ( 1 )
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=ISim (VHDL/Verilog)
PROP_Top_Level_Module_Type=HDL PROP_PreferredLanguage=VHDL
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_COREGEN=1 FILE_COREGENISE=1
FILE_UCF=1 FILE_VHDL=6
PROP_DevDevice=xc3s700an PROP_DevFamily=Spartan3A and Spartan3AN
PROP_DevSpeed=-4 PROP_FitterReportFormat=HTML
PROP_ISimsUseCustomWaveConfigFile_behav=true PROP_ISimsUseCustomWaveConfigFilename_behav=changed
PROP_PreferredLanguage=VHDL PROP_Simulator=ISim (VHDL/Verilog)
PROP_UserConstraintEditorPreference=Constraints Editor PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No Project duration(days)=9
 
Core Statistics
Core Type=mig_v3_3
bank_address=2 cke_width=1 clk_width=1 column_address=10
data_mask=1 data_width=16 ext_load_mode_register=0000000000000 interface_type=DDR2_SDRAM
language=VHDL load_mode_register=0010100110010 mask_enable=1 memory_width=8
no_of_controllers=1 no_of_cs=1 registered=0 row_address=13
synthesis_tool=XST
 
 
ISim Statistics
Xilinx HDL Libraries Used=unisim
Fuse Resource Usage=3915 ms, 134008 KB