SetupInt: sei ; Bit 7 - I: Global Interrupt Enable, wird beim eintritt in die interruptroutine gecleart und RETI wieder gesetzt sbx TIMSK, OCIE1A ; Bit 4 - OCE1A: Timer/Counter1 Output CompareA Match Interrupt Enable ldi XH, 0x07 ; initialize compare value : 2000 2.048 MHz / 1024 /2000 = 1 Hz ! ----------- 2000 oder 1999 ?!?! ldi XL, 0xD0 out OCR1AL, XH ; Timer/Counter1 - Output Compare Register A Low Byte out OCR1AH, XL ; Timer/Counter1 - Output Compare Register A High Byte ; initialize prescaler ; Timer/Counter1 Control Register B - TCCR1B 1 0 1 -> CK / 1024 sbx TCCR1B, CS12 ; bit 2 cbx TCCR1B, CS11 ; bit 1 sbx TCCR1B, CS10 ; bit 0 sbx TCCR1B, CTC1 ; Bit 3 - CTC1: Clear Timer/Counter1 on Compare Match clr XL out TCNT1H, XL ; clear out TCNT1L, XL ; clear ret