00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 29. November 2010 00005 * $Revision: V1.0.3 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_biquad_cascade_df1_32x64_init_q31.c 00009 * 00010 * Description: High precision Q31 Biquad cascade filter initialization function. 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3 00013 * 00014 * Version 1.0.3 2010/11/29 00015 * Re-organized the CMSIS folders and updated documentation. 00016 * 00017 * Version 1.0.2 2010/11/11 00018 * Documentation updated. 00019 * 00020 * Version 1.0.1 2010/10/05 00021 * Production release and review comments incorporated. 00022 * 00023 * Version 1.0.0 2010/09/20 00024 * Production release and review comments incorporated. 00025 * 00026 * Version 0.0.7 2010/06/10 00027 * Misra-C changes done 00028 * -------------------------------------------------------------------- */ 00029 00030 #include "arm_math.h" 00031 00074 void arm_biquad_cas_df1_32x64_init_q31( 00075 arm_biquad_cas_df1_32x64_ins_q31 * S, 00076 uint8_t numStages, 00077 q31_t * pCoeffs, 00078 q63_t * pState, 00079 uint8_t postShift) 00080 { 00081 /* Assign filter stages */ 00082 S->numStages = numStages; 00083 00084 /* Assign postShift to be applied to the output */ 00085 S->postShift = postShift; 00086 00087 /* Assign coefficient pointer */ 00088 S->pCoeffs = pCoeffs; 00089 00090 /* Clear state buffer and size is always 4 * numStages */ 00091 memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q63_t)); 00092 00093 /* Assign state pointer */ 00094 S->pState = pState; 00095 } 00096