Name SPI_IO.PLD; Partno 1; Date 15.10.98; Revision 01; Designer Dipl.-Ing. P.Dannegger; Company None; Assembly None; Location None; Device v750; /****************************************************************/ /* */ /* SPI-IO-Expander */ /* */ /****************************************************************/ /** Inputs **/ Pin [1..8] = [IN0..7]; /* 8 Input */ Pin 9 = CLK; /* SPI Signals */ Pin 10 = STB; Pin 13 = DIN; /** Outputs **/ Pin [16..23] = [OUT0..7]; /* 8 Output */ Pin 14 = DOUT; /* Internal Signals */ Pin [25..32] = [SRG0..7]; Pin 33 = SHIFT; /** Logic Equations **/ [SRG0..7, DOUT, OUT0..7, SHIFT].sp = 'b'0; [SRG0..7, DOUT, OUT0..7].ar = STB & CLK; SRG0.ck = !CLK; SRG0.d = DIN; [SRG1..7, DOUT, SHIFT].ck = CLK; [SRG1..7, DOUT].d = SHIFT & [SRG0..7] /* shift in/out */ # !SHIFT & [IN0..7]; /* load from inputs */ DOUT.oe = SHIFT & STB; /* active during shift */ SHIFT.d = 'b'1; /* 1.Clock enable shift */ SHIFT.ar = STB; /* STB enable load */ [OUT0..7].ck = STB; [OUT0..7].d = [SRG0..7]; /* store to outputs */