library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity SPI is
    Port ( DAC_CS : out  STD_LOGIC;
           SPI_MOSI : out  STD_LOGIC;
           SPI_MISO : in  STD_LOGIC;
           SPI_SCK : out  STD_LOGIC;
           DAC_CLR : out  STD_LOGIC;
           Takt : in  STD_LOGIC;
           reset : in  STD_LOGIC;
			  s1 : in STD_LOGIC;	
			  LED : out STD_LOGIC;
			  c7 : out STD_LOGIC;
			  f8 : out STD_LOGIC;
			  d7 : out STD_LOGIC);
end SPI;

architecture behavioral of SPI is
----------------------------------------------------------------------------------
COMPONENT dcm2 is
	PORT(
		CLKIN_IN : IN std_logic;
		RST_IN : IN std_logic;          
		CLKFX_OUT : OUT std_logic;
		CLKIN_IBUFG_OUT : OUT std_logic;
		CLK0_OUT : OUT std_logic;
		LOCKED_OUT : OUT std_logic
		);
	END COMPONENT;
----------------------------------------------------------------------------------
component prellen is
	port  (clk : in STD_LOGIC;
			 reset : in  STD_LOGIC;
			 s1 : in STD_LOGIC;
			 s1_entprellt : out STD_LOGIC);
end component;
----------------------------------------------------------------------------------
component MOSI is
	port (CLK : in  STD_LOGIC;
			reset : in  STD_LOGIC;
			k_reset : in STD_LOGIC;
         s1_entprellt : in  STD_LOGIC;
			SPI_MOSI_VECTOR : out  STD_LOGIC_VECTOR (23 downto 0));
end component;
----------------------------------------------------------------------------------
signal s1_entprellt : STD_LOGIC;
signal SPI_MOSI_VECTOR : STD_LOGIC_VECTOR (23 downto 0);
signal n : STD_LOGIC_VECTOR ( 5 downto 0);
signal q : integer;
signal SPI_MOSI_Vergleich : STD_LOGIC;
signal clk,CLK0,locked : std_logic;
signal k_reset,zaehler_rest  : STD_LOGIC;
----------------------------------------------------------------------------------
begin 

Dcm_1: dcm2 PORT MAP(					-- DCM
		CLKIN_IN => Takt,
		RST_IN => reset,
		CLKFX_OUT => CLK,
		CLKIN_IBUFG_OUT => open,
		CLK0_OUT => CLK0,
		LOCKED_OUT => locked);
	
PRELLEN_1 : prellen port map (		-- Prellen des Schalters
	reset => reset,
	clk	=> clk,
	s1		=>	s1,
	s1_entprellt	=> s1_entprellt);
	
MOSI_1 : MOSI port map (				-- Command Address und Bit zuweisung
	k_reset => k_reset,					-- "0011 0000 1000 0000 0000 0001"
	s1_entprellt => s1_entprellt,		-- comand & adresse & bits & dont_care
   CLK	  => clk,
   reset   => reset,
   SPI_MOSI_VECTOR => SPI_MOSI_VECTOR);
----------------------------------------------------------------------------------
process 										-- Varibalen pin Zuweisung 
begin

DAC_CLR <= reset ;

SPI_MOSI <= SPI_MOSI_Vergleich;
d7 <= SPI_MOSI_Vergleich;				-- Oszi

c7 <= k_reset;								-- Oszi
DAC_CS <= k_reset;

f8 <= clk and not k_reset;				-- Oszi
SPI_SCK <= clk and not k_reset;
end process;
--------------------------------------------------------------------------------------
process (reset,clk)										--Ausgabe der einzelnen Bits
begin

if reset = '1' then
	LED <= '1';												--Erkennung bei reset
	n <= (others => '0');
	elsif falling_edge (clk) then
	LED <= '0';
	n <= n + 1;
		if zaehler_rest = '1' then						--Zaehler Rest						
		n <= "000001";
		end if ;
	if n = "000001" then q <=  23;					--Bit zuweisung und Ausgabe
	zaehler_rest <= '0';
	k_reset <= '1';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "000010" then q <=  22;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "000011" then q <=  21;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "000100" then q <=  20;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "000101" then q <=  19;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "000110" then q <=  18;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "000111" then q <=  17;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "001000" then q <=  16;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "001001" then q <=  15;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "001010" then q <=  14;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "001011" then q <=  13;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "001100" then q <=  12;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "001101" then q <=  11;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "001110" then q <=  10;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "001111" then q <=  9;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "010000" then q <=  8;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "010001" then q <=  7;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "010010" then q <=  6;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "010011" then q <=  5;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "010100" then q <=  4;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "010101" then q <=  3;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "010110" then q <=   2;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "010111" then q <=   1;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "011000" then q <=   0;
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n = "011001" then 
	k_reset <= '0';
	SPI_MOSI_Vergleich <= SPI_MOSI_VECTOR (q) ;
	elsif n >= "011010" then
	k_reset <= '1';
	elsif n = "111110" then								--Verzögerung um auf 10us zu kommen
	zaehler_rest <= '1';	
	k_reset <= '1';
	end if;
end if;
end process;
end behavioral;