;******************************************************** ;* * ;* RFM Transceiver Modul - Reciever * ;* * ;******************************************************** ;Clock Speed 12 MHz ; I/O Zuweisung clock equ P1.1 data_out equ P1.0 data_in equ P1.2 chip_select equ P1.3 ; Bytezuweisung input bit 00h firstb equ 21h secondb equ 22h ;Startadresse des Programmes org 0000h ajmp main ;Timer Interrupt org 00Bh mov TH0,#03Ch ;Timer 0 High-Byte laden mov TL0,#0ABh ;Timer 0 Low-Byte laden inc a reti ;Hauptprogramm org 0100h main: mov sp,#022h lcall init lcall delay lcall mod_init wait: lcall mod_init ;lcall dataout lcall delay lcall delay sjmp wait ; Initialisierung des Programm´s init: clr chip_select clr clock clr data_in clr a clr input mov r0,#0 ret ; Warten auf Bereitschaft des Moduls delay: push acc mov TH0,#03Ch ;Timer 0 High-Byte laden mov TL0,#0AAh ;Timer 0 Low-Byte laden mov TMOD,#01h ;Timer 0 16-bit setb TR0 ;Timer 0 starten mov IE,#082h ;Interrupt freigeben clr a schleife: cjne a,#4,schleife clr TR0 mov IE,#0h pop acc ret ; Initialisierung des Moduls mod_init: mov firstb,#080h ;Configuration Setting mov secondb,#0D7h lcall output mov firstb,#0C2h ;Data Filter Command mov secondb,#0ABh lcall output mov firstb,#0CAh ;FIFO and Reset-Mode Command mov secondb,#081h lcall output mov firstb,#0C4h ;AFC Command mov secondb,#057h lcall output mov firstb,#0E0h ;Wake-Up Timer Command mov secondb,#000h lcall output mov firstb,#0C8h ;Low Duty-Cycle Command mov secondb,#000h lcall output mov firstb,#0A6h ;Frequency Setting Command mov secondb,#020h lcall output mov firstb,#090h ;Power Setting Command mov secondb,#08Ch lcall output mov firstb,#0C6h ;Data Rate Command mov secondb,#091h lcall output mov firstb,#098h ;Tx Configuration Control Command mov secondb,#073h lcall output ret ;Datenausgabe output: push acc push 0 setb chip_select clr chip_select mov a,#080h mov r0,a round1: clr clock anl a,firstb clr data_out jz nset1 setb data_out nset1: setb clock mov a,r0 rr a mov r0,a cjne r0,#080h,round1 jnb input,round2 clr input pop 0 pop acc ret round2: clr clock anl a,secondb clr data_out jz nset2 setb data_out nset2: setb clock mov a,r0 rr a mov r0,a cjne r0,#080h,round2 pop 0 pop acc ret ;Datenausgabe dataout: jnb p3.7,dataout mov firstb,#082h ;Power Management Command mov secondb,#038h ;Tx Enabled lcall output mov firstb,#0B8h ;Tx Write Command mov secondb,#0AAh lcall output mov firstb,#0B8h ;Tx Write Command mov secondb,#0AAh lcall output mov firstb,#0B8h ;Tx Write Command mov secondb,#0AAh lcall output mov firstb,#0B8h ;Tx Write Command mov secondb,#02Dh lcall output mov firstb,#0B8h ;Tx Write Command mov secondb,#0D4h lcall output mov firstb,#0B8h ;Tx Write Command mov secondb,#0FFh lcall output mov firstb,#0B8h ;Tx Write Command mov secondb,#0FFh lcall output mov firstb,#0B8h ;Tx Write Command mov secondb,#0FFh lcall output lcall delay mov firstb,#082h ;Power Management Command mov secondb,#008h ;Tx Disabled lcall output ret end