Signal Name Total Product Terms Product Terms Location Power Mode Pin Number PinType Pin Use
timebase_I/clk_cnt<9> 15  18_1 18_2 18_3 18_4 18_5 1_1 1_2 1_3 1_4 1_5 2_1 2_2 2_3 2_4 2_5 MC1 STD   (b) (b)
sram_ce_l 0   MC2 STD 71 I/O O
timebase_I/clk_cnt<8> 14  3_1 3_2 3_3 3_4 4_1 4_2 4_3 4_4 4_5 5_1 5_2 5_3 5_4 5_5 MC3 STD   (b) (b)
(unused) 0   MC4     (b) (b)
(unused) 0   MC5     (b) (b)
(unused) 0   MC6     (b) (b)
(unused) 0   MC7     (b) (b)
sram_clk 24  10_1 10_2 10_3 10_4 6_1 6_2 6_3 6_4 6_5 7_1 7_2 7_3 7_4 7_5 8_1 8_2 8_3 8_4 8_5 9_1 9_2 9_3 9_4 9_5 MC8 STD 74 I/O O
(unused) 0   MC9     (b) (b)
(unused) 0   MC10     (b) (b)
sram_we_l 3  11_1 11_2 11_3 MC11 STD 75 I/O O
(unused) 0   MC12     (b)  
(unused) 0   MC13     (b)  
sram_oe_l 3  14_1 14_2 14_3 MC14 STD 76 I/O O
sram_adsc_l 0   MC15 STD 77 I/O O
timebase_I/clk_cnt<4> 13  15_1 15_2 15_3 15_4 15_5 16_1 16_2 16_3 16_4 16_5 17_3 17_4 17_5 MC16 STD   (b) (b)
sram_adr<8> 2  17_1 17_2 MC17 STD 78 I/O O
(unused) 0   MC18     (b) (b)

Signals Used By Logic in Function Block
  1. adr_cnt_en
  2. clk_falling_edge
  3. clk_in
  4. clk_rd
  5. clr
  6. eclk
  7. sram_adr<0>
  8. sram_adr<1>
  9. sram_adr<2>
  10. sram_adr<3>
  11. sram_adr<4>
  12. sram_adr<5>
  13. sram_adr<6>
  14. sram_adr<7>
  15. state_FFd1
  16. state_FFd2
  17. state_FFd3
  18. timebase_I/clk_2
  19. timebase_I/clk_5f<1>
  20. timebase_I/clk_5f<2>
  21. timebase_I/clk_cnt<0>
  22. timebase_I/clk_cnt<10>
  23. timebase_I/clk_cnt<11>
  24. timebase_I/clk_cnt<12>
  25. timebase_I/clk_cnt<13>
  26. timebase_I/clk_cnt<14>
  27. timebase_I/clk_cnt<15>
  28. timebase_I/clk_cnt<16>
  29. timebase_I/clk_cnt<17>
  30. timebase_I/clk_cnt<18>
  31. timebase_I/clk_cnt<1>
  32. timebase_I/clk_cnt<2>
  33. timebase_I/clk_cnt<3>
  34. timebase_I/clk_cnt<4>
  35. timebase_I/clk_cnt<5>
  36. timebase_I/clk_cnt<6>
  37. timebase_I/clk_cnt<7>
  38. timebase_I/clk_cnt<8>
  39. timebase_I/clk_cnt<9>
  40. timebase_I/sw_read_clk_f
  41. timebase_I/sw_read_clk_r
  42. tsel_reg<0>
  43. tsel_reg<1>
  44. tsel_reg<2>
  45. tsel_reg<3>
  46. tsel_reg<4>