FB1
FB2
FB3
FB4
FB5
FB6
FB7
FB8
FB9
FB10
FB11
FB12
FB13
FB14
FB15
FB16
Signal Name
Total Product Terms
Product Terms
Location
Power Mode
Pin Number
PinType
Pin Use
(unused)
0
MC1
(b)
(unused)
0
MC2
130
I/O
I
epp_I/d_rd_i_d
1
3_1
MC3
STD
131
I/O
I
epp_I/WR_l_i
1
4_1
MC4
STD
(b)
(b)
epp_I/RD_l_i
1
5_1
MC5
STD
132
I/O
I
epp_I/ALE_l_i
1
6_1
MC6
STD
(b)
(b)
$OpTx$$OpTx$FX_DC$187_INV$520
1
7_1
MC7
STD
(b)
(b)
timebase_I/sw_read_clk_r
2
8_1
8_2
MC8
STD
133
I/O
I
timebase_I/sw_read_clk_f
2
9_1
9_2
MC9
STD
(b)
(b)
timebase_I/clk_5f<2>
2
10_1
10_2
MC10
STD
134
I/O
I
timebase_I/clk_5f<0>
2
11_1
11_2
MC11
STD
(b)
(b)
epp_I/adr<3>
2
12_1
12_2
MC12
STD
(b)
(b)
epp_I/adr<2>
2
13_1
13_2
MC13
STD
(b)
(b)
epp_I/adr<1>
2
14_1
14_2
MC14
STD
(b)
(b)
$OpTx$trigcond_I/int_vtrig_comp<9>/trigcond_I/int_vtrig_comp<9>_D2_INV$532
2
15_1
15_2
MC15
STD
(b)
(b)
$OpTx$trigcond_I/int_vtrig_comp<8>/trigcond_I/int_vtrig_comp<8>_D2_INV$531
2
16_1
16_2
MC16
STD
(b)
(b)
$OpTx$trigcond_I/int_vtrig_comp<15>/trigcond_I/int_vtrig_comp<15>_D2_INV$525
2
17_1
17_2
MC17
STD
(b)
(b)
timebase_I/clk_5f<1>
3
18_1
18_2
18_3
MC18
STD
(b)
(b)
Signals Used By Logic in Function Block
dd<3>.PIN
dd<2>.PIN
dd<1>.PIN
channel<15>
channel<8>
channel<9>
clr
dale_l
done
drd_l
dwr_l
epp_I/ALE_l_i
epp_I/RD_l_i
epp_I/WR_l_i
epp_I/adr<0>
epp_I/adr<1>
mask_reg<15>
mask_reg<8>
mask_reg<9>
timebase_I/clk_5f<0>
timebase_I/clk_5f<1>
timebase_I/clk_5f<2>
value_reg<15>
value_reg<8>
value_reg<9>