Signal Name Total Product Terms Product Terms Location Power Mode Pin Number PinType Pin Use
(unused) 0   MC1     (b) (b)
(unused) 0   MC2   28 I/O I
(unused) 0   MC3     (b) (b)
(unused) 0   MC4     (b) (b)
timebase_I/clk_cnt<10> 12  3_1 3_2 3_3 3_4 3_5 4_1 4_2 4_3 4_4 4_5 5_1 5_2 MC5 STD   (b) (b)
timebase_I/clk_cnt<7> 13  5_3 5_4 5_5 6_1 6_2 6_3 6_4 6_5 7_1 7_2 7_3 7_4 7_5 MC6 STD   (b) (b)
(unused) 0   MC7     (b) (b)
(unused) 0   MC8     (b) (b)
(unused) 0   MC9     (b) (b)
clk_ob 24  10_1 10_2 10_3 10_4 10_5 11_1 11_2 11_3 11_4 11_5 12_1 12_2 12_3 12_4 8_1 8_2 8_3 8_4 8_5 9_1 9_2 9_3 9_4 9_5 MC10 STD 30 I/O/GCK1 GCK/O
(unused) 0   MC11     (b) (b)
(unused) 0   MC12   31 I/O (b)
(unused) 0   MC13     (b) (b)
clk_o 11  13_1 13_2 13_3 13_4 13_5 14_1 14_2 14_3 14_4 14_5 15_4 MC14 STD 32 I/O/GCK2 GCK/O
st<1> 3  15_1 15_2 15_3 MC15 STD 33 I/O O
(unused) 0   MC16     (b) (b)
timebase_I/clk_cnt<3> 12  16_1 16_2 16_3 16_4 16_5 17_1 17_2 17_3 17_4 17_5 18_4 18_5 MC17 STD   (b) (b)
timebase_I/clk_cnt<6> 11  18_1 18_2 18_3 1_1 1_2 1_3 1_4 1_5 2_1 2_2 2_3 MC18 STD   (b) (b)

Signals Used By Logic in Function Block
  1. clk_falling_edge
  2. clk_in
  3. clk_rd
  4. clr
  5. eclk
  6. state_FFd1
  7. state_FFd2
  8. state_FFd3
  9. timebase_I/clk_2
  10. timebase_I/clk_5f<1>
  11. timebase_I/clk_5f<2>
  12. timebase_I/clk_cnt<0>
  13. timebase_I/clk_cnt<10>
  14. timebase_I/clk_cnt<11>
  15. timebase_I/clk_cnt<12>
  16. timebase_I/clk_cnt<13>
  17. timebase_I/clk_cnt<14>
  18. timebase_I/clk_cnt<15>
  19. timebase_I/clk_cnt<16>
  20. timebase_I/clk_cnt<17>
  21. timebase_I/clk_cnt<18>
  22. timebase_I/clk_cnt<1>
  23. timebase_I/clk_cnt<2>
  24. timebase_I/clk_cnt<3>
  25. timebase_I/clk_cnt<4>
  26. timebase_I/clk_cnt<5>
  27. timebase_I/clk_cnt<6>
  28. timebase_I/clk_cnt<7>
  29. timebase_I/clk_cnt<8>
  30. timebase_I/clk_cnt<9>
  31. timebase_I/sw_read_clk_f
  32. timebase_I/sw_read_clk_r
  33. tsel_reg<0>
  34. tsel_reg<1>
  35. tsel_reg<2>
  36. tsel_reg<3>
  37. tsel_reg<4>