FB1
FB2
FB3
FB4
FB5
FB6
FB7
FB8
FB9
FB10
FB11
FB12
FB13
FB14
FB15
FB16
Signal Name
Total Product Terms
Product Terms
Location
Power Mode
Pin Number
PinType
Pin Use
(unused)
0
MC1
(b)
sram_adr<9>
2
2_1
2_2
MC2
STD
79
I/O
O
sram_adr<10>
2
3_1
3_2
MC3
STD
80
I/O
O
(unused)
0
MC4
(b)
(b)
(unused)
0
MC5
(b)
(b)
trigcond_I/int_trig_hit_reg
26
3_3
3_4
3_5
4_1
4_2
4_3
4_4
4_5
5_1
5_2
5_3
5_4
5_5
6_1
6_2
6_3
6_4
6_5
7_1
7_2
7_3
7_4
7_5
8_3
8_4
8_5
MC6
STD
(b)
(b)
(unused)
0
MC7
(b)
(b)
sram_adr<11>
2
8_1
8_2
MC8
STD
81
I/O
O
$OpTx$trigcond_I/int_vtrig_comp<14>/trigcond_I/int_vtrig_comp<14>_D2_INV$524
2
9_1
9_2
MC9
STD
(b)
(b)
sram_adr<12>
2
10_1
10_2
MC10
STD
82
I/O
O
sram_adr<13>
2
11_1
11_2
MC11
STD
83
I/O
O
sram_adr<14>
2
12_1
12_2
MC12
STD
85
I/O
O
$OpTx$trigcond_I/int_vtrig_comp<12>/trigcond_I/int_vtrig_comp<12>_D2_INV$523
2
13_1
13_2
MC13
STD
(b)
(b)
sram_adr<15>
2
14_1
14_2
MC14
STD
86
I/O
O
sram_adr<16>
2
15_1
15_2
MC15
STD
87
I/O
O
$OpTx$trigcond_I/int_vtrig_comp<11>/trigcond_I/int_vtrig_comp<11>_D2_INV$522
2
16_1
16_2
MC16
STD
(b)
(b)
sram_d<15>
2
17_1
17_2
MC17
STD
88
I/O
I/O
$OpTx$trigcond_I/int_vtrig_comp<10>/trigcond_I/int_vtrig_comp<10>_D2_INV$521
2
18_1
18_2
MC18
STD
(b)
(b)
Signals Used By Logic in Function Block
$OpTx$trigcond_I/int_vtrig_comp<15>/trigcond_I/int_vtrig_comp<15>_D2_INV$525
$OpTx$trigcond_I/int_vtrig_comp<2>/trigcond_I/int_vtrig_comp<2>_D2_INV$526
$OpTx$trigcond_I/int_vtrig_comp<3>/trigcond_I/int_vtrig_comp<3>_D2_INV$527
$OpTx$trigcond_I/int_vtrig_comp<4>/trigcond_I/int_vtrig_comp<4>_D2_INV$528
$OpTx$trigcond_I/int_vtrig_comp<5>/trigcond_I/int_vtrig_comp<5>_D2_INV$529
$OpTx$trigcond_I/int_vtrig_comp<6>/trigcond_I/int_vtrig_comp<6>_D2_INV$530
$OpTx$trigcond_I/int_vtrig_comp<8>/trigcond_I/int_vtrig_comp<8>_D2_INV$531
$OpTx$trigcond_I/int_vtrig_comp<9>/trigcond_I/int_vtrig_comp<9>_D2_INV$532
adr_cnt_en
channel<0>
channel<10>
channel<11>
channel<12>
channel<13>
channel<14>
channel<15>
channel<1>
channel<7>
clr
mask_reg<0>
mask_reg<10>
mask_reg<11>
mask_reg<12>
mask_reg<13>
mask_reg<14>
mask_reg<1>
mask_reg<7>
sram_adr<0>
sram_adr<10>
sram_adr<11>
sram_adr<12>
sram_adr<13>
sram_adr<14>
sram_adr<15>
sram_adr<1>
sram_adr<2>
sram_adr<3>
sram_adr<4>
sram_adr<5>
sram_adr<6>
sram_adr<7>
sram_adr<8>
sram_adr<9>
st<3>
trigcond_I/int_etrig_hit_reg
value_reg<0>
value_reg<10>
value_reg<11>
value_reg<12>
value_reg<13>
value_reg<14>
value_reg<1>
value_reg<7>