/* * ET028002 QVGA SPI Framebuffer Driver , 2008 Claude Schwarz iPLON GmbH * * heavily based on : * * linux/drivers/video/vfb.c -- Virtual frame buffer device * * * Copyright (C) 2002 James Simmons * * Copyright (C) 1997 Geert Uytterhoeven * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive for * more details. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* * RAM we reserve for the frame buffer. This defines the maximum screen * size * * The default can be overridden if the driver is compiled as a module */ #define VIDEOMEMSIZE (155648) static void *videomemory; static u_long videomemorysize = VIDEOMEMSIZE; module_param(videomemorysize, ulong, 0); #define ET028002_NAME "et028002" static int thread_id=0; static wait_queue_head_t wq; static DECLARE_COMPLETION( on_exit ); static int *kmalloc_area; struct et028002 { struct spi_device *spi; u8 *buffer; int power; u8 *rxbuff; }; struct et028002 *lcd; static int et028002_write_reg_async(struct et028002 *lcd, u8 reg, u8 val) { struct spi_message msg; struct spi_transfer index_xfer = { .len = 2, .cs_change = 1, }; struct spi_transfer value_xfer = { .len = 2, }; spi_message_init(&msg); /* register index */ lcd->buffer[0] = ET028002DMU_INDEX; lcd->buffer[1] = reg ; index_xfer.tx_buf = lcd->buffer; spi_message_add_tail(&index_xfer, &msg); /* register value */ lcd->buffer[2] = ET028002DMU_DATA; lcd->buffer[3] = val; value_xfer.tx_buf = lcd->buffer + 2; spi_message_add_tail(&value_xfer, &msg); return spi_sync(lcd->spi, &msg); } static int et028002_write_reg(struct et028002 *lcd, u8 reg, u8 val) { struct spi_message msg; struct spi_transfer index_xfer = { .len = 2, .cs_change = 1, }; struct spi_transfer value_xfer = { .len = 2, }; spi_message_init(&msg); /* register index */ lcd->buffer[0] = ET028002DMU_INDEX; lcd->buffer[1] = reg ; index_xfer.tx_buf = lcd->buffer; spi_message_add_tail(&index_xfer, &msg); /* register value */ lcd->buffer[2] = ET028002DMU_DATA; lcd->buffer[3] = val; value_xfer.tx_buf = lcd->buffer + 2; spi_message_add_tail(&value_xfer, &msg); return spi_sync(lcd->spi, &msg); } static int et028002_write_screen(void *data) { daemonize("kspiupdated"); allow_signal( SIGTERM ); thread_id = 0; struct spi_message msg; struct spi_transfer index_xfer_screen = { .len = 2, .cs_change = 1, }; struct spi_transfer value_xfer_screen1 = { .len = 65535, }; struct spi_transfer value_xfer_screen2 = { .len = 65535, }; struct spi_transfer value_xfer_screen3 = { .len = 22531, }; et028002_write_reg_async(lcd,COLUMN_ADDRESS_START_2,0>>8); et028002_write_reg_async(lcd,COLUMN_ADDRESS_START_1,0&0xFF); et028002_write_reg_async(lcd,COLUMN_ADDRESS_END_2,240>>8); et028002_write_reg_async(lcd,COLUMN_ADDRESS_END_1,240&0xFF); et028002_write_reg_async(lcd,ROW_ADDRESS_START_2,0>>8); et028002_write_reg_async(lcd,ROW_ADDRESS_START_1,0&0xFF); et028002_write_reg_async(lcd,ROW_ADDRESS_END_2,320>>8); et028002_write_reg_async(lcd,ROW_ADDRESS_END_1,320&0xFF); spi_message_init(&msg); while(true){ spinlock_t mr_lock = SPIN_LOCK_UNLOCKED; unsigned long flags; spin_lock_irqsave(&mr_lock,flags); memcpy (&lcd->buffer[5], videomemory , 153600); /*memcmp (&lcd->buffer[5], videomemory , 153600);*/ spin_unlock_irqrestore(&mr_lock, flags); /* register index */ lcd->buffer[0] = ET028002DMU_INDEX; lcd->buffer[1] = SRAM_WRITE_CONTROL ; index_xfer_screen.tx_buf = lcd->buffer; spi_message_add_tail(&index_xfer_screen, &msg); /* register value */ lcd->buffer[4] = ET028002DMU_DATA; value_xfer_screen1.tx_buf = lcd->buffer + 4 ; value_xfer_screen1.rx_buf = lcd->rxbuff; spi_message_add_tail(&value_xfer_screen1, &msg); value_xfer_screen2.tx_buf = lcd->buffer + 4 + 65535 ; value_xfer_screen2.rx_buf = lcd->rxbuff; spi_message_add_tail(&value_xfer_screen2, &msg); value_xfer_screen3.tx_buf = lcd->buffer + 4 + 131070; value_xfer_screen3.rx_buf = lcd->rxbuff; spi_message_add_tail(&value_xfer_screen3, &msg); spi_sync(lcd->spi, &msg); } return (0); } static int et028002_power_on(struct et028002 *lcd) { printk(KERN_ERR ET028002_NAME ": TFT HW Init !\n"); //Gamma setting et028002_write_reg(lcd,R1_CONTROL_1,0x94); et028002_write_reg(lcd,R1_CONTROL_2,0x41); et028002_write_reg(lcd,R1_CONTROL_3,0x00); et028002_write_reg(lcd,R1_CONTROL_4,0x33); et028002_write_reg(lcd,R1_CONTROL_5,0x23); et028002_write_reg(lcd,R1_CONTROL_6,0x45); et028002_write_reg(lcd,R1_CONTROL_7,0x44); et028002_write_reg(lcd,R1_CONTROL_8,0x77); et028002_write_reg(lcd,R1_CONTROL_9,0x12); et028002_write_reg(lcd,R1_CONTROL_10,0xCC); et028002_write_reg(lcd,R1_CONTROL_11,0x46); et028002_write_reg(lcd,R1_CONTROL_12,0x82); //General display settings and internal RGB interface et028002_write_reg(lcd,DISPLAY_MODE_CONTROL,0x06); et028002_write_reg(lcd,CYCLE_CONTROL_11,0x01); et028002_write_reg(lcd,CYCLE_CONTROL_12,0x01); et028002_write_reg(lcd,CYCLE_CONTROL_13,0xF0); et028002_write_reg(lcd,CYCLE_CONTROL_14,0x00); et028002_write_reg(lcd,CYCLE_CONTROL_15,0x38); et028002_write_reg(lcd,CYCLE_CONTROL_16,0x0F); et028002_write_reg(lcd,CYCLE_CONTROL_17,0xF0); et028002_write_reg(lcd,DISPLAY_CONTROL_2,0x02); et028002_write_reg(lcd,DISPLAY_CONTROL_3,0x02); et028002_write_reg(lcd,DISPLAY_CONTROL_4,0x02); et028002_write_reg(lcd,DISPLAY_CONTROL_5,0x02); et028002_write_reg(lcd,DISPLAY_CONTROL_6,0x02); et028002_write_reg(lcd,DISPLAY_CONTROL_7,0x02); et028002_write_reg(lcd,INTERNAL_USE_28,0x65); et028002_write_reg(lcd,DATA_CONTROL,0x00); et028002_write_reg(lcd,OSC_CONTROL_1,0x49); et028002_write_reg(lcd,OSC_CONTROL_3,0x08);/*08*/ //MCU interface setting et028002_write_reg(lcd,COLUMN_ADDRESS_START_2,0x00); et028002_write_reg(lcd,COLUMN_ADDRESS_START_1,0x00); et028002_write_reg(lcd,COLUMN_ADDRESS_END_2,0x00); et028002_write_reg(lcd,COLUMN_ADDRESS_END_1,0xEF); et028002_write_reg(lcd,ROW_ADDRESS_START_2,0x00); et028002_write_reg(lcd,ROW_ADDRESS_START_1,0x00); et028002_write_reg(lcd,ROW_ADDRESS_END_2,0x01); et028002_write_reg(lcd,ROW_ADDRESS_END_1,0x3F); et028002_write_reg(lcd,MEMORY_ACCESS_CONTROL,0x08); //Power settings et028002_write_reg(lcd,CYCLE_CONTROL_1,0x95); et028002_write_reg(lcd,CYCLE_CONTROL_2,0x95); et028002_write_reg(lcd,CYCLE_CONTROL_3,0xFF); et028002_write_reg(lcd,DISPLAY_CONTROL_8,0x7F); et028002_write_reg(lcd,DISPLAY_CONTROL_9,0x38); et028002_write_reg(lcd,DISPLAY_CONTROL_10,0x78); //Power up display et028002_write_reg(lcd,POWER_CONTROL_3,0x07); et028002_write_reg(lcd,POWER_CONTROL_4,0x00); et028002_write_reg(lcd,POWER_CONTROL_5,0x04); et028002_write_reg(lcd,POWER_CONTROL_6,0x40); et028002_write_reg(lcd,VCOM_CONTROL_2,0x38); et028002_write_reg(lcd,VCOM_CONTROL_3,0x12); msleep(10); et028002_write_reg(lcd,POWER_CONTROL_2,0x04); msleep(20); et028002_write_reg(lcd,VCOM_CONTROL_1,0x80); msleep(5); et028002_write_reg(lcd,POWER_CONTROL_1,0x08); msleep(40); et028002_write_reg(lcd,POWER_CONTROL_1 ,0x10); msleep(40); //Display on et028002_write_reg(lcd,DISPLAY_CONTROL_1,0x04); msleep(40); et028002_write_reg(lcd,DISPLAY_CONTROL_1,0x24); et028002_write_reg(lcd,DISPLAY_CONTROL_1,0x2C); msleep(40); et028002_write_reg(lcd,DISPLAY_CONTROL_1,0x3C); return 0; } static int et028002_power_off(struct et028002 *lcd) { et028002_write_reg(lcd,DISPLAY_CONTROL_1,0x38); msleep(40); et028002_write_reg(lcd,DISPLAY_CONTROL_1,0x28); msleep(40); et028002_write_reg(lcd,DISPLAY_CONTROL_1,0x00); et028002_write_reg(lcd,DISPLAY_CONTROL_8,0x00); et028002_write_reg(lcd,POWER_CONTROL_2,0x00); et028002_write_reg(lcd,POWER_CONTROL_1,0x00); et028002_write_reg(lcd,VCOM_CONTROL_1,0x00); return 0; } /********************************************************************** * * Memory management * **********************************************************************/ static void *rvmalloc(unsigned long size) { void *mem; unsigned long adr; size = PAGE_ALIGN(size); mem = vmalloc_32(size); if (!mem) return NULL; memset(mem, 0, size); /* Clear the ram out, no junk to the user */ adr = (unsigned long) mem; while (size > 0) { SetPageReserved(vmalloc_to_page((void *)adr)); adr += PAGE_SIZE; size -= PAGE_SIZE; } return mem; } static void rvfree(void *mem, unsigned long size) { unsigned long adr; if (!mem) return; adr = (unsigned long) mem; while ((long) size > 0) { ClearPageReserved(vmalloc_to_page((void *)adr)); adr += PAGE_SIZE; size -= PAGE_SIZE; } vfree(mem); } static struct fb_var_screeninfo vfb_default __initdata = { .xres = 240, .yres = 320, .xres_virtual = 240, .yres_virtual = 320, .bits_per_pixel = 16, .red = { 0, 5, 0 }, .green = { 5, 6, 0 }, .blue = { 11, 5, 0 }, .activate = FB_ACTIVATE_TEST, .height = -1, .width = -1, .pixclock = 20000, .left_margin = 0, .right_margin = 0, .upper_margin = 0, .lower_margin = 0, /* .hsync_len = 0, .vsync_len = 0, .vmode = FB_VMODE_NONINTERLACED,*/ }; static struct fb_fix_screeninfo vfb_fix __initdata = { .id = "ET028002FB", .type = FB_TYPE_PACKED_PIXELS, .visual = FB_VISUAL_TRUECOLOR, .xpanstep = 0, .ypanstep = 0, /*.ywrapstep = 1,*/ .accel = FB_ACCEL_NONE, }; static int vfb_enable __initdata = 0; /* disabled by default */ module_param(vfb_enable, bool, 0); static int vfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info); static int vfb_set_par(struct fb_info *info); static int vfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info); static int vfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info); static int vfb_mmap(struct fb_info *info, struct vm_area_struct *vma); static struct fb_ops vfb_ops = { .fb_read = fb_sys_read, .fb_write = fb_sys_write, .fb_check_var = vfb_check_var, .fb_set_par = vfb_set_par, .fb_setcolreg = vfb_setcolreg, .fb_pan_display = vfb_pan_display, .fb_fillrect = sys_fillrect, .fb_copyarea = sys_copyarea, .fb_imageblit = sys_imageblit, .fb_mmap = vfb_mmap, }; /* * Internal routines */ static u_long get_line_length(int xres_virtual, int bpp) { u_long length; length = xres_virtual * bpp; length = (length + 31) & ~31; length >>= 3; return (length); } static int vfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) { u_long line_length; if (var->vmode & FB_VMODE_CONUPDATE) { var->vmode |= FB_VMODE_YWRAP; var->xoffset = info->var.xoffset; var->yoffset = info->var.yoffset; } if (!var->xres) var->xres = 1; if (!var->yres) var->yres = 1; if (var->xres > var->xres_virtual) var->xres_virtual = var->xres; if (var->yres > var->yres_virtual) var->yres_virtual = var->yres; if (var->bits_per_pixel !=16) { pr_debug("%s: depth not supported: %u BBP\n",__FUNCTION__, var->bits_per_pixel); return -EINVAL; } if (var->xres_virtual < var->xoffset + var->xres) var->xres_virtual = var->xoffset + var->xres; if (var->yres_virtual < var->yoffset + var->yres) var->yres_virtual = var->yoffset + var->yres; /* * Memory limit */ line_length = get_line_length(var->xres_virtual, var->bits_per_pixel); if (line_length * var->yres_virtual > videomemorysize) return -ENOMEM; return 0; } /* This routine actually sets the video mode. It's in here where we * the hardware state info->par and fix which can be affected by the * change in par. For this driver it doesn't do much. */ static int vfb_set_par(struct fb_info *info) { info->fix.line_length = get_line_length(info->var.xres_virtual, info->var.bits_per_pixel); return 0; } /* * Set a single color register. The values supplied are already * rounded down to the hardware's capabilities (according to the * entries in the var structure). Return != 0 for invalid regno. */ static int vfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, u_int transp, struct fb_info *info) /*u32 v;*/ { if (regno >= 256) /* no. of hw registers */ //return 1; return -EINVAL; /* * Program hardware... do anything you want with transp */ /* grayscale works only partially under directcolor */ if (info->var.grayscale) { /* grayscale = 0.30*R + 0.59*G + 0.11*B */ red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; } if (info->fix.visual == FB_VISUAL_TRUECOLOR) { u32 value; /* Place color in the pseudopalette */ /* if (regno > 16) return -EINVAL; */ red >>= (16 - info->var.red.length); green >>= (16 - (info->var.green.length)); blue >>= (16 - info->var.blue.length); value = (red << info->var.red.offset) | (green << info->var.green.offset) | (blue << info->var.blue.offset);/* | (transp << info->var.transp.offset);*/ ((u32 *) (info->pseudo_palette))[regno] = value; } return 0; } /* * Pan or Wrap the Display * * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag */ static int vfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { if (var->vmode & FB_VMODE_YWRAP) { if (var->yoffset < 0 || var->yoffset >= info->var.yres_virtual || var->xoffset) return -EINVAL; } else { if (var->xoffset + var->xres > info->var.xres_virtual || var->yoffset + var->yres > info->var.yres_virtual) return -EINVAL; } info->var.xoffset = var->xoffset; info->var.yoffset = var->yoffset; if (var->vmode & FB_VMODE_YWRAP) info->var.vmode |= FB_VMODE_YWRAP; else info->var.vmode &= ~FB_VMODE_YWRAP; return 0; } /* * Most drivers don't need their own mmap function */ static int vfb_mmap(struct fb_info *info, struct vm_area_struct *vma) { unsigned long start = vma->vm_start; unsigned long size = vma->vm_end - vma->vm_start; unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; unsigned long page, pos , ret; if (offset + size > info->fix.smem_len) { return -EINVAL; } pos = (unsigned long)info->fix.smem_start + offset; while (size > 0) { page = vmalloc_to_pfn((void *)pos); if ((ret= remap_pfn_range(vma, start, page, PAGE_SIZE, PAGE_SHARED))) { return ret; } start += PAGE_SIZE; pos += PAGE_SIZE; if (size > PAGE_SIZE) size -= PAGE_SIZE; else size = 0; } vma->vm_flags |= VM_RESERVED; /* avoid to swap out this VMA */ return 0; } #ifndef MODULE static int __init vfb_setup(char *options) { char *this_opt; vfb_enable = 1; if (!options || !*options) return 1; while ((this_opt = strsep(&options, ",")) != NULL) { if (!*this_opt) continue; if (!strncmp(this_opt, "disable", 7)) vfb_enable = 0; } return 1; } #endif /* MODULE */ /* * Initialisation */ static int __init vfb_probe(struct platform_device *dev) { struct fb_info *info; int retval = -ENOMEM; u_int8_t *b; /* * For real video cards we use ioremap . */ if (!(videomemory = vmalloc(videomemorysize))) return retval; memset(videomemory, 0, videomemorysize); info = framebuffer_alloc(sizeof(u32) * 256, &dev->dev); if (!info) goto err; info->screen_base = (char __iomem *)videomemory; info->fbops = &vfb_ops; retval = fb_find_mode(&info->var, info, NULL, NULL, 0, NULL, 8); if (!retval || (retval == 4)) info->var = vfb_default; vfb_fix.smem_start = (unsigned long) videomemory; vfb_fix.smem_len = videomemorysize; info->fix = vfb_fix; info->par = NULL; info->flags = FBINFO_FLAG_DEFAULT; /* info->pseudo_palette = info->par; */ info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); if (!info->pseudo_palette) { printk(KERN_INFO "Fail to allocate pseudo_palette\n"); } memset(info->pseudo_palette, 0, sizeof(u32) * 16); retval = fb_alloc_cmap(&info->cmap, 256, 0); if (retval < 0) goto err1; retval = register_framebuffer(info); if (retval < 0) goto err2; platform_set_drvdata(dev, info); printk(KERN_INFO "fb%d: Virtual frame buffer device, using %ldK of video memory\n", info->node, videomemorysize >> 10); return 0; err2: fb_dealloc_cmap(&info->cmap); err1: framebuffer_release(info); err: rvfree(videomemory, videomemorysize); return retval; } static int vfb_remove(struct platform_device *dev) { struct fb_info *info = platform_get_drvdata(dev); if (info) { unregister_framebuffer(info); rvfree(videomemory, videomemorysize); framebuffer_release(info); } return 0; } static struct platform_driver vfb_driver = { .probe = vfb_probe, .remove = vfb_remove, .driver = { .name = "vfb", }, }; static int __devinit et028002_probe_device(struct spi_device *spi) { /* printk(KERN_ERR ET028002_NAME ": SPI Probed !\n"); int ret; */ lcd = kzalloc(sizeof(struct et028002), GFP_KERNEL); if (!lcd) return -ENOMEM; lcd->spi = spi; lcd->buffer = kzalloc(153601 + 16, GFP_KERNEL); lcd->rxbuff = kzalloc(153601 + 16 ,GFP_KERNEL); dev_set_drvdata(&spi->dev, lcd); //et028002_inited = 0; et028002_power_on(lcd); init_waitqueue_head(&wq); thread_id=kernel_thread(et028002_write_screen, NULL, CLONE_KERNEL ); if( thread_id==0 ) return -EIO; return 0; } static int __devexit et028002_remove_device(struct spi_device *spi) { /*printk(KERN_ERR ET028002_NAME " Exit!\n");*/ struct et028002 *lcd = dev_get_drvdata(&spi->dev); if( thread_id ) kill_proc( thread_id, SIGTERM, 1 ); wait_for_completion( &on_exit ); et028002_power_off(lcd); kfree(lcd); return 0; } static struct spi_driver et028002_driver = { .driver = { .name = "et028002", .bus = &spi_bus_type, .owner = THIS_MODULE, }, .probe = et028002_probe_device, .remove = __devexit_p(et028002_remove_device), }; static struct platform_device *vfb_device; static int __init vfb_init(void) { int ret = 0; #ifndef MODULE char *option = NULL; if (fb_get_options("vfb", &option)) return -ENODEV; vfb_setup(option); #endif if (!vfb_enable) return -ENXIO; ret = platform_driver_register(&vfb_driver); if (!ret) { vfb_device = platform_device_alloc("vfb", 0); if (vfb_device) ret = platform_device_add(vfb_device); else ret = -ENOMEM; if (ret) { platform_device_put(vfb_device); platform_driver_unregister(&vfb_driver); } } ret = spi_register_driver(&et028002_driver); printk(KERN_ERR ET028002_NAME ": SPI Register =%d \n",ret); return ret; } module_init(vfb_init); #ifdef MODULE static void __exit vfb_exit(void) { platform_device_unregister(vfb_device); platform_driver_unregister(&vfb_driver); } module_exit(vfb_exit); MODULE_LICENSE("GPL"); #endif /* MODULE */