.include "tn13def.inc"

		.CSEG		
		rjmp start

		.org $2
		rjmp aufs
		
		.org $3
		rjmp timer

		.org $8
		rjmp watch
		
		.org $9
		rjmp adw


start:	nop
		nop
		cli
		
		;ldi r23 ,2
		;ldi r21 ,10
		;mov r26 ,r23
		;lsl r26 
		;lsl r26 
		;lsl r26 
		;lsl r26 
		;or r26 ,r21
		;cpi r26 ,0x2A
		;brge start	

		

		ldi r16 ,LOW (RAMEND)
		out SPL ,r16

		ldi r26 ,0b00000001      ;Digital Input Disable p.78
		out DIDR0 ,r26

		ldi r16 ,0b1000         ;PB3  out
		out DDRB ,r16
		ldi r16 ,0
		out portb ,r16

		ldi r16 ,0b10
		out timsk0 ,r16
		ldi r16 ,0
		out TCCR0A ,r16
		ldi r16 ,0b100		;clkI0/256 (from prescaler) p.71
		out TCCR0B,r16
		ldi r17 ,9			;timing factor
		ldi r18 ,0
		ldi r19 ,0
		ldi r20 ,0
		ldi r21 ,0
		ldi r22 ,0
		ldi r23 ,0
		ldi r24 ,0
		ldi r25 ,0
		ldi r26 ,0
		ldi r28 ,0

		ldi r16 ,0	   		;ADC PB4
		out ADMUX ,r16
		ldi r16 ,0
		out ADCSRA ,r16

		ldi r16 ,0
		out MCUSR ,r16
		in r16 ,WDTCR
		ori r16 ,0b01111001
		out WDTCR ,r16
		ldi r16 ,0
		out WDTCR ,r16
		
		sei
		nop
		nop
		ldi r16 ,0b00110000
		out MCUCR ,r16	
		nop
		nop
		ldi r16 ,0b00100000
		out GIMSK ,r16
		nop
		nop
		ldi r16 ,0b00010000
		out PCMSK ,r16
		nop
		nop
		ldi r16 ,0
		out GIFR ,r16
		nop
		nop
		out TCCR0B ,r16
		
		
		sleep

		
	
	
schlei: mov r26 ,r23
		lsl r26 
		lsl r26 
		lsl r26 
		lsl r26 
		or r26 ,r21

		cpi r25 ,5          ;sleep time before init duration (sec.)
		brlt suivant
		cli
		ldi r25 ,0
		ldi r16 ,0
		out ADMUX ,r16
		nop
		nop
		out ADCSRA ,r16
		nop
		nop
		ldi r16 ,0b00110000
		out MCUCR ,r16	
		nop
		nop
		ldi r16 ,0b00100000
		out GIMSK ,r16
		nop
		nop
		ldi r16 ,0b00010000
		out PCMSK ,r16
		nop
		nop
		ldi r16 ,0
		out GIFR ,r16
		nop
		nop
		out TCCR0B ,r16
		ldi r16 ,0
		out MCUSR ,r16
		in r16 ,WDTCR
		ori r16 ,0b01111001
		out WDTCR ,r16
		ldi r16 ,0
		out WDTCR ,r16
		sei
			
		sleep
		
		

suivant:
		cpi r20 ,7
		brlt schlei

		cpi r26 ,0x2A
		brge start1		

		cpi r21 ,10
		brge pause

		cpi r21 ,9
		breq aus

		cpi r21 ,7
		brge an

		cpi r21 ,6
		breq aus
		
		cpi r21 ,4
		breq an

		cpi r21 ,3
		breq aus

		cpi r21 ,1
		breq an


an:		cli
		cpi r28 ,28
		brne vian
		ldi r16 ,0b1001         ;PB0  out
		out DDRB ,r16
		sbi portb ,0
		sei
		rjmp schlei

vian:	sbi portb ,3    ;motor pin 2
			sei
			rjmp schlei

aus:	cli
		cpi r28 ,28
		brne viaus
		ldi r16 ,0b1001         ;PB0  out
		out DDRB ,r16
		cbi portb ,0
		ldi r16 ,0b1000         ;PB3  out
		out DDRB ,r16
		sei
		rjmp schlei

viaus:	cbi portb ,3    ;motor pin 2
			sei
			rjmp schlei


pause:	
		cpi r21 ,18
		brlt schlei1

		ldi r21 ,0
		inc r23
		wdr
		cpi r23 ,2
		breq bip

		cpi r23 ,3
		brge start1
		rjmp schlei

bip:	ldi r28 ,28
		rjmp schlei

schlei1:	rjmp schlei
			nop


start1:	
		rjmp start


timer:	in r16 ,SREG
		push r16
		ldi r16 ,0
		out TCCR0B ,r16
		wdr

		in r16 ,ADCSRA
		ori r16 ,0b01000000				
		out ADCSRA ,r16
		nop
		nop

		dec r17
		brne raus

		cpi r20 ,7
		breq suivant2
		cpi r18 ,0
		breq suivant1
		cpi r18 ,15
		brge suivant1
suivant2:
		ldi r25 ,0
suivant1:
		inc r25
		

		ldi r17 ,9         ;timing factor
		cpi r22 ,1
		brlt son
		inc r22
		cpi r22 ,7         ;all ops cut off touch duration (sec.)
		brge start1

son:	cpi r20 ,7
		brge auf
		cpi r19 ,2         ;ops feedback impulse (sec.)
		brge raus
		cpi r18 ,5         ;first touch duration (sec.)
		brlt next

		sbi portb ,3       ;motor pin 2
		inc r19
		cpi r19 ,2         ;ops feedback impulse (sec.)
		brlt raus				
		cbi portb ,3       ;motor pin 2
		
		
raus:	ldi r16 ,0b100				
		out TCCR0B,r16
		pop r16
		out SREG ,r16
		reti

next:	inc r18
		rjmp raus

auf:	
		inc r21
		rjmp raus




adw:	cli
		in r16 ,SREG
		push r16

		cpi r21 ,1
		brge bedingung2

		cpi r19 ,2           ;ops feedback impulse (sec.)
		brge bedingung1
		
		in r16 ,ADCL
		nop
		in r16 ,ADCH
		cpi r16 ,1
		brge next3
		rjmp endAD

next3:	ldi r18 ,0
		ldi r19 ,0
		out TCNT0 ,r18
		cbi portb ,3         ;motor pin 2
		
endAD:	pop r16
		out SREG ,r16
		sei
		reti

bedingung1:

		in r16 ,ADCL
		nop
		in r16 ,ADCH
		nop				
		cpi r16 ,1
		brlt endAD
aa:		ldi r20 ,7
		ldi r22 ,0
		rjmp endAD

bedingung2:

		in r16 ,ADCL
		nop
		in r16 ,ADCH
		nop
		cpi r16 ,1
		brge aa
		cpi r22 ,1
		brge endAD
		inc r22
		ldi r20 ,7
		rjmp endAD


aufs:
		cli
		ldi r16 ,0
		out MCUSR ,r16
		ldi r16 ,0b01111001
		out WDTCR ,r16
		ldi r16 ,0b01101001
		out WDTCR ,r16
		nop
		nop
		ldi r16 ,0b10	         ;ADC PB4
		out ADMUX ,r16
		ldi r16 ,0b10001001
		out ADCSRA ,r16
		nop
		nop
		ldi r16 ,0
		out MCUCR ,r16
		nop
		nop
		out GIMSK ,r16
		nop
		nop
		out PCMSK ,r16
		nop
		nop
		out GIFR ,r16
		nop
		nop
		ldi r16 ,0b100				
		out TCCR0B,r16
		cbi portb ,0
		reti
		nop
		nop
		nop
		nop
		rjmp start			

watch:	nop
		nop
		cbi portb ,3
		ldi r16 ,0
		out MCUSR ,r16
		in r16 ,WDTCR
		ori r16 ,0b01111001
		out WDTCR ,r16
		ldi r16 ,0
		out WDTCR ,r16
		reti