43 #define SI5351_PLL_FIXED 900000000 45 #define SI5351_PLL_VCO_MIN 600000000 46 #define SI5351_PLL_VCO_MAX 900000000 47 #define SI5351_MULTISYNTH_MIN_FREQ 1000000 48 #define SI5351_MULTISYNTH_DIVBY4_FREQ 150000000 49 #define SI5351_MULTISYNTH_MAX_FREQ 160000000 50 #define SI5351_MULTISYNTH67_MAX_FREQ SI5351_MULTISYNTH_DIVBY4_FREQ 51 #define SI5351_CLKOUT_MIN_FREQ 8000 52 #define SI5351_CLKOUT_MAX_FREQ SI5351_MULTISYNTH_MAX_FREQ 53 #define SI5351_CLKOUT67_MAX_FREQ SI5351_MULTISYNTH67_MAX_FREQ 55 #define SI5351_PLL_A_MIN 15 56 #define SI5351_PLL_A_MAX 90 57 #define SI5351_PLL_B_MAX (SI5351_PLL_C_MAX-1) 58 #define SI5351_PLL_C_MAX 1048575 59 #define SI5351_MULTISYNTH_A_MIN 6 60 #define SI5351_MULTISYNTH_A_MAX 1800 61 #define SI5351_MULTISYNTH67_A_MAX 254 62 #define SI5351_MULTISYNTH_B_MAX (SI5351_MULTISYNTH_C_MAX-1) 63 #define SI5351_MULTISYNTH_C_MAX 1048575 64 #define SI5351_MULTISYNTH_P1_MAX ((1<<18)-1) 65 #define SI5351_MULTISYNTH_P2_MAX ((1<<20)-1) 66 #define SI5351_MULTISYNTH_P3_MAX ((1<<20)-1) 68 #define SI5351_DEVICE_STATUS 0 69 #define SI5351_INTERRUPT_STATUS 1 70 #define SI5351_INTERRUPT_MASK 2 71 #define SI5351_STATUS_SYS_INIT (1<<7) 72 #define SI5351_STATUS_LOL_B (1<<6) 73 #define SI5351_STATUS_LOL_A (1<<5) 74 #define SI5351_STATUS_LOS (1<<4) 75 #define SI5351_OUTPUT_ENABLE_CTRL 3 76 #define SI5351_OEB_PIN_ENABLE_CTRL 9 77 #define SI5351_PLL_INPUT_SOURCE 15 78 #define SI5351_CLKIN_DIV_MASK (3<<6) 79 #define SI5351_CLKIN_DIV_1 (0<<6) 80 #define SI5351_CLKIN_DIV_2 (1<<6) 81 #define SI5351_CLKIN_DIV_4 (2<<6) 82 #define SI5351_CLKIN_DIV_8 (3<<6) 83 #define SI5351_PLLB_SOURCE (1<<3) 84 #define SI5351_PLLA_SOURCE (1<<2) 86 #define SI5351_CLK0_CTRL 16 87 #define SI5351_CLK1_CTRL 17 88 #define SI5351_CLK2_CTRL 18 89 #define SI5351_CLK3_CTRL 19 90 #define SI5351_CLK4_CTRL 20 91 #define SI5351_CLK5_CTRL 21 92 #define SI5351_CLK6_CTRL 22 93 #define SI5351_CLK7_CTRL 23 94 #define SI5351_CLK_POWERDOWN (1<<7) 95 #define SI5351_CLK_INTEGER_MODE (1<<6) 96 #define SI5351_CLK_PLL_SELECT (1<<5) 97 #define SI5351_CLK_INVERT (1<<4) 98 #define SI5351_CLK_INPUT_MASK (3<<2) 99 #define SI5351_CLK_INPUT_XTAL (0<<2) 100 #define SI5351_CLK_INPUT_CLKIN (1<<2) 101 #define SI5351_CLK_INPUT_MULTISYNTH_0_4 (2<<2) 102 #define SI5351_CLK_INPUT_MULTISYNTH_N (3<<2) 103 #define SI5351_CLK_DRIVE_STRENGTH_MASK (3<<0) 104 #define SI5351_CLK_DRIVE_STRENGTH_2MA (0<<0) 105 #define SI5351_CLK_DRIVE_STRENGTH_4MA (1<<0) 106 #define SI5351_CLK_DRIVE_STRENGTH_6MA (2<<0) 107 #define SI5351_CLK_DRIVE_STRENGTH_8MA (3<<0) 109 #define SI5351_CLK3_0_DISABLE_STATE 24 110 #define SI5351_CLK7_4_DISABLE_STATE 25 111 #define SI5351_CLK_DISABLE_STATE_MASK 3 112 #define SI5351_CLK_DISABLE_STATE_LOW 0 113 #define SI5351_CLK_DISABLE_STATE_HIGH 1 114 #define SI5351_CLK_DISABLE_STATE_FLOAT 2 115 #define SI5351_CLK_DISABLE_STATE_NEVER 3 117 #define SI5351_PARAMETERS_LENGTH 8 118 #define SI5351_PLLA_PARAMETERS 26 119 #define SI5351_PLLB_PARAMETERS 34 120 #define SI5351_CLK0_PARAMETERS 42 121 #define SI5351_CLK1_PARAMETERS 50 122 #define SI5351_CLK2_PARAMETERS 58 123 #define SI5351_CLK3_PARAMETERS 66 124 #define SI5351_CLK4_PARAMETERS 74 125 #define SI5351_CLK5_PARAMETERS 82 126 #define SI5351_CLK6_PARAMETERS 90 127 #define SI5351_CLK7_PARAMETERS 91 128 #define SI5351_CLK6_7_OUTPUT_DIVIDER 92 129 #define SI5351_OUTPUT_CLK_DIV_MASK (7 << 4) 130 #define SI5351_OUTPUT_CLK6_DIV_MASK (7 << 0) 131 #define SI5351_OUTPUT_CLK_DIV_SHIFT 4 132 #define SI5351_OUTPUT_CLK_DIV6_SHIFT 0 133 #define SI5351_OUTPUT_CLK_DIV_1 0 134 #define SI5351_OUTPUT_CLK_DIV_2 1 135 #define SI5351_OUTPUT_CLK_DIV_4 2 136 #define SI5351_OUTPUT_CLK_DIV_8 3 137 #define SI5351_OUTPUT_CLK_DIV_16 4 138 #define SI5351_OUTPUT_CLK_DIV_32 5 139 #define SI5351_OUTPUT_CLK_DIV_64 6 140 #define SI5351_OUTPUT_CLK_DIV_128 7 141 #define SI5351_OUTPUT_CLK_DIVBY4 (3<<2) 143 #define SI5351_SSC_PARAM0 149 144 #define SI5351_SSC_PARAM1 150 145 #define SI5351_SSC_PARAM2 151 146 #define SI5351_SSC_PARAM3 152 147 #define SI5351_SSC_PARAM4 153 148 #define SI5351_SSC_PARAM5 154 149 #define SI5351_SSC_PARAM6 155 150 #define SI5351_SSC_PARAM7 156 151 #define SI5351_SSC_PARAM8 157 152 #define SI5351_SSC_PARAM9 158 153 #define SI5351_SSC_PARAM10 159 154 #define SI5351_SSC_PARAM11 160 155 #define SI5351_SSC_PARAM12 161 157 #define SI5351_VXCO_PARAMETERS_LOW 162 158 #define SI5351_VXCO_PARAMETERS_MID 163 159 #define SI5351_VXCO_PARAMETERS_HIGH 164 161 #define SI5351_CLK0_PHASE_OFFSET 165 162 #define SI5351_CLK1_PHASE_OFFSET 166 163 #define SI5351_CLK2_PHASE_OFFSET 167 164 #define SI5351_CLK3_PHASE_OFFSET 168 165 #define SI5351_CLK4_PHASE_OFFSET 169 166 #define SI5351_CLK5_PHASE_OFFSET 170 168 #define SI5351_PLL_RESET 177 169 #define SI5351_PLL_RESET_B (1<<7) 170 #define SI5351_PLL_RESET_A (1<<5) 172 #define SI5351_CRYSTAL_LOAD 183 173 #define SI5351_CRYSTAL_LOAD_MASK (3<<6) 174 #define SI5351_CRYSTAL_LOAD_6PF (1<<6) 175 #define SI5351_CRYSTAL_LOAD_8PF (2<<6) 176 #define SI5351_CRYSTAL_LOAD_10PF (3<<6) 178 #define SI5351_FANOUT_ENABLE 187 179 #define SI5351_CLKIN_ENABLE (1<<7) 180 #define SI5351_XTAL_ENABLE (1<<6) 181 #define SI5351_MULTISYNTH_ENABLE (1<<4) 246 #define SI5351_ENABLE_DUMP_REGS 248 #ifdef SI5351_ENABLE_DUMP_REGS
si5351_drive
Definition: si5351.h:206
uint32_t p1
Definition: si5351.h:212
uint8_t LOL_B_STKY
Definition: si5351.h:229
si5351_clock
Definition: si5351.h:201
uint8_t REVID
Definition: si5351.h:223
void si5351_dump_regs(void)
Definition: si5351.c:505
void si5351_SetF2(uint32_t fhz)
Definition: si5351.c:129
uint8_t SYS_INIT_STKY
Definition: si5351.h:228
uint8_t LOL_A
Definition: si5351.h:221
uint8_t SYS_INIT
Definition: si5351.h:219
uint8_t LOL_A_STKY
Definition: si5351.h:230
void si5351_Init(void)
Definition: si5351.c:71
si5351_variant
Definition: si5351.h:194
uint32_t p2
Definition: si5351.h:213
uint8_t LOS
Definition: si5351.h:222
void si5351_Off(void)
Definition: si5351.c:135
si5351_pll
Definition: si5351.h:204
void si5351_SetLO(uint32_t fhz)
Definition: si5351.c:123
void si5351_SetF0(uint32_t fhz)
Definition: si5351.c:117
uint32_t p3
Definition: si5351.h:214
uint8_t LOS_STKY
Definition: si5351.h:231
uint8_t LOL_B
Definition: si5351.h:220