Befehle im I2C für die ICs. Soundcontroller MC44130. Adresse 80Hex. Danach Subadresse dann Daten. Lautstärke Links min: 00 C0 Lautstärke Rechts min: 01 C0 Lautstärke Links max: 00 FF Lautstärke Rechts max: 01 FF Lautstärke Links Kopfhörer min: 02 C0 Lautstärke Rechts Kopfhörer min: 03 C0 Lautstärke Links Kopfhörer max: 02 FF Lautstärke Rechts Kopfhörer max: 03 FF Bässe min: FD F1 Bässe max: FD FE Höhen min: FD 1F Höhen max: FD EF Stumm: FE FF Ton an: FE 7F Stereo: FE 00 Pseudo: FE 20 Spatial: FE 10 Spatial+Pseudo: FE 30 TV: FE 05 AV: FE 08 Mono: FE 4F Zweikanalton 1: FE 07 Zweikanalton 2: FE 06 Bestimmen ob das ankommende Signal Stereo, Mono oder Zweikanalton ist. Adresse 81Hex. Zuerst Chipadresse, danach Datensatz. Stereo: 01 Mono: 00 Zweikanalton: 02 Soundcontroller TDA8420 oder TDA8421. Falls der andere IC nicht mehr zu kriegen ist. Adresse 82Hex. Danach Subadresse, dann Daten. Lautstärke Links min: 00 C0 Lautstärke Rechts min: 01 C0 Lautstärke Links max: 00 FF Lautstärke Rechts max: 01 FF Lautstärke Links Kopfhörer min: 04 C0 Lautstärke Rechts Kopfhörer min: 05 C0 Lautstärke Links Kopfhörer max: 04 FF Lautstärke Rechts Kopfhörer max: 05 FF Bässe min: 02 F0 Bässe max: 02 FF Höhen min: 03 F0 Höhen max: 03 FF Falls der IC auf TV-Modus läuft, gelten diese Subadressen und Daten: Stumm: 08 E1 Ton an: 08 C0 Stereo: 08 CF Spatial: 08 DF Pseudo: 08 D7 Stereo Kopfhörer: 08 FF Spatial Kopfhörer: 08 FF Pseudo Kopfhörer: 08 FF Falls der IC auf AV-Modus läuft, gelten diese Subadressen und Daten: Stumm: 08 E0 Ton an: 08 BF Stereo: 08 CE Spatial: 08 DE Pseudo: 08 D6 Stereo Kopfhörer: 08 FE Spatial Kopfhörer: 08 FE Pseudo Kopfhörer: 08 FE Stereodecoder TDA9840. Chipadresse 84Hex. Danach Subadresse, dann Daten. Stereo: 00 2A Mono: 00 10 Zweikanalton 1: 00 12 Zweikanalton 2: 00 1E AV: 00 7A Starteinstellung: 03 00 Bestimmen ob das ankommende Signal Stereo, Mono oder Zweikanalton ist. Adresse 81Hex. Zuerst Chipadresse, danach Datensatz. Stereo: 40 Mono: 00 Zweikanalton: 20 Hier noch die Beispiele von euch die man verknüpfen müsste: _________________________________________________________________________________________ _________________________________________________________________________________________ ***************************************************************************************** _________________________________________________________________________________________ _________________________________________________________________________________________ ;***************************************************************************** ;*** Name of the program: TWI (Single) Master Implementation ;*** Function: Implementaion of I2C-Bus with connection to a ;*** 1. I/O-Extension PCF8574 ;*** 2. DSM-0822a ;*** Author: Andreas Hesse ;*** Date of construction: 2003-04-09 ;*** Date of last revision: 2003-11-16 ;*** Version: 1.0.1.0 ;*** Target: AT90Sxxxx (any AVR device) ;*** Comment: ;*** ;*** Abbreviations: ;*** 1. RI = Remote Input ;*** 2. RO = Remote Output ;*** 3. PM = Program Memory ;*** 4. SRAM = Static RAM ;****************************************************************************** ;*** ;*** Version management: ;*** V 1.0.1.0 Code Review ;*** V 1.0.0.3 + I2C_Display ;*** V 1.0.0.2 Optimized version: Read and write procedure are not separted ;*** during write procedure for inputs also the output value will ;*** be written ;*** V 1.0.0.1 Implement connection to PCF8574 ;*** V 1.0.0.0 First construction based on Version 1.0 of ;*** A P P L I C A T I O N N O T E A V R 3 0 0 (2002.05.03) ;****************************************************************************** ;*** DESCRIPTION ;*** Basic routines for communicating with TWI slave devices. This ;*** "single" master implementation is limited to one bus master on the ;*** TWI bus. Most applications do not need the multimaster ability ;*** the TWI bus provides. A single master implementation uses, by far, ;*** less resources and is less XTAL frequency dependent. ;*** ;*** Some features : ;*** * All interrupts are free, and can be used for other activities. ;*** * Supports normal and fast mode. ;*** * Supports both 7-bit and 10-bit addressing. ;*** * Supports the entire AVR microcontroller family. ;*** ;*** Main TWI functions : ;*** 'TWI_start' - Issues a start condition and sends address ;*** and transfer direction. ;*** 'TWI_rep_start' - Issues a repeated start condition and sends ;*** address and transfer direction. ;*** 'TWI_do_transfer' - Sends or receives data depending on ;*** direction given in address/dir byte. ;*** 'TWI_stop' - Terminates the data transfer by issue a ;*** stop condition. ;*** ;*** USAGE ;*** Transfer formats is described in the AVR300 documentation. ;*** (An example is shown in the 'mainloop' code). ;*** ;*** NOTES ;*** The TWI routines can be called either from non-interrupt or ;*** interrupt routines, not both. ;*** ;*** STATISTICS ;*** Code Size: 81 words (maximum) ;*** Register Usage: 4 High, 0 Low ;*** Interrupt Usage: None ;*** Other Usage: Uses two I/O pins on port D ;*** XTAL Range: N/A ;*** ;*************************************************************************** ;*** Includes ;*** No Include ;**** Global I2C Constants **** ; Define I2C Ports and PINs .equ SCLP = 4 ; SCL Pin number on I2CPORT .equ SDAP = 3 ; SDA Pin number I2CPORT .equ I2CPIN = PINB .equ I2CPORT = PORTB .equ I2CDDR = DDRB .equ b_dir = 0 ; transfer direction bit in tmpadr ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_hp_delay ;*** TWI_qp_delay ;*** ;*** DESCRIPTION ;*** hp - half TWI clock period delay (normal: 5.0us / fast: 1.3us) ;*** qp - quarter TWI clock period delay (normal: 2.5us / fast: 0.6us) ;*** ;*** SEE DOCUMENTATION !!! ;*** ;*** USAGE ;*** no parameters ;*** ;*** RETURN ;*** none ;*** ;*************************************************************************** TWI_hp_delay: ldi tmpdelay,9 TWI_hp_delay_loop: dec tmpdelay brne TWI_hp_delay_loop ret TWI_qp_delay: ldi tmpdelay,4 TWI_qp_delay_loop: dec tmpdelay brne TWI_qp_delay_loop ret ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_rep_start ;*** ;*** DESCRIPTION ;*** Assert repeated start condition and sends slave address. ;*** ;*** USAGE ;*** tmpadr - Contains the slave address and transfer direction. ;*** ;*** RETURN ;*** Carry flag - Cleared if a slave responds to the address. ;*** ;*** NOTE ;*** IMPORTANT! : This funtion must be directly followed by TWI_start. ;*** ;*************************************************************************** TWI_rep_start: sbi I2CDDR,SCLP ; force SCL low cbi I2CDDR,SDAP ; release SDA rcall TWI_hp_delay ; half period delay cbi I2CDDR,SCLP ; release SCL rcall TWI_qp_delay ; quarter period delay ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_start ;*** ;*** DESCRIPTION ;*** Generates start condition and sends slave address. ;*** ;*** USAGE ;*** tmpadr - Contains the slave address and transfer direction. ;*** ;*** RETURN ;*** Carry flag - Cleared if a slave responds to the address. ;*** ;*** NOTE ;*** IMPORTANT! : This funtion must be directly followed by TWI_write. ;*** ;*************************************************************************** TWI_start: mov tmpdata,tmpadr ; copy address to transmitt register sbi I2CDDR,SDAP ; force SDA low rcall TWI_qp_delay ; quarter period delay ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_write ;*** ;*** DESCRIPTION ;*** Writes data (one byte) to the TWI bus. Also used for sending ;*** the address. ;*** ;*** USAGE ;*** tmpdata - Contains data to be transmitted. ;*** ;*** RETURN ;*** Carry flag - Set if the slave respond transfer. ;*** ;*** NOTE ;*** IMPORTANT! : This funtion must be directly followed by TWI_get_ack. ;*** ;*************************************************************************** TWI_write: sec ; set carry flag rol tmpdata ; shift in carry and out bit one rjmp TWI_write_first TWI_write_bit: lsl tmpdata ; if transmit register empty TWI_write_first: breq TWI_get_ack ; goto get acknowledge sbi I2CDDR,SCLP ; force SCL low brcc TWI_write_low ; if bit high nop ; (equalize number of cycles) cbi I2CDDR,SDAP ; release SDA rjmp TWI_write_high TWI_write_low: ; else sbi I2CDDR,SDAP ; force SDA low rjmp TWI_write_high ; (equalize number of cycles) TWI_write_high: rcall TWI_hp_delay ; half period delay cbi I2CDDR,SCLP ; release SCL rcall TWI_hp_delay ; half period delay rjmp TWI_write_bit ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_get_ack ;*** ;*** DESCRIPTION ;*** Get slave acknowledge response. ;*** ;*** USAGE ;*** (used only by TWI_write in this version) ;*** ;*** RETURN ;*** Carry flag - Cleared if a slave responds to a request. ;*** ;*************************************************************************** TWI_get_ack: sbi I2CDDR,SCLP ; force SCL low cbi I2CDDR,SDAP ; release SDA rcall TWI_hp_delay ; half period delay cbi I2CDDR,SCLP ; release SCL TWI_get_ack_wait: ;sbis I2CPIN,SCLP ; wait SCL high sbic I2CPIN,SCLP ; wait SCL high rjmp TWI_ACK_OK ;(In case wait states are inserted) dec tmpcnt breq error rjmp TWI_get_ack_wait TWI_ACK_OK: clc ; clear carry flag sbic I2CPIN,SDAP ; if SDA is high sec ; set carry flag rcall TWI_hp_delay ; half period delay TWI_ACK_END: ret error: sbr tmperror,0b00000001 ; Bit 1 is a Signal for an I2C-Bus error rcall ERRORHANDLING pop tmp ; get return adress from stack rjmp TWI_ACK_END ERRORHANDLING: ;cpi tmperror,0 ;breq I2CWRITE_END sbi I2CPORT,3 or errorsave,tmperror clr tmperror ret ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_do_transfer ;*** ;*** DESCRIPTION ;*** Executes a transfer on bus. This is only a combination of TWI_read ;*** and TWI_write for convenience. ;*** ;*** USAGE ;*** tmpadr - Must have the same direction as when TWI_start was called. ;*** see TWI_read and TWI_write for more information. ;*** ;*** RETURN ;*** (depends on type of transfer, read or write) ;*** ;*** NOTE ;*** IMPORTANT! : This funtion must be directly followed by TWI_read. ;*** ;*************************************************************************** TWI_do_transfer: sbrs tmpadr,b_dir ; if dir = write rjmp TWI_write ; goto write data ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_read ;*** ;*** DESCRIPTION ;*** Reads data (one byte) from the TWI bus. ;*** ;*** USAGE ;*** Carry flag - If set no acknowledge is given to the slave ;*** indicating last read operation before a STOP. ;*** If cleared acknowledge is given to the slave ;*** indicating more data. ;*** ;*** RETURN ;*** tmpdata - Contains received data. ;*** ;*** NOTE ;*** IMPORTANT! : This funtion must be directly followed by TWI_put_ack. ;*** ;*************************************************************************** TWI_read: rol tmpstatus ; store acknowledge ; (used by TWI_put_ack) ldi tmpdata,0x01 ; data = 0x01 TWI_read_bit: ; do sbi I2CDDR,SCLP ; force SCL low rcall TWI_hp_delay ; half period delay cbi I2CDDR,SCLP ; release SCL rcall TWI_hp_delay ; half period delay clc ; clear carry flag sbic I2CPIN,SDAP ; if SDA is high sec ; set carry flag rol tmpdata ; store data bit brcc TWI_read_bit ; while receive register not full ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_put_ack ;*** ;*** DESCRIPTION ;*** Put acknowledge. ;*** ;*** USAGE ;*** (used only by TWI_read in this version) ;*** ;*** RETURN ;*** none ;*** ;*************************************************************************** TWI_put_ack: sbi I2CDDR,SCLP ; force SCL low ror tmpstatus ; get status bit brcc TWI_put_ack_low ; if bit low goto assert low cbi I2CDDR,SDAP ; release SDA rjmp TWI_put_ack_high TWI_put_ack_low: ; else sbi I2CDDR,SDAP ; force SDA low TWI_put_ack_high: rcall TWI_hp_delay ; half period delay cbi I2CDDR,SCLP ; release SCL TWI_put_ack_wait: sbis I2CPIN,SCLP ; wait SCL high rjmp TWI_put_ack_wait rcall TWI_hp_delay ; half period delay ret ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_stop ;*** ;*** DESCRIPTION ;*** Assert stop condition. ;*** ;*** USAGE ;*** No parameters. ;*** ;*** RETURN ;*** None. ;*** ;*************************************************************************** TWI_stop: sbi I2CDDR,SCLP ; force SCL low sbi I2CDDR,SDAP ; force SDA low rcall TWI_hp_delay ; half period delay cbi I2CDDR,SCLP ; release SCL rcall TWI_qp_delay ; quarter period delay cbi I2CDDR,SDAP ; release SDA rcall TWI_hp_delay ; half period delay ret ;*************************************************************************** ;*** ;*** FUNCTION ;*** TWI_init has been commented out; Initialisation will be performed in mainprogram ;*** ;*** DESCRIPTION ;*** Initialization of the TWI bus interface. ;*** ;*** USAGE ;*** Call this function once to initialize the TWI bus. No parameters ;*** are required. ;*** ;*** RETURN ;*** None ;*** ;*** NOTE ;*** I2CPORT and I2CDDR pins not used by the TWI bus interface will be ;*** set to Hi-Z (!). ;*** ;*** COMMENT ;*** This function can be combined with other I2CPORT initializations. ;*** ;*************************************************************************** ;*** Portbit-Configuration *** ;*** I2CPORT bits ;*** 1xxxxxx PD6(Pin11) ;*** x1xxxxx PD5(Pin09) ;*** xx1xxxx Set LED if signal from RI7 PD4(Pin08) ;*** xxx1xxx Error Connecting I2C PD3(Pin07) ;*** xxxx1xx Switch on Remote Output PD2(Pin06) ;*** xxxxx1x I2C SCL PD1(Pin03) ;*** xxxxxx1 I2C SDA PD0(Pin02) ;*** PORTB bits ;*** 1xxxxxxx PB7(Pin19) ;*** x1xxxxxx PB6(Pin18) ;*** xx1xxxxx PB5(Pin17) ;*** xxx1xxxx PB4(Pin16) ;*** xxxx1xxx PB3(Pin15) ;*** xxxxx1xx PB2(Pin14) ;*** xxxxxx1x PB1(Pin13) ;*** xxxxxxx1 PB0(Pin12) ;TWI_init: ; ldi tmpstatus,0b00000000 ; PD0 and PD1 -> Input, No Pullup ; out I2CDDR,tmpstatus ; PD2 -> Input, switch on Pullup ; ldi tmpstatus,0b00000000 ; PD3,PD4 -> Output ; out I2CPORT,tmpstatus ; set TWI pins to open colector ; clr tmpstatus ; clear TWI status register (used ; as a temporary register) ; ret ;*************************************************************************** ;*** ;*** FUNCTION ;*** I2CIO ;*** ;*** DESCRIPTION ;*** Communcate with a PCF8574 Ciruit to expand I/O Lines ;*** ;*** USAGE ;*** tmpadr - Adress of circuit ;*** are required. ;*** ;*** RETURN ;*** None ;*** ;*** I2CPORT and I2CDDR pins not used by the TWI bus interface will be ;*** NOTE ;*** set to Hi-Z (!). ;*** ;*** COMMENT ;*** This function can be combined with other I2CPORT initializations. ;*** ;*************************************************************************** ;I2CIO: ; ldi tmpcnt,$0F ; errorcounter, if no acknowledge ; ldi tmpadr,IOAdr+TWIwr ; Set device address and write ; rcall TWI_start ; Send start condition and address ; mov tmpdata,tmp ; rcall TWI_do_transfer ; Execute transfer ; ldi tmpadr,IOAdr+TWIrd ; Set device address and read ; rcall TWI_rep_start ; Send repeated start condition and address ; sec ; Set no acknowledge (read is followed by a ; stop condition) ; rcall TWI_do_transfer ; Execute transfer (read) ; rcall TWI_stop ; Send stop condition - releases bus ; ldi tmpcnt,0 ;I2CEND: ; ret ;*************************************************************************** ;*** ;*** FUNCTION ;*** I2CDISP ;*** ;*** DESCRIPTION ;*** Communcate with a PCF8574 Ciruit to expand I/O Lines ;*** ;*** USAGE ;*** tmpadr - Adress of circuit ;*** are required. ;*** ;*** RETURN ;*** None ;*** ;*** I2CPORT and I2CDDR pins not used by the TWI bus interface will be ;*** NOTE ;*** set to Hi-Z (!). ;*** ;*** COMMENT ;*** This function can be combined with other I2CPORT initializations. ;*** ;*************************************************************************** I2CDISP: ; gets the message in Z rcall getmessage I2CDISPWM: ; does not get message in Z automatically ; must be done manually rcall GetCharDef ldi yl,0x80 ldi yh,0 ldi tmp16cntl,16 ldi tmpcnt,0x80 ; errorcounter, if no acknowledge ldi tmpadr, I2CDispAdr + TWIwr ; Set device address and write rcall TWI_start ; Send start condition and address ldi tmpdata,224 ; select device rcall TWI_do_transfer ; Execute transfer ldi tmpdata,200 ; device enable rcall TWI_do_transfer ; Execute transfer ldi tmpdata,240 ; Blink mode rcall TWI_do_transfer ; Execute transfer ldi tmpdata,0 ; Initial-Position rcall TWI_do_transfer ; Execute transfer OutChar: ld tmpdata, y+ rcall TWI_do_transfer ; dec tmp16cntl brne OutChar mov tmpdata,SpecialSig1 ; last bytes represent rcall TWI_do_transfer ; special signs on display mov tmpdata,SpecialSig2 ; rcall TWI_do_transfer ; rcall TWI_stop ; Send stop condition - releases bus ret ;*************************************************************************** ;*** ;*** FUNCTION ;*** Getmessage ;*** ;*** DESCRIPTION ;*** Copies a message from PM to SRAM ;*** ;*** USAGE ;*** Expects a pointer in Z to identify the Message and then loads 8 bytes from ;*** PM. ;*** xl,xh,yl,yh, tmp16cntl, tmp16cnth, tmpdelay ;*** are required. ;*** ;*** RETURN ;*** None ;*** ;*** NOTE ;*** ;*** ;*** COMMENT ;*** ;*** ;*************************************************************************** GetMessage: ldi xh,0 ldi xl,0x60 ;StartSram ldi tmpdelay,8 CopyChar: lpm ; get value from PM st X+,R0 ; store it to SRAM adiw ZL,1 ; next location in PM dec tmpdelay brne CopyChar ret ;*************************************************************************** ;*** ;*** FUNCTION ;*** GetCharDef ;*** ;*** DESCRIPTION ;*** Copies the specific Byte codes for a Text from PM ;*** One Char on Display must be defined with 2 Bytes (2*8 Segments) ;*** Data Table CharDef holds the Segment definition ;*** USAGE ;*** Expects a pointer in Z to identify the Message and then loads 8 bytes from ;*** PM. ;*** xl,xh,yl,yh, tmp16cntl, tmp16cnth, tmpdelay ;*** are required. ;*** ;*** RETURN ;*** None ;*** ;*** NOTE ;*** ;*** ;*** COMMENT ;*** ;*** ;*************************************************************************** GetCharDef: ldi xh,0 ldi xl,0x60 ;StartSram ldi tmpdelay,8 ldi yl,0x80 ldi yh,0 CharDefLoop: ; Load start of table ldi ZH,HIGH(2*CharDef) ldi ZL,LOW(2*CharDef) ; get position of ldi tmp16cnth,0 ld tmp16cntl, X+ subi tmp16cntl, 32 ; convert ASCII to Position in Chardef-Table lsl tmp16cntl ; *2 (two bytes per char) add zl, tmp16cntl adc zh, tmp16cnth lpm st y+, r0 adiw ZL,1 lpm st y+, r0 dec tmpdelay brne CharDefLoop ret ; Definitiontable ; This Defines the values for the segments of DSM-0822a ; 1 Char will need 2 Bytes (1 Char = 16 segements) ; Additional X in comment indicates that a Char is worse to read on display CharDef: .db 0x00, 0x00 ; .db 0x01, 0x20 ; ! XXX .db 0x80, 0x20 ; " .db 0x25, 0x3d ; # XXX .db 0xad, 0xb5 ; $ X .db 0xec, 0x37 ; % X .db 0x3b, 0x71 ; & XXX .db 0x00, 0x02 ; ' .db 0x00, 0x42 ; ( .db 0x42, 0x00 ; ) .db 0x66, 0x66 ; * .db 0x24, 0x24 ; + .db 0x40, 0x00 ; , .db 0x20, 0x04 ; - .db 0x01, 0x00 ; . .db 0x40, 0x02 ; / .db 0x99, 0x99 ; 0 gleic dem O .db 0x00, 0x09 ; 1 .db 0x39, 0x9C ; 2 .db 0x29, 0x9D ; 3 .db 0xA0, 0x0D ; 4 .db 0xA9, 0x95 ; 5 .db 0xB9, 0x95 ; 6 .db 0x08, 0x89 ; 7 .db 0xB9, 0x9D ; 8 .db 0xA9, 0x9D ; 9 .db 0x28, 0x00 ; : XXX .db 0x48, 0x00 ; ; XXX .db 0x41, 0x12 ; < XX .db 0x21, 0x14 ; = XXX .db 0x03, 0x50 ; > XX .db 0x8c, 0x8c ; ? .db 0x3d, 0x99 ; @ .db 0xb8, 0x8d ; A .db 0x0d, 0xbd ; B .db 0x99, 0x90 ; C .db 0x0d, 0xb9 ; D .db 0xb9, 0x94 ; E .db 0xb8, 0x80 ; F .db 0x99, 0x95 ; G .db 0xb0, 0x0d ; H .db 0x0d, 0xb0 ; I .db 0x1d, 0xa0 ; J .db 0xb0, 0x42 ; K .db 0x91, 0x10 ; L .db 0x92, 0x0b ; M .db 0x92, 0x49 ; N .db 0x99, 0x99 ; O .db 0xb8, 0x8c ; P .db 0x99, 0xd9 ; Q .db 0xb8, 0xcc ; R .db 0xa9, 0x95 ; S .db 0x0c, 0xa0 ; T .db 0x91, 0x19 ; U .db 0xd0, 0x02 ; V .db 0xd0, 0x49 ; W .db 0x42, 0x42 ; X .db 0x06, 0x02 ; Y .db 0x49, 0x92 ; Z .db 0x99, 0x00 ; [ .db 0x02, 0x40 ; \ Backslas .db 0x00, 0x99 ; ] .db 0x40, 0x40 ; ^ XXX .db 0x01, 0x10 ; _ ; Alternative für kleine Zahlen, entsprecend einsetzen ;.db 0x9d, 0x20 ; 0 ;.db 0x04, 0x20 ; 1 ;.db 0x39, 0x20 ; 2 ;.db 0x2d, 0x20 ; 3 ;.db 0xa4, 0x20 ; 4 ;.db 0xad, 0x00 ; 5 ;.db 0xbd, 0x00 ; 6 ;.db 0x0c, 0x20 ; 7 ;.db 0xbd, 0x20 ; 8 ;.db 0xad, 0x20 ; 9 ;*** End of File _____________________________________________________________________________________________- _____________________________________________________________________________________________ ;************************************************************************* ; AVR - I2C-EEPROM ; ; Copyright: ralph.dillhardt@web.de ; ; Germany-Date: 02-01-2004 ; Datei: i2c_eeprom.asm ; Microcontoller: ATmega161 mit 8MHz Taktfrequenz ; ; Ansteuerung eines 64k EEPROM - 24LC65 ; ;************************************************************************* ;-------------------------------------------------------------------------- ;AT24C64 Eeprom write 1010xxx(fix-Adr)0(write) xxx=000 ;-------------------------------------------------------------------------- i2c_write_eeprom: rcall i2c_start ;I2C Start Condition ldi i2c_buffer, 0b10100000 ;Slave addresse rcall i2c_write ;Write Slave address ldi i2c_buffer, 0b00000000 ;address1 byte rcall i2c_write ;Write address1 ldi i2c_buffer, 0b00000000 ;address0 byte rcall i2c_write ;Write address0 ldi i2c_buffer, 'P' ;data byte rcall i2c_write ;Write Data byte ldi i2c_buffer, 'a' ;data byte rcall i2c_write ;Write Data byte ldi i2c_buffer, 'r' ;data byte rcall i2c_write ;Write Data byte ldi i2c_buffer, 't' ;data byte rcall i2c_write ;Write Data byte ldi i2c_buffer, 'y' ;data byte rcall i2c_write ;Write Data byte ldi i2c_buffer, ' ' ;data byte rcall i2c_write ;Write Data byte rcall i2c_stop ;I2C Stop Condition i2c_weeprom_loop: rcall i2c_start ;I2C Start Condition ldi i2c_buffer, 0b10100000 ;Slave addresse rcall i2c_write ;Write Slave address brts i2c_weeprom_loop ;Ack Polling ret ;AT24C64 Eeprom write ende ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ;AT24C64 Eeprom read 1010xxx(fix-Adr)0(write) xxx=000 ;-------------------------------------------------------------------------- i2c_read_eeproma: rcall i2c_start ;I2C Start Condition ldi i2c_buffer, 0b10100000 ;Slave addresse rcall i2c_write ;Write Slave address ldi i2c_buffer, 0b00000000 ;address1 byte rcall i2c_write ;Write address1 ldi i2c_buffer, 0b00000000 ;address0 byte rcall i2c_write ;Write address0 rcall i2c_stop ;I2C Stop Condition ret ;AT24C16 Eeprom read ende ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ;AT24C64 Eeprom read 1010xxx(fix-Adr)1(read) xxx=000 ;-------------------------------------------------------------------------- i2c_read_eepromw: rcall i2c_start ;I2C Start Condition ldi i2c_buffer, 0b10100001 ;Slave addresse rcall i2c_write ;Write Slave address rcall i2c_read ;Read Data byte mov r4,i2c_buffer rcall i2c_stop ;I2C Stop Condition ret ;AT24C64 Eeprom read ende ;-------------------------------------------------------------------------- ;-------------------------------------------------------------------------- ;AT24C64 Eeprom read 1010xxx(fix-Adr)0(write) xxx=000 ;-------------------------------------------------------------------------- i2c_read_eeprom: rcall i2c_start ;I2C Start Condition ldi i2c_buffer, 0b10100000 ;Slave addresse rcall i2c_write ;Write Slave address ldi i2c_buffer, 0b00000000 ;address1 byte rcall i2c_write ;Write address1 ldi i2c_buffer, 0b00000000 ;address0 byte rcall i2c_write ;Write address0 rcall i2c_start ;I2C Start Condition ldi i2c_buffer, 0b10100001 ;Slave addresse rcall i2c_write ;Write Slave address rcall i2c_read ;Read Data byte rcall i2c_stop ;I2C Stop Condition mov r4,i2c_buffer ret ;AT24C64 Eeprom read ende ;-------------------------------------------------------------------------- ___________________________________________________________________________________ ___________________________________________________________________________________ I2CLCD EQU 070H ;Adresse des PCF8576 ; Die folgende Routine initialisiert den PCF8576 Init_LCD: ACALL I2C_STRT MOV A,#I2CLCD ACALL I2C_WBYT MOV A,#0E0H ; Lade 11100000B, also: C=1 (weiteres Commando folgt) ; device select: A0 - A2 = 0 ACALL I2C_WBYT MOV A,#0C8H ; Lade 11001000B, also: C=1 ; LP=1 (Chip an) ; E=0 (Display enable) ; B=0 (1/3 bias) ; M=00 (mux 1:4, 4 BP) ACALL I2C_WBYT MOV A,#000H ; Lade 00000000B, also: C=0 (letztes Commando) ; data pointer = 0 ACALL I2C_WBYT ACALL I2C_STOP RET ; Zuordnung der Segmente ; Eine Tabelle ordnet den ASCII Codes von 020h bis 05fh (Großbuchstaben, Ziffern und ; Sonderzeichen) den Segmenten zu. Je zwei Byte ergeben ein Zeichen in der Anzeige. Send_LCD: ;Sende Hex-Zahl an PCF8576; Zeichen in A PUSH ACC ACALL I2C_STRT MOV A, #I2CLCD ;Adresse Laden ACALL I2C_WBYT ;LCD auswählen MOV A, Position ACALL I2C_WBYT ;Wert übertragen POP ACC CLR C RLC A ;Mul 2 wegen zwei Werten pro Stelle PUSH ACC MOV DPTR, #Segmente MOVC A, @A+DPTR ACALL I2C_WBYT POP ACC INC A MOVC A, @A+DPTR ACALL I2C_WBYT ACALL I2C_STOP RET ; Die Tabelle Segmente: db 000h, 000h ; db 001h, 020h ; ! XXX db 080h, 020h ; " db 025h, 03dh ; # XXX db 0adh, 0b5h ; $ X db 0ech, 037h ; % X db 03bh, 071h ; & XXX db 000h, 002h ; ' db 000h, 042h ; ( db 042h, 000h ; ) db 066h, 066h ; * db 024h, 024h ; + db 040h, 000h ; , db 020h, 004h ; - db 001h, 000h ; . db 040h, 002h ; / db 099h, 099h ; 0 gleich dem O db 000h, 009h ; 1 db 039h, 09Ch ; 2 db 029h, 09Dh ; 3 db 0A0h, 00Dh ; 4 db 0A9h, 095h ; 5 db 0B9h, 095h ; 6 db 008h, 089h ; 7 db 0B9h, 09Dh ; 8 db 0A9h, 09Dh ; 9 db 028h, 000h ; : XXX db 048h, 000h ; ; XXX db 041h, 012h ; < XX db 021h, 014h ; = XXX db 003h, 050h ; > XX db 08ch, 08ch ; ? db 03dh, 099h ; @ db 0b8h, 08dh ; A db 00dh, 0bdh ; B db 099h, 090h ; C db 00dh, 0b9h ; D db 0b9h, 094h ; E db 0b8h, 080h ; F db 099h, 095h ; G db 0b0h, 00dh ; H db 00dh, 0b0h ; I db 01dh, 0a0h ; J db 0b0h, 042h ; K db 091h, 010h ; L db 092h, 00bh ; M db 092h, 049h ; N db 099h, 099h ; O db 0b8h, 08ch ; P db 099h, 0d9h ; Q db 0b8h, 0cch ; R db 0a9h, 095h ; S db 00ch, 0a0h ; T db 091h, 019h ; U db 0d0h, 002h ; V db 0d0h, 049h ; W db 042h, 042h ; X db 006h, 002h ; Y db 049h, 092h ; Z db 099h, 000h ; [ db 002h, 040h ; \ db 000h, 099h ; ] db 040h, 040h ; ^ XXX db 001h, 010h ; _ ; Alternative für kleine Zahlen, entsprechend einsetzen db 09dh, 020h ; 0 db 004h, 020h ; 1 db 039h, 020h ; 2 db 02dh, 020h ; 3 db 0a4h, 020h ; 4 db 0adh, 000h ; 5 db 0bdh, 000h ; 6 db 00ch, 020h ; 7 db 0bdh, 020h ; 8 db 0adh, 020h ; 9