Hi Markus, The tester cannot define the transistor with interal diode protection: so that when we have changed the position of test-leads , the tester gives different data NPN or PNP and the pinouts also changed for the same device!!! After test , here is an algorithm to distinguish among: NPN+diode(case1); PNP+diode(case2); 3diode(case3); 3diode(case4); 2dioden in serie(case5). C(Y) C(X) o o |--+ |--+ | _|_ +--|>|--+o C(Y) | _|_ +--|<|-+-o C(X) |/ /_\ | _|_ |/ _\_/_ | _|_ Z B(X) o---| | = B(X)o---+ /_\ B(Y) o---| | = B(Y) o---+ _\_/_ A(X) o--|>|---o---|>|---o K(Y) |> --+ | | |< --+ | | | +--|>|--+o E(Z) | +--|<|-+-o E(Z) o o E(Z) E(Z) NPN+diode(case1) = 3diode(case3) ; PNP+diode(case2) = 3diode(case4) ; 2dioden in serie(case5) . 1) We see that in the 5th cases there are 3 diodes, so the tester will detect them by the first test: CheckPins(TP1, TP2, TP3); CheckPins(TP1, TP3, TP2); CheckPins(TP2, TP1, TP3); CheckPins(TP2, TP3, TP1); CheckPins(TP3, TP2, TP1); CheckPins(TP3, TP1, TP2); under : (NumOfDiodes == 3) . 2) Now it is possible to define one COMMUN ANODE=X and one COMMUN CATHODE=Y (so if it is a transistor: the Base is X for NPN ,or Y for PNP , Z is the Emmiter of course ) . 3) there is a second test: N° X Y Z NPN+D PNP+D 3diode(case3) 3diode(case4) 2dioden in serie(case5) 1- 5 5 0 vX=0.7;vY=0 vX=0.7;vY=5 vX=0.7;vY=5 vX=0.7;vY=5 vX=0.7;vY=5 2- 5 0 5 3- 5 0 0 4- 0 5 5 5- 0 5 5 6- 0 0 5 So the test n°1 can help us : if: vY= 0 volt ==> NPN+diode with B=X and C=Y and E=Z if: vY= 5 volt ==> PNP+diode with B=Y and C=X and E=Z Thanks Markus.