Logic

Signal Name Total Pterms Signals Used Functional Block Macrocell Power Mode Slew Rate Pin Number Pin Type Pin Use Reg Init State
AVR_AD<4> 4 12 FB1 MC1 STD FAST 40 I/O I/O  
AVR_AD<5> 4 12 FB1 MC2 STD FAST 41 I/O I/O  
AVR_AD<7> 4 12 FB1 MC3 STD FAST 43 I/O/GCK1 I/O  
AVR_AD<6> 4 12 FB1 MC4 STD FAST 42 I/O I/O  
$OpTx$FX_DC$1 2 2 FB1 MC7 STD   1 I/O/GCK3 I  
Bank_Reg<7> 2 10 FB1 MC8 STD   3 I/O I RESET
Bank_Reg<6> 2 10 FB1 MC9 STD   5 I/O I RESET
Bank_Reg<5> 2 10 FB1 MC10 STD   6 I/O I RESET
Bank_Reg<4> 2 10 FB1 MC11 STD   7 I/O I RESET
Bank_Reg<3> 2 10 FB1 MC12 STD   8 I/O I RESET
Bank_Reg<2> 2 10 FB1 MC13 STD   12 I/O I RESET
Bank_Reg<1> 2 10 FB1 MC14 STD   13 I/O I RESET
SPI_CS<0> 2 10 FB1 MC15 STD FAST 14 I/O I/O RESET
SPI_CS<1> 2 10 FB1 MC16 STD FAST 16 I/O I/O RESET
SPI_CS<2> 2 10 FB1 MC17 STD FAST 18 I/O I/O RESET
Bank_Reg<0> 2 10 FB1 MC18 STD     (b) (b) RESET
AVR_AD<3> 4 12 FB2 MC1 STD FAST 39 I/O I/O  
AVR_AD<2> 4 12 FB2 MC2 STD FAST 38 I/O I/O  
AVR_AD<0> 4 12 FB2 MC3 STD FAST 36 I/O/GTS1 I/O  
AVR_AD<1> 4 12 FB2 MC4 STD FAST 37 I/O I/O  
SRAM_AH<0> 2 3 FB2 MC5 STD FAST 34 I/O/GTS2 O  
SRAM_AH<1> 2 3 FB2 MC6 STD FAST 33 I/O/GSR O  
SRAM_AH<2> 2 3 FB2 MC7 STD FAST 32 I/O O  
SRAM_AH<3> 2 3 FB2 MC8 STD FAST 31 I/O O  
MMD_CS<1> 3 8 FB2 MC9 STD FAST 30 I/O O  
MMD_CS<0> 1 8 FB2 MC10 STD FAST 29 I/O O  
FTDI_WR 1 9 FB2 MC11 STD FAST 28 I/O O  
FTDI_RD 1 9 FB2 MC12 STD FAST 27 I/O O  
SPI_CS<7> 2 10 FB2 MC13 STD FAST 23 I/O I/O RESET
SPI_CS<6> 2 10 FB2 MC14 STD FAST 22 I/O I/O RESET
SPI_CS<5> 2 10 FB2 MC15 STD FAST 21 I/O I/O RESET
SPI_CS<4> 2 10 FB2 MC16 STD FAST 20 I/O I/O RESET
SPI_CS<3> 2 10 FB2 MC17 STD FAST 19 I/O I/O RESET