/*
--------------------------------------------------------------------------
TCF - 24-bit Timer/Counter for frequency generation
--------------------------------------------------------------------------
*/

/* 24-bit Timer/Counter for frequency generation */
typedef struct TCF_struct
{
    register8_t CTRLA;  /* Control A */
    register8_t CTRLB;  /* Control B */
    register8_t CTRLC;  /* Control C */
    register8_t CTRLD;  /* Control D */
    register8_t EVCTRL;  /* Event Control */
    register8_t INTCTRL;  /* Interrupt Control */
    register8_t INTFLAGS;  /* Interrupt Flags */
    register8_t STATUS;  /* Status */
    register8_t reserved_1[5];
    register8_t DBGCTRL;  /* Debug Control */
    register8_t reserved_2[2];
    _DWORDREGISTER(CNT);  /* Count */
    _DWORDREGISTER(CMP);  /* Compare */
    register8_t reserved_3[8];
} TCF_t;

/* Clock Select */
typedef enum TCF_CLKSEL_enum
{
    TCF_CLKSEL_CLKPER_gc = (0x00<<3),  /* Peripheral Clock */
    TCF_CLKSEL_EVENT_gc = (0x01<<3),  /* Event as clock source */
    TCF_CLKSEL_OSCHF_gc = (0x02<<3),  /* Internal High Frequency Oscillator */
    TCF_CLKSEL_OSC32K_gc = (0x03<<3),  /* Internal 32.768 kHz Oscillator */
    TCF_CLKSEL_PLL_gc = (0x05<<3)  /* PLL */
} TCF_CLKSEL_t;

/* Command select */
typedef enum TCF_CMD_enum
{
    TCF_CMD_NONE_gc = (0x00<<0),  /* No command */
    TCF_CMD_UPDATE_gc = (0x01<<0),  /* Force update */
    TCF_CMD_RESTART_gc = (0x02<<0)  /* Force restart */
} TCF_CMD_t;

/* Compare # Event Generation select */
typedef enum TCF_CMP0EV_enum
{
    TCF_CMP0EV_PULSE_gc = (0x00<<6),  /* Event is generated as pulse */
    TCF_CMP0EV_WAVEFORM_gc = (0x01<<6)  /* Waveform is used as event output */
} TCF_CMP0EV_t;

/* Compare # Event Generation select */
typedef enum TCF_CMP1EV_enum
{
    TCF_CMP1EV_PULSE_gc = (0x00<<7),  /* Event is generated as pulse */
    TCF_CMP1EV_WAVEFORM_gc = (0x01<<7)  /* Waveform is used as event output */
} TCF_CMP1EV_t;

/* Event Action A select */
typedef enum TCF_EVACTA_enum
{
    TCF_EVACTA_RESTART_gc = (0x00<<1),  /* Restart Counter */
    TCF_EVACTA_BLANK_gc = (0x01<<1)  /* Mask waveform output to '0' */
} TCF_EVACTA_t;

/* Clock Prescaler select */
typedef enum TCF_PRESC_enum
{
    TCF_PRESC_DIV1_gc = (0x00<<1),  /* Runs directly on Clock Source */
    TCF_PRESC_DIV2_gc = (0x01<<1),  /* Divide clock source by 2 */
    TCF_PRESC_DIV4_gc = (0x02<<1),  /* Divide clock source by 4 */
    TCF_PRESC_DIV8_gc = (0x03<<1),  /* Divide clock source by 8 */
    TCF_PRESC_DIV16_gc = (0x04<<1),  /* Divide clock source by 16 */
    TCF_PRESC_DIV32_gc = (0x05<<1),  /* Divide clock source by 32 */
    TCF_PRESC_DIV64_gc = (0x06<<1),  /* Divide clock source by 64 */
    TCF_PRESC_DIV128_gc = (0x07<<1)  /* Divide clock source by 128 */
} TCF_PRESC_t;

/* Waveform Generation Mode select */
typedef enum TCF_WGMODE_enum
{
    TCF_WGMODE_FRQ_gc = (0x00<<0),  /* Frequency */
    TCF_WGMODE_NCOPF_gc = (0x01<<0),  /* Numerically Controlled Oscillator Pulse-Frequency */
    TCF_WGMODE_NCOFDC_gc = (0x02<<0),  /* Numerically Controlled Oscillator Fixed Duty Cycle */
    TCF_WGMODE_PWM8_gc = (0x07<<0)  /* 8-bit PWM */
} TCF_WGMODE_t;

/* Waveform Generation Pulse Length select */
typedef enum TCF_WGPULSE_enum
{
    TCF_WGPULSE_CLK1_gc = (0x00<<4),  /* High pulse duration is 1 clock period */
    TCF_WGPULSE_CLK2_gc = (0x01<<4),  /* High pulse duration is 2 clock period */
    TCF_WGPULSE_CLK4_gc = (0x02<<4),  /* High pulse duration is 4 clock period */
    TCF_WGPULSE_CLK8_gc = (0x03<<4),  /* High pulse duration is 8 clock period */
    TCF_WGPULSE_CLK16_gc = (0x04<<4),  /* High pulse duration is 16 clock period */
    TCF_WGPULSE_CLK32_gc = (0x05<<4),  /* High pulse duration is 32 clock period */
    TCF_WGPULSE_CLK64_gc = (0x06<<4),  /* High pulse duration is 64 clock period */
    TCF_WGPULSE_CLK128_gc = (0x07<<4)  /* High pulse duration is 128 clock period */
} TCF_WGPULSE_t;

/* Waveform Output # Polarity select */
typedef enum TCF_WO0POL_enum
{
    TCF_WO0POL_NORMAL_gc = (0x00<<2),  /* Waveform output set on update and cleared on match */
    TCF_WO0POL_INVERSE_gc = (0x01<<2)  /* Waveform output cleared on update and set on match */
} TCF_WO0POL_t;

/* Waveform Output # Polarity select */
typedef enum TCF_WO1POL_enum
{
    TCF_WO1POL_NORMAL_gc = (0x00<<3),  /* Waveform output set on update and cleared on match */
    TCF_WO1POL_INVERSE_gc = (0x01<<3)  /* Waveform output cleared on update and set on match */
} TCF_WO1POL_t;