----------------------------------------------------------------------------------
-- Company: www.Circuit-Break.de
-- Engineer: Jens Weiss
-- 
-- Create Date:    13:36:13 02/21/2024 
-- Design Name: 
-- Module Name:    Parameter_memory - Behavioral 
-- Project Name: 
-- Target Devices: 
-- Tool versions: 
-- Description: 
--
-- Dependencies: 
--
-- Revision: 
-- Revision 0.01 - File Created
-- Additional Comments: 
--
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;


entity Parameter_memory is
	Generic(ADRESSWIDTH : natural := 5;	--memory depth = 2^ADDRESSWIDTH
				 DATAWIDTH : natural := 16);
				  
	Port	(	clk	: in std_logic;
				A		: in std_logic_vector(ADRESSWIDTH-1 downto 0);
				Dout	: out std_logic_vector(DATAWIDTH-1 downto 0)
			);
end Parameter_memory;

architecture Behavioral of Parameter_memory is
	
	signal RomAddr  : integer range 0 to (2**ADRESSWIDTH)-1;	
	type Rom is array (0 to (2**ADRESSWIDTH)-1) of signed (DATAWIDTH-1 downto 0); 
	constant Parameter_Rom : Rom := (
   x"C0F8",  -- Parameter: a1	| Adress: 00000
	x"0000",  -- Parameter: a2	| Adress: 00001
	x"0000",  -- Parameter: a3	| Adress: 00010
	x"0000",  -- Parameter: a4	| Adress: 00011
	x"F6CE",  -- Parameter: a5	| Adress: 00100
	x"3F08",  -- Parameter: b1	| Adress: 00101
	x"0000",  -- Parameter: b2	| Adress: 00110
	x"0000",  -- Parameter: b3	| Adress: 00111
	x"0000",  -- Parameter: b4	| Adress: 01000
	x"2999",  -- Parameter: b5	| Adress: 01001
	x"0000",  -- Parameter: c1	| Adress: 01010
	x"0000",  -- Parameter: c2	| Adress: 01011
	x"0000",  -- Parameter: c3	| Adress: 01100
	x"0000",  -- Parameter: c4	| Adress: 01101
	x"0000",  -- Parameter: d13	| Adress: 01110
	x"0000",  -- Parameter: d14	| Adress: 01111
   x"20A8",  -- Parameter: d15	| Adress: 10000
	x"0000",  -- Parameter: d24	| Adress: 10001
	x"0000",  -- Parameter: d25	| Adress: 10010
	x"0000",  -- Parameter: d35	| Adress: 10011
	x"0000",  -- Parameter: e21	| Adress: 10100
	x"0000",  -- Parameter: e31	| Adress: 10101
	x"0000",  -- Parameter: e32	| Adress: 10110
	x"0000",  -- Parameter: e41	| Adress: 10111
	x"0000",  -- Parameter: e42	| Adress: 11000
	x"0000",  -- Parameter: e43	| Adress: 11001
	x"0000",  -- Parameter: dummy	| Adress: 11010
	x"0000",  -- Parameter: dummy	| Adress: 11011
	x"0000",  -- Parameter: dummy	| Adress: 11100
	x"0000",  -- Parameter: dummy	| Adress: 11101
	x"0000",  -- Parameter: dummy	| Adress: 11110
	x"0000"	  -- Parameter: dummy	| Adress: 11111
	);
	 
begin
	--BROM      
   process begin
     wait until rising_edge(clk);
     RomAddr <= to_integer(unsigned(A)); -- clocked address --> BRAM
   end process;
   Dout <= std_logic_vector(Parameter_Rom(RomAddr));

end Behavioral;