library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;


entity TIMING is

  port (   
  
  RW_INIT : out std_logic );	-- R/w Ausgang

end TIMING;

------------------------------------------------------------------------------------------------------------------------------------

architecture VERHALTEN of TIMING is

type ZUSTAENDE is (Y0,Y1,Y2);
signal ZUSTAND, FOLGE_Y : ZUSTAENDE;

signal CLK_1_MHZ, INIT_BUTTON :  std_logic;

signal ZW_ZUSTAND : boolean;
------------------------------------------------------------------------------------------------------------------------------------
begin
  
TIMING_SPEICHER: process (INIT_BUTTON)
  begin
    
       if INIT_BUTTON = '0' then ZUSTAND <= Y0;   --INIT_BUTTON -> nicht gedrueckt
    
        elsif falling_edge (INIT_BUTTON) then ZUSTAND <= Y1;
                                                   
        if falling_edge (CLK_1_MHZ)  then 

		ZW_ZUSTAND <= true;
          
            ZUSTAND <= FOLGE_Y;    
                    
      end if;
      
 end if;       
  
end process TIMING_SPEICHER;
  
 
               
RW_REGISTER: process (ZUSTAND) 
begin   
          
case ZUSTAND is                 
      
  when Y0  => RW_INIT <= '0';
             
                      
                        
  when Y1  => if  ZW_ZUSTAND then   --Fallende Flanke INIT_BUTTON
              FOLGE_Y <= Y2;
              end if;  
                 
               
  when Y2  => RW_INIT <= '1';
                  
                 ZW_ZUSTAND <= false;                   
                         
               
end case;    
                    
 
end process RW_REGISTER;

--------------------------------------------------------Testbench---------------------------------------------------------------------------

TAKTGEN: process
begin	
 
  CLK_1_MHZ <= '1';
  wait for 500 ns;
  CLK_1_MHZ <= '0';
  wait for 500 ns;
  
 
end process TAKTGEN;


SET_INIT_BUTTON : process
begin
  
  INIT_BUTTON <= '0';
  wait for 10 us;
  INIT_BUTTON <= '1';
  wait for 10 us;
  INIT_BUTTON <= '0';
  wait for 10 us;
  
end process SET_INIT_BUTTON;  
  
  
  

------------------------------------------Ende der Testbench--------------------------------

end VERHALTEN;