;**************************************************************************** ;* * ;* 320 x 240 Pixel LCD Controller * ;* Version 4 * ;* * ;**************************************************************************** ; ; ATMega8 ; +--+-+--+ ; (!RESET)PC6 | |_| | PC5(ADC5 SCL) ; (RXD)PD0 | | PC4(ADC4 SDA) ; (TXD)PD1 | | PC3(ADC3) ; (INT0)PD2 | | PC2(ADC2) ; (INT1)PD3 | | PC1(ADC1) ; (XCK T0)PD4 | | PC0(ADC0) ; VCC | | GND ; GND | | AREF ; (XTAL1 TOSC1)PB6 | | AVcc ; (XTAL2 TOSC2)PB7 | | PB5(SCK) ; (T1)PD5 | | PB4(MISO) ; (AIN0)PD6 | | PB3(MOSI OC2) ; (AIN1)PD7 | | PB2(/SS OC1B) ; (ICP1)PB0 | | PB1(OC1A) ; +-------+ ; ; PB0 O PCLK ; PB1 O Kontrast ; PB2 O Load ; PB3 O Frame ; PB4 O AC ; PB5 O ONOFF ; PB6 O Quarz ; PB7 O Quarz ; PC0 O LCD_D0 ; PC1 O LCD_D1 ; PC2 O LCD_D2 ; PC3 O LCD_D3 ; PC4 O nc ; PC5 O nc ; PC6 O nc ; PD0 I RXD (pullup) ; PD1 I nc(pullup) ; PD2 I nc(pullup) ; PD3 I nc(pullup) ; PD4 I nc(pullup) ; PD5 I nc(pullup) ; PD6 I nc(pullup) ; PD7 I nc(pullup) .include "m8def.inc" ;Im Interrupt genutzte und geänderte Register: .def regsave =r2 .def clockL =r3 .def clockH =r4 .def X_Cnt =r5 .def XSaveL =r14 .def XSaveH =r15 .def tempi =r16 .def Y_Cnt =r17 .def C_Cnt =r18 ;zusätzlich: X und Z ;Sonstige Register: .def temp =r19 .def temp2 =r20 .def temp3 =r21 .def temp4 =r22 .def Cnt =r23 ;zusätzlich: Y ;PortB .equ CLOCK =0 ; Pixelclock .equ PWM =1 ; PWM für Contrast .equ LP =2 ; Latch Puls (HSync) .equ FRAME =3 ; First Line Marker (VSync) .equ ONOFF =5 ; LCD (VLCD) Enable ;Werte .equ Framerate =65 ; Refreshrate .equ F_CPU =16000000 ; CPU Freq .equ RX_Buffer =32 ; Interne Konstanten .equ HFREQ =Framerate*240 .equ TDIV =((F_CPU/8+(HFREQ)/2)/HFREQ) .equ CSize =24 .equ XSize =40 .equ YSize =10 .dseg Inhalt: .byte 960 ; eine Textzeile, 40 byte Länge und 24 Pixel Höhe ;**************************************************************************** ; Interrupt Vektoren ;**************************************************************************** .cseg .org 0 rjmp Reset .org OC2addr rjmp LCD_Line ;**************************************************************************** ; CPU Register Initialisierung ;**************************************************************************** Reset: ldi temp, low(RAMEND) out SPL, temp ;setup stack pointer ldi temp, high(RAMEND) out SPH, temp ;setup stack pointer ser temp ;set register -> 0xFF out DDRB, temp ;PCLK, LOAD, FLM, M, ONOFF out DDRC, temp ;D0 - D3 out PORTD, temp ;RXD (UART) ;Timer 1 (16 bit) zur Kontrastregelung ldi temp, (1< 62,5kHz PWM out TCCR1B, temp ;Timer Counter Control Register 1B (Timer 1) ldi temp, 128 ;low byte des 16 bit Vergleichswertes out OCR1AL, temp ;Output Compare Register Timer 1A Low ;Timer 2 (8 bit) zur Interruptsteuerung für LCD ldi temp, (1<