Code basiert sich auf dem von ATMEL. System läft auf 32 MHz. Vref = VCC/1,6 / Move stored calibration values to ADC A. ADC_CalibrationValues_Load(&ADCA); // Set up ADC A to have signed conversion mode and 8 bit resolution. ADC_ConvMode_and_Resolution_Config(&ADCA, ADC_ConvMode_Unsigned, ADC_RESOLUTION_8BIT_gc); // Set sample rate ADC_Prescaler_Config(&ADCA, ADC_PRESCALER_DIV32_gc); // Set referance voltage on ADC A to be VCC/1.6 = 2V. ADC_Reference_Config(&ADCA, ADC_REFSEL_VCC_gc); // Get offset value for ADC A. ADC_Ch_InputMode_and_Gain_Config(&ADCA.CH0, ADC_CH_INPUTMODE_DIFF_gc, //ADC_CH_INPUTMODE_SINGLEENDED_gc, ADC_DRIVER_CH_GAIN_NONE); ADC_Ch_InputMode_and_Gain_Config(&ADCA.CH1, ADC_CH_INPUTMODE_DIFF_gc, //ADC_CH_INPUTMODE_SINGLEENDED_gc, ADC_DRIVER_CH_GAIN_NONE); ADC_Ch_InputMode_and_Gain_Config(&ADCA.CH2, ADC_CH_INPUTMODE_DIFF_gc, //ADC_CH_INPUTMODE_SINGLEENDED_gc, ADC_DRIVER_CH_GAIN_NONE); ADC_Ch_InputMode_and_Gain_Config(&ADCA.CH3, ADC_CH_INPUTMODE_DIFF_gc, //ADC_CH_INPUTMODE_SINGLEENDED_gc, ADC_DRIVER_CH_GAIN_NONE); //ADC_Ch_InputMux_Config(&ADCA.CH0, ADC_CH_MUXPOS_PIN4_gc, 0); //ADC_Ch_InputMux_Config(&ADCA.CH1, ADC_CH_MUXPOS_PIN5_gc, 0); //ADC_Ch_InputMux_Config(&ADCA.CH2, ADC_CH_MUXPOS_PIN6_gc, 0); //ADC_Ch_InputMux_Config(&ADCA.CH3, ADC_CH_MUXPOS_PIN7_gc, 0); ADC_Ch_InputMux_Config(&ADCA.CH0, ADC_CH_MUXPOS_PIN4_gc, ADC_CH_MUXNEG_PIN0_gc); ADC_Ch_InputMux_Config(&ADCA.CH1, ADC_CH_MUXPOS_PIN5_gc, ADC_CH_MUXNEG_PIN0_gc); ADC_Ch_InputMux_Config(&ADCA.CH2, ADC_CH_MUXPOS_PIN6_gc, ADC_CH_MUXNEG_PIN0_gc); ADC_Ch_InputMux_Config(&ADCA.CH3, ADC_CH_MUXPOS_PIN7_gc, ADC_CH_MUXNEG_PIN0_gc); ADCA.CTRLA |= ADC_ENABLE_bm | ADC_CH0START_bm | ADC_CH1START_bm | ADC_CH2START_bm | ADC_CH3START_bm; ADC_Wait_32MHz(&ADCA); ADCA.CTRLB = ADC_FREERUN_bm ; _delay_us(10); // ohne die Zeile liegt Offest bei 90 LSB, mit bei 10 LSB adc_ch0 = ADCA.CH0RESL; adc_ch1 = ADCA.CH1RESL; adc_ch2 = ADCA.CH2RESL; adc_ch3 = ADCA.CH3RESL; ADC_Disable(&ADCA); // Text Ausgabe per UART