Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 

 
Software Version and Target Device
Product Version: ISE:11.5 (WebPack) Target Family: virtex4
OS Platform: NT Target Device: xc4vlx25
Project ID (random number) de0cd291e4c04f20ad13d7e9b4b6b527.dc439d303cd04b3887b068b9045fdcf0.1 Target Package: sf363
Registration ID e Target Speed: -11
Date Generated Do 5. Aug 09:51:23 2010
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Counters=1
  • 4-bit up counter=1
MiscellaneousStatistics
  • AGG_BONDED_IO=5
  • AGG_IO=5
  • AGG_SLICE=2
  • NUM_4_INPUT_LUT=3
  • NUM_BONDED_IOB=5
  • NUM_BUFG=1
  • NUM_SLICEL=2
  • NUM_SLICE_FF=4
NetStatistics
  • NumNets_Active=20
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEIN=4
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_CLKPIN=18
  • NumNodesOfType_Active_DOUBLE=22
  • NumNodesOfType_Active_GLOBAL=3
  • NumNodesOfType_Active_HUNIHEX=7
  • NumNodesOfType_Active_INPUT=11
  • NumNodesOfType_Active_IOBIN2OUT=1
  • NumNodesOfType_Active_IOBINPUT=4
  • NumNodesOfType_Active_IOBOUTPUT=5
  • NumNodesOfType_Active_OMUX=10
  • NumNodesOfType_Active_OUTBOUND=6
  • NumNodesOfType_Active_OUTPUT=13
  • NumNodesOfType_Active_PADINPUT=4
  • NumNodesOfType_Active_PADOUTPUT=1
  • NumNodesOfType_Active_PINBOUNCE=5
  • NumNodesOfType_Active_PINFEED=44
  • NumNodesOfType_Active_UNUSED=1
  • NumNodesOfType_Active_VLONG=4
  • NumNodesOfType_Active_VUNIHEX=13
  • NumNodesOfType_Gnd_BOUNCEIN=3
  • NumNodesOfType_Gnd_HGNDOUT=1
  • NumNodesOfType_Gnd_INPUT=6
  • NumNodesOfType_Gnd_PINFEED=6
  • NumNodesOfType_Vcc_HVCCOUT=8
  • NumNodesOfType_Vcc_INPUT=17
  • NumNodesOfType_Vcc_KVCCOUT=9
  • NumNodesOfType_Vcc_PINFEED=17
SiteStatistics
  • BUFG-BUFGCTRL=1
  • IOB-IOBM=2
  • IOB-IOBS=3
  • SLICEL-SLICEM=1
SiteSummary
  • BUFG=1
  • BUFG_GCLK_BUFFER=1
  • DCM_ADV=8
  • DCM_ADV_DCM_ADV=8
  • IOB=5
  • IOB_INBUF=1
  • IOB_OUTBUF=4
  • IOB_PAD=5
  • PMV=1
  • PMV_PMV=1
  • SLICEL=2
  • SLICEL_F=1
  • SLICEL_FFX=2
  • SLICEL_FFY=2
  • SLICEL_G=2
 
Configuration Data
DCM_ADV
  • CTLMODE=[CTLMODE:8] [CTLMODE_INV:0]
  • PSEN=[PSEN_INV:8] [PSEN:0]
DCM_ADV_DCM_ADV
  • BGM_CONFIG_REF_SEL=[CLKIN:8]
  • BGM_DIVIDE=[16:8]
  • BGM_LDLY=[5:8]
  • BGM_MODE=[BG_SNAPSHOT:8]
  • BGM_MULTIPLY=[16:8]
  • BGM_SAMPLE_LEN=[2:8]
  • BGM_SDLY=[3:8]
  • BGM_VADJ=[5:8]
  • BGM_VLDLY=[7:8]
  • BGM_VSDLY=[0:8]
  • CLKDV_DIVIDE=[2.0:8]
  • CLKFX_DIVIDE=[1:8]
  • CLKFX_MULTIPLY=[4:8]
  • CLKIN_DIVIDE_BY_2=[TRUE:8]
  • CLKOUT_PHASE_SHIFT=[FIXED:8]
  • CLK_FEEDBACK=[1X:8]
  • CTLMODE=[CTLMODE:8] [CTLMODE_INV:0]
  • DCM_CLKDV_CLKFX_ALIGNMENT=[TRUE:8]
  • DCM_EXT_FB_EN=[FALSE:8]
  • DCM_LOCK_HIGH=[FALSE:8]
  • DCM_PERFORMANCE_MODE=[MAX_SPEED:8]
  • DCM_UNUSED_TAPS_POWERDOWN=[FALSE:8]
  • DCM_VREF_SOURCE=[VBG_DLL:8]
  • DCM_VREG_ENABLE=[FALSE:8]
  • DESKEW_ADJUST=[17:8]
  • DFS_AVE_FREQ_ADJ_INTERVAL=[3:8]
  • DFS_AVE_FREQ_GAIN=[2.0:8]
  • DFS_AVE_FREQ_SAMPLE_INTERVAL=[2:8]
  • DFS_COARSE_SEL=[LEGACY:8]
  • DFS_EARLY_LOCK=[FALSE:8]
  • DFS_EN_RELRST=[TRUE:8]
  • DFS_EXTEND_FLUSH_TIME=[FALSE:8]
  • DFS_EXTEND_HALT_TIME=[FALSE:8]
  • DFS_EXTEND_RUN_TIME=[FALSE:8]
  • DFS_FINE_SEL=[LEGACY:8]
  • DFS_FREQUENCY_MODE=[LOW:8]
  • DFS_NON_STOP=[FALSE:8]
  • DFS_OSCILLATOR_MODE=[PHASE_FREQ_LOCK:8]
  • DFS_SKIP_FINE=[FALSE:8]
  • DFS_TP_SEL=[LEVEL:8]
  • DFS_TRACKMODE=[1:8]
  • DLL_CONTROL_CLOCK_SPEED=[HALF:8]
  • DLL_CTL_SEL_CLKIN_DIV2=[FALSE:8]
  • DLL_DESKEW_LOCK_BY1=[FALSE:8]
  • DLL_FREQUENCY_MODE=[LOW:8]
  • DLL_PD_DLY_SEL=[0:8]
  • DLL_PERIOD_LOCK_BY1=[FALSE:8]
  • DLL_PHASE_DETECTOR_AUTO_RESET=[TRUE:8]
  • DLL_PHASE_DETECTOR_MODE=[ENHANCED:8]
  • DLL_PHASE_SHIFT_CALIBRATION=[AUTO_DPS:8]
  • DLL_PHASE_SHIFT_LOCK_BY1=[FALSE:8]
  • DUTY_CYCLE_CORRECTION=[TRUE:8]
  • PMCD_SYNC=[FALSE:8]
  • PSEN=[PSEN_INV:8] [PSEN:0]
  • STARTUP_WAIT=[FALSE:8]
IOB_PAD
  • DRIVEATTRBOX=[12:4]
  • IOATTRBOX=[LVCMOS25:5]
  • SLEW=[SLOW:4]
SLICEL
  • BX=[BX_INV:1] [BX:0]
  • CLK=[CLK:2] [CLK_INV:0]
SLICEL_FFX
  • CK=[CK:2] [CK_INV:0]
  • D=[D:1] [D_INV:1]
  • FFX_INIT_ATTR=[INIT0:2]
  • FFX_SR_ATTR=[SRLOW:2]
  • LATCH_OR_FF=[FF:2]
  • SYNC_ATTR=[ASYNC:2]
SLICEL_FFY
  • CK=[CK:2] [CK_INV:0]
  • D=[D:2] [D_INV:0]
  • FFY_INIT_ATTR=[INIT0:2]
  • FFY_SR_ATTR=[SRLOW:2]
  • LATCH_OR_FF=[FF:2]
  • SYNC_ATTR=[ASYNC:2]
 
Pin Data
BUFG
  • I0=1
  • O=1
BUFG_GCLK_BUFFER
  • IN=1
  • OUT=1
DCM_ADV
  • CLK0=8
  • CLKFB=8
  • CLKIN=8
  • CTLMODE=8
  • PSEN=8
DCM_ADV_DCM_ADV
  • CLK0=8
  • CLKFB=8
  • CLKIN=8
  • CTLMODE=8
  • PSEN=8
IOB
  • I=1
  • O=4
  • PAD=5
IOB_INBUF
  • OUT=1
  • PAD=1
IOB_OUTBUF
  • IN=4
  • OUT=4
IOB_PAD
  • PAD=5
PMV
  • A0=1
  • A1=1
  • A2=1
  • A3=1
  • A4=1
  • A5=1
  • EN=1
  • ODIV4=1
PMV_PMV
  • A0=1
  • A1=1
  • A2=1
  • A3=1
  • A4=1
  • A5=1
  • EN=1
  • ODIV4=1
SLICEL
  • BX=1
  • CLK=2
  • F1=1
  • F2=1
  • F3=1
  • F4=1
  • G1=2
  • G2=2
  • G3=1
  • XQ=2
  • YQ=2
SLICEL_F
  • A1=1
  • A2=1
  • A3=1
  • A4=1
  • D=1
SLICEL_FFX
  • CK=2
  • D=2
  • Q=2
SLICEL_FFY
  • CK=2
  • D=2
  • Q=2
SLICEL_G
  • A1=2
  • A2=2
  • A3=1
  • D=2
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc4vlx25-sf363-11 -global_opt off -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc4vlx25-sf363-11 -global_opt off -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 11 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • fuse
 
Software Quality
Run Statistics
_impact 225 164 0 0 0 0 0
arwz 13 13 0 0 0 0 0
bitgen 456 455 0 0 0 0 0
edif2ngd 26 26 0 0 0 0 0
map 562 509 0 0 0 0 0
netgen 28 28 0 0 0 0 0
ngc2edif 8 8 0 0 0 0 0
ngcbuild 26 26 0 0 0 0 0
ngdbuild 643 642 0 0 0 0 0
obngc 8 8 0 0 0 0 0
par 509 477 30 0 0 0 0
trce 477 476 0 0 0 0 0
xst 825 824 0 0 0 0 0
 
Help Statistics
Search words with results
Generate Multiple Hierarchical Netlist ( 1 ) priority ( 1 )
Unsuccessful Search words
iodelay ( 1 )
Help files
/doc/usenglish/isehelp/ise_c_implement_fpga_design.htm ( 1 ) /doc/usenglish/isehelp/ise_c_overview.htm ( 1 )
/doc/usenglish/isehelp/ise_n_constraints_guide.htm ( 1 ) /doc/usenglish/isehelp/ise_p_using_smartguide.htm ( 1 )
/doc/usenglish/isehelp/ite_c_overview.htm ( 1 ) /doc/usenglish/isehelp/pce_c_timing_constraints_tab.htm ( 1 )
/doc/usenglish/isehelp/pce_db_clocktopad-dialog.htm ( 1 ) /doc/usenglish/isehelp/pce_db_operatingconditions-dialog.htm ( 1 )
/doc/usenglish/isehelp/pce_db_period-dialog.htm ( 1 ) /doc/usenglish/isehelp/pce_p_registers_in_iob.htm ( 2 )
/doc/usenglish/isehelp/pce_p_using_constraints_create.htm ( 1 ) /doc/usenglish/isehelp/pce_p_using_constraints_enable.htm ( 1 )
/doc/usenglish/isehelp/pim_db_programming_properties.htm ( 1 ) /doc/usenglish/isehelp/pn_c_setting_advanced_properties.htm ( 1 )
/doc/usenglish/isehelp/pn_db_nsw_summary.htm ( 1 ) /doc/usenglish/isehelp/pn_p_setting_ucf_file_editor_preferences.htm ( 1 )
/doc/usenglish/isehelp/pn_p_showing_hiding_toolbars.htm ( 1 ) /doc/usenglish/isehelp/pn_r_design_panel.htm ( 1 )
/doc/usenglish/isehelp/pp_db_translate_properties.htm ( 1 ) /doc/usenglish/isehelp/pp_p_process_simulate_post_place.htm ( 1 )
/doc/usenglish/isehelp/spartan6/libs_le_ibuf.htm ( 1 ) /doc/usenglish/isehelp/sse_c_overview.htm ( 2 )
/doc/usenglish/isehelp/sse_db_obj_prop_attributes.htm ( 1 ) /doc/usenglish/isehelp/sse_p_adding_xilinx_constraints.htm ( 1 )
/doc/usenglish/isehelp/virtex4/libs_le_ibufds.htm ( 1 ) /doc/usenglish/isehelp/virtex4/libs_le_iddr.htm ( 1 )
/doc/usenglish/wizards/arwz/awz_db_dcmgen_virtex4.htm ( 1 )
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=ISim (VHDL/Verilog)
PROP_Top_Level_Module_Type=Schematic PROP_PreferredLanguage=Verilog
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_SCHEMATIC=1 FILE_UCF=1
FILE_VERILOG=2 PROP_AutoTop=false
PROP_DevDevice=xc4vlx25 PROP_DevFamily=Virtex4
PROP_DevSpeed=-11 PROP_FitterReportFormat=HTML
PROP_Top_Level_Module_Type=Schematic PROP_UserConstraintEditorPreference=Constraints Editor
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_lockPinsUcfFile=changed Project duration(days)=0
 
 
ISim Statistics
Xilinx HDL Libraries Used=
Fuse Resource Usage=140 ms, 62616 KB
Total Signals=10
Total Nets=13
Total Blocks=3
Total Processes=10
Total Simulation Time=1 us
Simulation Resource Usage=0 sec, 307929 KB
Simulation Mode=gui