EXTERNAL PORTS

These are the external ports defined in the MHS file.

Attributes Key The attributes are obtained from the SIGIS and IOB_STATE parameters set on the PORT in the MHS file CLK  indicates Clock ports, (SIGIS = CLK)  INTR  indicates Interrupt ports,(SIGIS = INTR)  RESET  indicates Reset ports, (SIGIS = RST)  BUF or REG  Indicates ports that instantiate or infer IOB primitives, (IOB_STATE = BUF or REG)

# NAME DIR [LSB:MSB] SIG ATTRIBUTES fpga_0_USB_UART_RX_pin I 1 fpga_0_USB_UART_RX fpga_0_USB_UART_TX_pin O 1 fpga_0_USB_UART_TX fpga_0_LEDS_4BIT_GPIO_IO_pin IO 0:3 fpga_0_LEDS_4BIT_GPIO_IO fpga_0_CS_PUSH_3BIT_GPIO_in_pin I 0:2 fpga_0_CS_PUSH_3BIT_GPIO_in fpga_0_TEMP_SENSOR_Scl_pin IO 1 fpga_0_TEMP_SENSOR_Scl fpga_0_TEMP_SENSOR_Sda_pin IO 1 fpga_0_TEMP_SENSOR_Sda fpga_0_FLASH_2Mx16_Mem_DQ_pin IO 0:15 fpga_0_FLASH_2Mx16_Mem_DQ fpga_0_FLASH_2Mx16_Mem_A_pin O 10:30 fpga_0_FLASH_2Mx16_Mem_A fpga_0_FLASH_2Mx16_Mem_WEN_pin O 1 fpga_0_FLASH_2Mx16_Mem_WEN fpga_0_FLASH_2Mx16_Mem_OEN_pin O 0:0 fpga_0_FLASH_2Mx16_Mem_OEN fpga_0_FLASH_2Mx16_Mem_CEN_pin O 0:0 fpga_0_FLASH_2Mx16_Mem_CEN fpga_0_FLASH_2Mx16_Mem_RPN_pin O 1 fpga_0_FLASH_2Mx16_Mem_RPN fpga_0_FLASH_2Mx16_BYTEn_pin O 1 net_vcc sys_clk_pin I 1 dcm_clk_s  CLK  sys_rst_pin I 1 sys_rst_s  RESET