library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_UNSIGNED.ALL; use IEEE.STD_LOGIC_ARITH.all; entity ac97 is end ac97; architecture rtl of ac97 is signal CLK : STD_LOGIC := '0'; signal AC97_BIT_CLK : STD_LOGIC := '0'; signal AC97_SDATA_OUT : STD_LOGIC := '0'; signal AC97_RESET : STD_LOGIC := '1'; signal AC97_SYNC : STD_LOGIC := '0'; signal bit_count : natural range 0 to 255; signal frame_count : natural range 0 to 12 := 0; signal command_address : std_logic_vector (19 downto 0); signal command_data : std_logic_vector (19 downto 0); signal reset_count : std_logic_vector (7 downto 0) := "00000000"; begin process(CLK) begin if (CLK'event and CLK ='1') then if ( reset_count >= 255 ) then AC97_RESET <= '0'; else reset_count <= reset_count + 1; end if; end if; end process; process(AC97_BIT_CLK) begin if ((AC97_BIT_CLK'event and AC97_BIT_CLK ='1') and (reset_count >= 255)) then if ( bit_count <= 15 ) then AC97_SYNC <= '1'; else AC97_SYNC <= '0'; end if; if (( bit_count >= 0) and (bit_count <= 15)) then --Slot0-Tag case bit_count is when 0 => AC97_SDATA_OUT <= '1'; when 1 => AC97_SDATA_OUT <= '1'; when 2 => AC97_SDATA_OUT <= '1'; when others => AC97_SDATA_OUT <= '0'; end case; elsif (( bit_count >= 16) and (bit_count <= 35)) then AC97_SDATA_OUT <= command_address(bit_count); frame_count <= frame_count + 1; elsif (( bit_count >= 36) and (bit_count <= 55)) then AC97_SDATA_OUT <= command_data(bit_count); frame_count <= frame_count + 1; else AC97_SDATA_OUT <= '0'; end if; if ( bit_count <= 255 ) then bit_count <= bit_count + 1; else bit_count <= 0; end if; end if; end process; bla: process(frame_count) begin case frame_count is when 0 => command_address <= "00000010000000000000"; --Unmute Line-Outputs command_data <= "00000000000000000000"; when 1 => command_address <= "00000100000000000000"; --Unmute Headphones command_data <= "00000000000000000000"; when 2 => command_address <= "00001010000000000000"; --Unmute Line-Inputs command_data <= "00011111000111110000"; when others => command_address <= "10000000000000000000"; command_data <= "00000000000000000000"; end case; end process bla; process begin AC97_BIT_CLK <= '0'; wait for 25 ns; AC97_BIT_CLK <= '1'; wait for 25 ns; end process; process begin clk <= '0'; wait for 5 ns; clk <= '1'; wait for 5 ns; end process; end rtl;