/*DMX Sender mit einem AVR nach Julien Mintenbeck + Hendrik Hölscher für ATmega8515 */ //DEFINES************************************************************************* .INCLUDE "M32DEF.INC" .DEVICE ATmega32 .DEF S_save = R2 //SREG Puffer .DEF temp = R16 //standart .DEF tempH = R17 .DEF tempL = R18 //Y-Pointer used for memory operations .EQU BREAK_LENGTH = 87 //Timer value for 89µs .EQU MARK_LENGTH = 20 //Value for 8µs MARK .EQU RAMSTART = 0x60 //SRAM-Startaddress .EQU CHANNELS = 1//60 //Anzahl der zu sendenen Kanäle .EQU fck = 8000000 //Crystal .EQU fbd = 250000 //Baudrate UART .EQU bddv = (fck/(16*fbd))-1//Wert für Baudraten-Teiler .CSEG //Program Flash //INITS*************************************************************************** .org 0x000 RJMP Init .org 0x002 RJMP EXT_INT0 //IRQ0 Handler .org 0x004 RJMP EXT_INT1 //IRQ1 Handler .org 0x006 RJMP EXT_INT2 //IRQ2 Handler .org 0x008 RJMP TIM2_COMP //Timer2 Compare Handler .org 0x00A RJMP TIM2_OVF //Timer2 Overflow Handler .org 0x00C RJMP TIM1_CAPT //Timer1 Capture Handler .org 0x00E RJMP TIM1_COMPA //Timer1 CompareA Handler .org 0x010 RJMP TIM1_COMPB //Timer1 CompareB Handler .org 0x012 RJMP TIM1_OVF //Timer1 Overflow Handler .org 0x014 RJMP TIM0_COMP //Timer0 Compare Handler .org 0x016 RJMP T0_Over //Timer0 Overflow Handler .org 0x018 RJMP SPI_STC //SPI Transfer Complete Handler .org 0x01A RJMP USART_RXC //USART RX Complete Handler .org 0x01C RJMP send_byte //UDR Empty Handler .org 0x01E RJMP USART_TXC //USART TX Complete Handler .org 0x020 RJMP _ADC //ADC Conversion Complete Handler .org 0x022 RJMP EE_RDY //EEPROM Ready Handler .org 0x028 RJMP SPM_RDY //Store Program Memory Reader Handler //MAIN**************************************************************************** Init: CLI //no interrupts LDI temp, LOW(RAMEND) //Endadresse_LOW SRAM OUT SPL, temp //nach Stapelzeiger_LOW LDI temp, HIGH(RAMEND) //Endadresse_HIGH OUT SPH, temp //nach Stapelzeiger_HIGH //PortD2 = INT0 LDI temp, 0x02 OUT DDRD, temp OUT PortD, temp //Timer0 CLR temp //alle Timer Interrupts unterbinden OUT TIMSK, temp //TimerInterruptMask-Register alle 0 = gesperrt SBR temp, (1< 1 tick = 1µs (prescaler) OUT TCCR0, temp //USART LDI temp, bddv //USART = 250kbaud @ 8Mhz OUT UBRRL, temp LDI temp, 0x00 OUT UBRRH, temp //USBS 1: 2StopBits LDI temp, (1 << URSEL) | (1 << USBS) | (1 << UCSZ0) | (1 << UCSZ1)//(1< 250 kein DMX-Signal ST Y+, temp //Speichere Rr direkt nach SRAM DEC tempL BRNE data_loop //Z-flag = 0? DEC tempH BRNE data_loop //Daten-Pointer auf letzten DMX-Wert SEI //Interrupts erlauben //DMX-daten senden**************************************************************** send_byte: IN S_save, SREG //SREG sichern PUSH temp CPI YL, LOW(RAMSTART + CHANNELS +1) BRNE sb1 //alle Kanäle gesendet? CPI YH, HIGH(RAMSTART + CHANNELS +1) BRNE sb1 //send BREAK CBI UCSRB, TXEN //ja, alles gesendet CBI UCSRB, UDRIE //sperrt USART TxD CBI PortD, PD1 //TxD-Pin auf Low (GND) ziehen LDI temp, BREAK_LENGTH COM temp //Timer-Offset berechnen OUT TCNT0, temp IN temp, TIFR SBR temp, (1<