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		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103066</id>
		<title>74xx</title>
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		<updated>2021-01-24T04:07:57Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Verwandt&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]]) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]] || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger || Inv&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC) || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) 15V || Decoder || 7448 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) || Decoder || 7447 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear || F-F || 7476 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear || F-F || 74175 74273 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear || F-F || 7473 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]] || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter || Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register || ShiftReg&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR || XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs || Decoder || 74138&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs || Decoder || 74137&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs || Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer || Decoder || 4514&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer, Quad 2-to-1 Line Select || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74164 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74161 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]] || Decoder || 4099&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear || F-F || 7474 74175 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || F-F || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || F-F || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || F-F || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || F-F || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || F-F || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4000 || 14 || 2 || Dual 3-input NOR gates and inverter || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || Quad 2-input NOR gates || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Hex inverters with level shifted outputs || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || Quad 2-input NAND gates || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || Dual 4-input NAND gates || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4014 || 16 || 1 || 8-bit parallel-in serial-out (PISO) shift register with three parallel outputs || ShiftReg || 74161 74164 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4015 || 16 || 2 || Dual 4-bit serial-in parallel-out (SIPO) shift register with asynchronous reset || ShiftReg || 74161 74164 4014&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4016 || 14 || 4 || Quad analog switches, bilateral || || 4066&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit asynchronous decade counter with fully decoded outputs, reset and both active high and active low clocks || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4018 || 16 || 1 || 5-stage (divide by 2,4,6,8 or 10) Johnson counter with preset inputs || Counter || 4518&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4021 || 16 || 1 || 8-bit parallel-in serial-out (PISO) shift register with asynchronous load input and three parallel outputs || ShiftReg || 4094&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || Triple 3-input NAND gates || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || Triple 3-input NOR gates  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || Quad 2-input XOR gates || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || 1 || 12-bit asynchronous binary counter with reset || Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4048 || 16 || 1 || 3-state 8-input multifunction gate&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Hex inverters with high-to-low level shifter inputs || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Hex buffers with high-to-low level shifter inputs || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || 1 || 8-to-1 line analog multiplexer/demultiplexer with dual power supply&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Quad analog switches, bilateral || || 4016&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-input AND/NAND gate with complementary outputs  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Hex inverters || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || Quad 2-input XOR gates || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || Quad 2-input OR gates || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || Dual 4-input OR gates || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || Triple 3-input AND gates || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || Triple 3-input OR gates || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || Quad 2-input XNOR gates || XNOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || Quad 2-input AND gates || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || Dual 4-input AND gates || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || Quad 2-input NAND gates with schmitt-trigger inputs || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Hex inverters with schmitt-trigger inputs || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || Dual 2-input open-collector NAND gates with buffered output || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40174 || ? || 6 || 6-bit D flip-flop with reset || F-F || 7474 74175 74273 4013&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || 2/4-bit 3-state noninverting buffer/line driver || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4510 || 16 || 2 || 4-bit synchronous decade up/down counter with asynchronous load, reset andripple carry output || Counter || 7490 74390 4017&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver || Decoder || 7447 7448 4056&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4512 || ? || ? || 8-to-1 line 3-state data selector/multiplexer with AND inputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4518 || 16 || 2 || Dual 4-bit asynchronous decade counters with reset and both active high andactive low clocks || Counter || 4018&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103065</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103065"/>
		<updated>2021-01-24T04:05:29Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Verwandt&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]]) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]] || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger || Inv&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC) || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) 15V || Decoder || 7448 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) || Decoder || 7447 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear || F-F || 7476 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear || F-F || 74175 74273 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear || F-F || 7473 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]] || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter || Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register || ShiftReg&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR || XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs || Decoder || 74138&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs || Decoder || 74137&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs || Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer || Decoder || 4514&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer, Quad 2-to-1 Line Select || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74164 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74161 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]] || Decoder || 4099&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear || F-F || 7474 74175 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || F-F || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || F-F || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || F-F || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || F-F || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || F-F || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || Quad 2-input NOR gates || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Hex inverters with level shifted outputs || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || Quad 2-input NAND gates || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || Dual 4-input NAND gates || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4014 || 16 || 1 || 8-bit parallel-in serial-out (PISO) shift register with three parallel outputs || ShiftReg || 74161 74164 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4015 || 16 || 2 || Dual 4-bit serial-in parallel-out (SIPO) shift register with asynchronous reset || ShiftReg || 74161 74164 4014&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4016 || 14 || 4 || Quad analog switches, bilateral || || 4066&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit asynchronous decade counter with fully decoded outputs, reset and both active high and active low clocks || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4018 || 16 || 1 || 5-stage (divide by 2,4,6,8 or 10) Johnson counter with preset inputs || Counter || 4518&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4021 || 16 || 1 || 8-bit parallel-in serial-out (PISO) shift register with asynchronous load input and three parallel outputs || ShiftReg || 4094&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || Triple 3-input NAND gates || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || Triple 3-input NOR gates  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || Quad 2-input XOR gates || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || 1 || 12-bit asynchronous binary counter with reset || Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4048 || 16 || 1 || 3-state 8-input multifunction gate&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Hex inverters with high-to-low level shifter inputs || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Hex buffers with high-to-low level shifter inputs || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || 1 || 8-to-1 line analog multiplexer/demultiplexer with dual power supply&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Quad analog switches, bilateral || || 4016&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-input AND/NAND gate with complementary outputs  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Hex inverters || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || Quad 2-input XOR gates || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || Quad 2-input OR gates || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || Dual 4-input OR gates || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || Triple 3-input AND gates || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || Triple 3-input OR gates || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || Quad 2-input XNOR gates || XNOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || Quad 2-input AND gates || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || Dual 4-input AND gates || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || Quad 2-input NAND gates with schmitt-trigger inputs || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Hex inverters with schmitt-trigger inputs || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || Dual 2-input open-collector NAND gates with buffered output || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40174 || ? || 6 || 6-bit D flip-flop with reset || F-F || 7474 74175 74273 4013&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || 2/4-bit 3-state noninverting buffer/line driver || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4510 || 16 || 2 || 4-bit synchronous decade up/down counter with asynchronous load, reset andripple carry output || Counter || 7490 74390 4017&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver || Decoder || 7447 7448 4056&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4512 || ? || ? || 8-to-1 line 3-state data selector/multiplexer with AND inputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4518 || 16 || 2 || Dual 4-bit asynchronous decade counters with reset and both active high andactive low clocks || Counter || 4018&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103064</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103064"/>
		<updated>2021-01-24T03:55:56Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Verwandt&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]]) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]] || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger || Inv&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC) || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) 15V || Decoder || 7448 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) || Decoder || 7447 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear || F-F || 7476 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear || F-F || 74175 74273 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear || F-F || 7473 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]] || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter || Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register || ShiftReg&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR || XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs || Decoder || 74138&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs || Decoder || 74137&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs || Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer || Decoder || 4514&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer, Quad 2-to-1 Line Select || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74164 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74161 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]] || Decoder || 4099&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear || F-F || 7474 74175 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || F-F || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || F-F || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || F-F || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || F-F || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || F-F || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4014 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 74161 74164 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4015 || 16 || 2 || 4-bit Shift Register SIPO || ShiftReg || 74161 74164 4014&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4016 || 14 || 4 || Quad analog switches, bilateral || || 4066&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4018 || 16 || 1 || BCD Counter, sync, presettable || Counter || 4518&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4021 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 4094&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Hex buffers with high-to-low level shifter inputs || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || 1 || 8-to-1 line analog multiplexer/demultiplexer with dual power supply&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Quad analog switches, bilateral || || 4016&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-input AND/NAND gate with complementary outputs  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Hex inverters || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || Quad 2-input XOR gates || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || Quad 2-input OR gates || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || Dual 4-input OR gates || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || Triple 3-input AND gates || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || Triple 3-input OR gates || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || Quad 2-input XNOR gates || XNOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || Quad 2-input AND gates || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || Dual 4-input AND gates || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || Quad 2-input NAND gates with schmitt-trigger inputs || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Hex inverters with schmitt-trigger inputs || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || Dual 2-input open-collector NAND gates with buffered output || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40174 || ? || 6 || 6-bit D flip-flop with reset || F-F || 7474 74175 74273 4013&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || 2/4-bit 3-state noninverting buffer/line driver || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4510 || 16 || 2 || 4-bit synchronous decade up/down counter with asynchronous load, reset andripple carry output || Counter || 7490 74390 4017&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver || Decoder || 7447 7448 4056&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4512 || ? || ? || 8-to-1 line 3-state data selector/multiplexer with AND inputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4518 || 16 || 2 || Dual 4-bit asynchronous decade counters with reset and both active high andactive low clocks || Counter || 4018&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103063</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103063"/>
		<updated>2021-01-24T02:54:00Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Verwandt&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]]) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]] || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger || Inv&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC) || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) 15V || Decoder || 7448 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) || Decoder || 7447 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear || F-F || 7476 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear || F-F || 74175 74273 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear || F-F || 7473 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]] || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter || Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register || ShiftReg&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR || XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs || Decoder || 74138&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs || Decoder || 74137&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs || Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer || Decoder || 4514&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer, Quad 2-to-1 Line Select || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74164 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74161 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]] || Decoder || 4099&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear || F-F || 7474 74175 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || F-F || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || F-F || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || F-F || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || F-F || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || F-F || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4014 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 74161 74164 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4015 || 16 || 2 || 4-bit Shift Register SIPO || ShiftReg || 74161 74164 4014&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4018 || 16 || 1 || BCD Counter, sync, presettable || Counter || 4518&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4021 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 4094&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Inverter || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2-Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40174 || ? || 6 || D-type Flip-Flop  || F-F || 7474 74175 74273 4013&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4510 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4017&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver || Decoder || 7447 7448 4056&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4512 || ? || ? || 8-ch Data Selector || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4518 || 16 || 2 || BCD Counter || Counter || 4018&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4520 || 16 || 2 || BCD/Binary Counter, sync, reset || Counter || 4516&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103062</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103062"/>
		<updated>2021-01-24T02:52:07Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]]) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]] || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger || Inv&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC) || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) 15V || Decoder || 7448 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) || Decoder || 7447 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear || F-F || 7476 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear || F-F || 74175 74273 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear || F-F || 7473 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]] || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter || Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register || ShiftReg&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR || XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs || Decoder || 74138&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs || Decoder || 74137&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs || Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer || Decoder || 4514&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer, Quad 2-to-1 Line Select || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74164 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74161 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]] || Decoder || 4099&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear || F-F || 7474 74175 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || F-F || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || F-F || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || F-F || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || F-F || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || F-F || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4014 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 74161 74164 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4015 || 16 || 2 || 4-bit Shift Register SIPO || ShiftReg || 74161 74164 4014&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4018 || 16 || 1 || BCD Counter, sync, presettable || Counter || 4518&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4021 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 4094&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Inverter || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2-Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40174 || ? || 6 || D-type Flip-Flop  || F-F || 7474 74175 74273 4013&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4510 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4017&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver || Decoder || 7447 7448 4056&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4512 || ? || ? || 8-ch Data Selector || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4518 || 16 || 2 || BCD Counter || Counter || 4018&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4520 || 16 || 2 || BCD/Binary Counter, sync, reset || Counter || 4516&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103061</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103061"/>
		<updated>2021-01-24T02:49:56Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]]) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]] || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger || Inv&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC) || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) 15V || Decoder || 7448 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) || Decoder || 7447 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear || F-F || 7476 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear || F-F || 74175 74273 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear || F-F- || 7473 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]] || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter || Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register || ShiftReg&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR || XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs || Decoder || 74138&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs || Decoder || 74137&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs || Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer || Decoder || 4514&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer, Quad 2-to-1 Line Select || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74164 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74161 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]] || Decoder || 4099&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear || F-F || 7474 74175 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || F-F || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || F-F || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || F-F || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || F-F || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || F-F || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4014 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 74161 74164 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4015 || 16 || 2 || 4-bit Shift Register SIPO || ShiftReg || 74161 74164 4014&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4018 || 16 || 1 || BCD Counter, sync, presettable || Counter || 4518&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4021 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 4094&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Inverter || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2-Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40174 || ? || 6 || D-type Flip-Flop  || F-F || 7474 74175 74273 4013&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4510 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4017&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver || Decoder || 7447 7448 4056&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4512 || ? || ? || 8-ch Data Selector || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4518 || 16 || 2 || BCD Counter || Counter || 4018&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4520 || 16 || 2 || BCD/Binary Counter, sync, reset || Counter || 4516&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103060</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103060"/>
		<updated>2021-01-24T02:46:39Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]]) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]] || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC) || AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger || Inv&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC) || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC) || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) 15V || Decoder || 7448 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) || Decoder || 7447 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear || F-F || 7476 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear || F-F || 74175 74273 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear || F-F- || 7473 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]] || F-F&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter || Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register || ShiftReg&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND || NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR || XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs || Decoder || 74138&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs || Decoder || 74137&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs || Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer || Decoder || 4514&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer, Quad 2-to-1 Line Select || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74164 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74161 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]] || Decoder || 4099&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear || F-F || 7474 74175 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || F-F || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || F-F || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || F-F || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || F-F || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || F-F || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4014 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 74161 74164 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4015 || 16 || 2 || 4-bit Shift Register SIPO || ShiftReg || 74161 74164 4014&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4018 || 16 || 1 || BCD Counter, sync, presettable || Counter || 4518&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4021 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 4094&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Inverter || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2-Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40174 || ? || 6 || D-type Flip-Flop  || F-F || 7474 74175 74273 4013&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4510 || 16 || 2 || 4-bit Decade &lt;br /&gt;
Counter, sync, reset || Counter || 7490 74390 4017&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver || Decoder || 7447 7448 4056&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4512 || ? || ? || 8-ch Data Selector || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4518 || 16 || 2 || BCD Counter || Counter || 4018&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4520 || 16 || 2 || BCD/Binary Counter, sync, reset || Counter || 4516&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103059</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103059"/>
		<updated>2021-01-24T02:36:52Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) 15V || Decoder || 7448 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC) || Decoder || 7447 4056 4511&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear || F-F || 7476 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear || F-F || 74175 74273 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear || F-F- || 7473 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs || Decoder || 74138&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs || Decoder || 74137&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs || Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer || Decoder || 4514&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer, Quad 2-to-1 Line Select || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74164 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register || ShiftReg || 74161 4014 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]] || Decoder || 4099&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear || F-F || 7474 74175 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || F-F || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || F-F || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || F-F || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || F-F || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || F-F || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4014 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 74161 74164 4015&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4015 || 16 || 2 || 4-bit Shift Register SIPO || ShiftReg || 74161 74164 4014&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4018 || 16 || 1 || BCD Counter, sync, presettable || Counter || 4518&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4021 || 16 || 1 || 8-bit Shift Register PISISO || ShiftReg || 4094&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Inverter || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2-Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40174 || ? || 6 || D-type Flip-Flop  || F-F || 7474 74175 74273 4013&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4510 || 16 || 2 || 4-bit Decade &lt;br /&gt;
Counter, sync, reset || Counter || 7490 74390 4017&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver || Decoder || 7447 7448 4056&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4512 || ? || ? || 8-ch Data Selector || Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4518 || 16 || 2 || BCD Counter || Counter || 4018&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4520 || 16 || 2 || BCD/Binary Counter, sync, reset || Counter || 4516&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103058</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103058"/>
		<updated>2021-01-24T02:16:22Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear || F-F || 7476 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear || F-F || 74175 74273 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear || F-F- || 7473 4027&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset || Counter || 7493 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear || F-F || 7474 74175 4013 40174&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || F-F || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || F-F || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || F-F || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || F-F || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || F-F || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit Decade Counter, sync, reset || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4018 || 16 || 1 || BCD Counter, sync, presettable || Counter || 4518&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Inverter || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2-Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40174 || ? || 6 || D-type Flip-Flop  || F-F || 7474 74175 74273 4013&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4510 || 16 || 2 || 4-bit Decade &lt;br /&gt;
Counter, sync, reset || Counter || 7490 74390 4017&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4518 || 16 || 2 || BCD Counter || Counter || 4018&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4520 || 16 || 2 || BCD/Binary Counter, sync, reset || Counter || 4516&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103057</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103057"/>
		<updated>2021-01-24T01:54:40Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter || Counter || 74390 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter || Counter || 74161 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset || Counter || 7493 74163 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 163 || 16 || - || 4-bit Binary Counter || Counter || 7493 74161 74193 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || 2 || 4-Bit Up/Down Binary Counter mit Clear || Counter || 7493 74161 74163 74393 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || Interface || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || Interface || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 390 || 16 || 2 || 4-bit Decade Counter || Counter || 7490 4017 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter || Counter || 7493 74161 74163 74193 4029&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || Interface || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || Interface || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || Interface || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4017 || 16 || 2 || 4-bit Decade Counter sync reset || Counter || 7490 74390 4510&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Inverter || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2-Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103056</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103056"/>
		<updated>2021-01-24T01:41:39Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-bit Tri-State Buffer/Line Driver (invertierend) || Interface || 7407 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version || Interface || 7407 74240 74241 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version || Interface&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]] || Interface || 74374 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register || Interface || 74373 74533 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 533 || 20 || 1 || Octal D-type Latch || Interface || 74373 74374 74573 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver || Interface || 7407 74240 74241 74244 74365 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]] || Interface || 74373 74374 74533 74574 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]] || Interface || 74373 74374 74533 74573 4042&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Inverter || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2-Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103055</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103055"/>
		<updated>2021-01-24T01:27:21Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter || Inv || 7405 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC) || Inv || 7404 7406 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC) 30V || Inv || 7404 7405 7414 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger || Inv || 7404 7405 7406 4009 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4009 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4049 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4049 || 16 || 6 || Buffer Inverter || Inv || 7404 7405 7406 7414 4009 4069&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4069 || 14 || 6 || Inverter || Inv || 7404 7405 7406 7414 4009 4049&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103054</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103054"/>
		<updated>2021-01-24T01:15:43Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40106 || 14 || 6 || Buffer, Inverter Schmitt-Trigger || Buffer || 7407 74240 74241 74244 74365 74541 4050 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4503 || 16 || 6 || Buffer, 3-State || Buffer || 7407 74240 74241 74244 74365 74541 4050 40106&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103053</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103053"/>
		<updated>2021-01-24T01:07:27Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, 6-ch Pegelwandler&amp;lt;br&amp;gt;unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103052</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103052"/>
		<updated>2021-01-24T01:01:02Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC) || Buffer || 74240 74241 74244 74365 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || 1 || 6-bit Buffer, 3-State || Buffer || 7407 74240 74241 74244 74541 4050 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4050 || 16 || 6 || Buffer, Pegelwandler unidirektional, abwärts || Buffer || 7407 74240 74241 74244 74365 74541 40106 4503&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103051</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103051"/>
		<updated>2021-01-24T00:48:20Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR || OR || 4071&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR || XOR || 74266 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR ||&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC) || XNOR || 7486 4030 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4030 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4070 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4070 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4077&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4071 || 14 || 4 || 2-Input OR || OR || 7432&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4072 || 14 || 2 || 4-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND &lt;br /&gt;
|| 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4075 || 14 || 3 || 3-Input OR || OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4077 || 14 || 4 || 2-Input XOR || XOR || 7486 74266 4030 4070&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103050</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103050"/>
		<updated>2021-01-24T00:36:26Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND || AND || 4081&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND || AND || 4073&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND || AND || 4082&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&amp;lt;br&amp;gt;&lt;br /&gt;
&amp;lt;!-- hier Tabelle teilen oder neue beginnen! --&amp;gt;&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4073 || 14 || 3 || 3-Input AND || AND || 7411&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4081 || 14 || 4 || 2-Input AND || AND || 7408&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4082 || 14 || 2 || 4-Input AND || AND || 7421&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103049</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103049"/>
		<updated>2021-01-24T00:26:52Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 7400 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103048</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103048"/>
		<updated>2021-01-24T00:23:33Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 00 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4002 || 14 || 2 || 4-Input NOR  || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4025 || 14 || 3 || 3-Input NOR  || NOR || 7427&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103047</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103047"/>
		<updated>2021-01-24T00:19:41Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 00 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR || NOR || 4025&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR || NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4001 || 14 || 4 || 2-Input NOR  || NOR || 7402&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103046</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103046"/>
		<updated>2021-01-24T00:14:43Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 00 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR || NOR || 4001&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103045</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103045"/>
		<updated>2021-01-24T00:13:19Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 00 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40107 || 14 || 2 || 2-Input NAND  || NAND || 7400 7403 74132 4011 4093&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103044</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103044"/>
		<updated>2021-01-24T00:06:28Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 00 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4068 || 14 || 1 || 8-Input NAND  || NAND || 7430&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4093 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 74132 4011 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103043</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103043"/>
		<updated>2021-01-23T23:59:49Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 00 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4023 || 14 || 3 || 3-Input NAND  || NAND || 7410&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103042</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103042"/>
		<updated>2021-01-23T23:54:58Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Elemente&lt;br /&gt;
! Beschreibung&lt;br /&gt;
! style=&amp;quot;width:6em&amp;quot; | Funktion&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | ähnlich&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 00 || 14 || 4 || 2 Input NAND || NAND || 7403 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC)&amp;lt;br&amp;gt;Andere Belegung als 7401 || NAND || 7400 74132 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND || NAND || 4023&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND || NAND || 4012&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND || NAND || 4068&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger || NAND || 7400 7403 4011 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4011 || 14 || 4 || 2-Input NAND  || NAND || 7400 7403 74132 4093 40107&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4012 || 14 || 2 || 4-Input NAND  || NAND || 7420&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103041</id>
		<title>74xx</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=74xx&amp;diff=103041"/>
		<updated>2021-01-23T22:41:24Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Typen */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Einleitung ==&lt;br /&gt;
&lt;br /&gt;
Die 74xx-Serie ist die am weitesten verbreitete [[Digital]]-IC-Familie. Das Präfix gibt Auskunft über den verwendbaren Temperaturbereich.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:40em&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:8em&amp;quot; | Familie &lt;br /&gt;
! style=&amp;quot;width:14em&amp;quot; |Temperaturbereich [°C]&lt;br /&gt;
! Einsatzgebiet&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|74||0 bis +70 || Standard (engl. commercial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|84||-25 bis +85 || Industriell (engl. industrial)&lt;br /&gt;
|-&lt;br /&gt;
|align=&amp;quot;center&amp;quot;|54||-55 bis +125 || Militärisch (engl. military)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Baureihen ==&lt;br /&gt;
Eine ausführliche Beschreibung der verschiedenen Logikbaureihen gibt es im [https://www.ti.com/lit/pdf/sdyu001 Logic Guide] von Texas Instruments. &lt;br /&gt;
&lt;br /&gt;
* TTL (&#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;T&#039;&#039;&#039;ransistor &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Logik auf Bipolartransistorbasis, veraltet)&lt;br /&gt;
** 74 = TTL&lt;br /&gt;
** 74H = Highspeed TTL&lt;br /&gt;
** 74ALS = Advanced Low Power Schottky TTL&lt;br /&gt;
** 74AS = Advanced Schottky TTL&lt;br /&gt;
** 74F = Fast TTL&lt;br /&gt;
** 74L = Low Power TTL&lt;br /&gt;
** 74LS = Low Power Schottky TTL (Ersatz für 74 und 74L)&lt;br /&gt;
** 74S = Schottky TTL&lt;br /&gt;
&lt;br /&gt;
* CMOS (&#039;&#039;&#039;C&#039;&#039;&#039;omplementary &#039;&#039;&#039;M&#039;&#039;&#039;etal &#039;&#039;&#039;O&#039;&#039;&#039;xide &#039;&#039;&#039;S&#039;&#039;&#039;emiconductor, Feldeffekttransistoren mit gegensätzlicher Polarität)&lt;br /&gt;
** 74AC = Advanced CMOS&lt;br /&gt;
** 74ACT = AC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74HC = High Speed CMOS&lt;br /&gt;
** 74HCT = HC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74AHC =  Advanced High-Speed CMOS&lt;br /&gt;
** 74AHCT = AHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74VHC = Very High Speed CMOS&lt;br /&gt;
** 74VHCT = VHC mit TTL-kompatiblen Eingängen&lt;br /&gt;
** 74LV =  Low-Voltage CMOS&lt;br /&gt;
** 74LVC =  Low-Voltage CMOS (Vcc 1,65 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
** 74LVX =  Low-Voltage CMOS (Vcc 2,00 bis 3,60 Volt, Eingänge sind auch bei niedriger Vcc bis 5,5 Volt tolerant)&lt;br /&gt;
&lt;br /&gt;
* ECL (&#039;&#039;&#039;E&#039;&#039;&#039;mitter &#039;&#039;&#039;C&#039;&#039;&#039;oupled &#039;&#039;&#039;L&#039;&#039;&#039;ogic, Emittergekoppelte Logik)&lt;br /&gt;
** 74ECL&lt;br /&gt;
** 74ECTL&lt;br /&gt;
&lt;br /&gt;
* Langsame störsichere Logik&lt;br /&gt;
** 74LSL&lt;br /&gt;
** 74SZL&lt;br /&gt;
&lt;br /&gt;
* BICMOS [[Bus]]-Interface-Logik (CMOS und Bipolartechnik kombiniert)&lt;br /&gt;
** 74BCT (siehe [http://www.ti.com/logic-circuit/buffer-driver-transceiver/products.html#p1512=BCT Texas Instruments])&lt;br /&gt;
** 74ABT&lt;br /&gt;
&lt;br /&gt;
== Typen ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- übersetzen! --&amp;gt;&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;width:50em&amp;quot;&lt;br /&gt;
|- style=&amp;quot;background:#ffdead;&amp;quot;&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Typ&lt;br /&gt;
! style=&amp;quot;width:4em&amp;quot; | Pins &lt;br /&gt;
! style=&amp;quot;width:5em&amp;quot; | Anzahl&amp;lt;br&amp;gt;Gatter &lt;br /&gt;
! Beschreibung&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 00 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 01 || 14 || 4 || 2 Input NAND (OC=[[Ausgangsstufen Logik-ICs#Open_Collector|Open Collector]])&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 02 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 03 || 14 || 4 || 2 Input NAND (OC) Andere Belegung als 7401&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 04 || 14 || 6 || Inverter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 05 || 14 || 6 || Inverter (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 06 || 14 || 6 || Inverter Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 07 || 14 || 6 || Buffer/Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 08 || 14 || 4 || 2 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 09 || 14 || 4 || 2 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 10 || 14 || 3 || 3 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 11 || 14 || 3 || 3 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 12 || 14 || 3 || 3 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 13 || 14 || 2 || 4 Input NAND [[Schmitt-Trigger]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 14 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 15 || 14 || 3 || 3 Input AND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 16 || 14 || 6 || Inverter Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 17 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 18 || 14 || 2 || 4 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 19 || 14 || 6 || Inverter Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 20 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 21 || 14 || 2 || 4 Input AND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 22 || 14 || 2 || 4 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 24 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 25 || 14 || 2 || 4 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 26 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 27 || 14 || 3 || 3 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 28 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 30 || 14 || 1 || 8 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 31 || 16 || - || Verzögerungs-Element (je 2 Non-Inverting, Inverting, 2 Input NAND)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 32 || 14 || 4 || 2 Input OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 33 || 14 || 4 || 2 Input NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 34 || 14 || 6 || Treiber&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 35 || 14 || 6 || Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 36 || 14 || 4 || 2 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 37 || 14 || 4 || 2 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 38 || 14 || 4 || 2 Input NAND (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 39 || 14 || 4 || 2 Input NAND Treiber (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 40 || 14 || 2 || 4 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 41 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 42 || 16 || - || BCD -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 43 || 16 || - || Excess-3 -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 44 || 16 || - || Excess-3-Gray -&amp;gt; Decimal Decoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 45 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 46 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 47 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 48 || 16 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 49 || 14 || - || BCD -&amp;gt; 7-Segment Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 50 || 14 || - || Dual 2-Wide 2-Input AND-OR-INVERT (1 expandable)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 51 || 14 || 2 || AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 52 || 14 || ? || Expandable AND-OR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 53 || 14 || 1 || Expandable 4-Wide AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 54 || 14 || 1 || 3-2-2-3 Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 55 || 14 || 1 || 2-Wide 4-Input AND-OR-INVERT&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 72 || 14 || 1 || And-Gated-JK-MS [[Flipflop]] with preset &amp;amp;  clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 73 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 74 || 14 || 2 || D [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 75 || 16 || - || 4-Bit Bistable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 76 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 78 || 14 || 2 || JK [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 86 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 90 || 14 || - || Decade Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 92 || 14 || - || Divide By-Twelve Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 93 || 14 || - || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 95 || 14 || - || 4 Bit Parallel Access Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 107 || 14 || 2 || JK [[Flipflop]] with clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 109 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 112 || 16 || 2 || JK [[Flipflop]] with preset &amp;amp; clear, inverted clock inputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 121 || 14 || - || Monostable Multivibrator With Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 122 || 14 || - || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 123 || 16 || 2 || Retriggerable Monostable Multivibrator&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 125 || 14 || 4 || [[Ausgangsstufen Logik-ICs#Tri-state|Tri-State]] Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 126 || 14 || 4 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 132 || 14 || 4 || 2 Input NAND Schmitt-Trigger&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 133 || 16 || 1 || 13 Input NAND&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 136 || 14 || 4 || 2 Input XOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 137 || 16 || 1 || 3-to-8 line decoder / demultiplexer with address latches, low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 138 || 16 || 1 || 3-to-8 line decoder / demultiplexer , low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 139 || 16 || 2 || 2-to-4 line decoder / demultiplexer , low-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 146 || 16 || - || BCD -&amp;gt; Decimal Decoder (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 147 || 16 || - || 10-Line -&amp;gt; 4-Line BCD Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 148 || 16 || - || 8-Line -&amp;gt; 3-Line Priority Encoder&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 151 || 16 || 1 || 8:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 154 || 24 || 1 || 4-Line -&amp;gt; 16-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 155 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 156 || 16 || 2 || 2-Line -&amp;gt; 4-Line Decoder/Demultiplexer (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 157 || 16 || 4 || 2:1 Multiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 158 || 16 || 4 || 2:1 Multiplexer , inverted outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 161 || 16 || - || Sync 4 Bit Binary Counter Async Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 164 || 14 || - || 8 Bit Serial Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 165 || 16 || - || 8-Bit Parallel -&amp;gt; Serial (PISO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 177 || 14 || - || Presetable Binary Counter/[[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 190 || 16 || - || Decimal Up/Down Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 191 || 16 || - || 4-Bit Up/Down Binary Converter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 192 || 16 || - || Decimal Up/Down Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 193 || 16 || - || 4-Bit Up/Down Binary Counter mit Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 194 || 16 || - || 4-Bit Bidirectional Universal Shift Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 221 || 16 || 2 || Monostable Multivibrator with Reset&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 238 || 16 || 1 || 3-to-8 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 239 || 16 || 2 || 2-to-4 line decoder / demultiplexer , high-active outputs&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 240 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 241 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 242 || 14 || - || 4-Bit Bus Transceiver (invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 243 || 14 || - || 4-Bit Bus Transceiver (nicht invertierend)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 244 || 20 || - || 8-Bit Tri-State Buffer/Line Driver (nicht invertierend) - Variante: 16244: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 245 || 20 || - || 8-Bit Bus Transceiver - Variante: 16T245: 16-Bit-Version&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 251 || 16 || - || 8-Bit Input Multiplexer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 259 || 16 || - || 8-Bit Adressable [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 260 || 14 || 2 || 5 Input NOR&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 266 || 14 || 4 || 2 Input Exclusive NOR (OC)&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 273 || 20 || 8 || Octal D-Type Edge-Triggered Flip-Flop with Clear&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 283 || 16 || - || 4-Bit Volladdierer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 288 || 16 || - || 256-bit PROM&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 299 || 20 || - || 8-Bit Universal Shift Register, Common IO-Pins, 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 365 || 16 || - || 6-Bit Buffer; 3-State&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 366 || 16 || 6 || Tri-State Inverting Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 367 || 16 || 6 || Tri-State Buffer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 373 || 20 || - || 8-Bit Transparent [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 374 || 20 || - || 8-Bit Positiv Edge Triggerd Register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 393 || 14 || 2 || 4-Bit Binary Counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 541 || 20 || - || 8-Bit Tri-State Buffer/Line Driver&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 573 || 20 || - || 8-Bit Tri-State D-Type [[Latch]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 574 || 20 || 8 || Tri-State [[Flipflop]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 590 || 16 || - || 8-Bit binary counter, 3-state output register&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 595 || 16 || - || 8-Bit Serial -&amp;gt; Parallel (SIPO) Shift Register&amp;lt;br&amp;gt;siehe auch [[AVR-Tutorial: Schieberegister]]&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4040 || 16 || - || 12-Bit Binary counter&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4051 || 16 || - || 8:1 Multiplexer/Demultiplexer&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4066 || 14 || 4 || Bilateral Switch&lt;br /&gt;
|-&lt;br /&gt;
| style=&amp;quot;background:#efefef; text-align:right; font-weight: bold;&amp;quot; | 4511 || 16 || - || BCD to 7-segment latch/decoder/driver&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Siehe auch ==&lt;br /&gt;
&lt;br /&gt;
[http://www.mikrocontroller.net/topic/322862?goto=new#3514909 Forumsbeitrag]: Datumszähler von 2000-2099 aus TTL-Schaltkreisen&lt;br /&gt;
&lt;br /&gt;
== Weblinks ==&lt;br /&gt;
&lt;br /&gt;
* [http://www.kingswood-consulting.co.uk/giicm/ Giant Internet IC Masturbator] Umfassende Übersicht mit Pinouts über 4000, 7400 und Co (nach GIICM suchen, falls der Link mal ins Leere zeigen sollte)&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/3725 &amp;quot;Ende der &#039;244 Verwirrung ???&amp;quot;] im Forum&lt;br /&gt;
* [http://www.ti.com/lit/pdf/sdyu001 Logic Selection Guide] (2014) Umfassende Zusammenfassung unterschiedlicher Logik Technologien&lt;br /&gt;
* [http://www.samengstrom.com/nxl/7901/cmos_functional_diagram_page.en.html 4000B Series CMOS Functional Diagrams] Übersicht für 40xx-CMOS-Bausteine&lt;br /&gt;
* [http://web.archive.org/web/20141127121818/http://www.fh-sw.de/sw/fachb/et/halbl/stdlogik.htm Vergleich verschiedener Technologiefamilien]&lt;br /&gt;
* [http://atanua.org Atanua] is a real-time logic simulator for the 7400 series, designed to help in learning of basic boolean logic and electronics. (Non-commercial free version available)&lt;br /&gt;
* [http://www.msarnoff.org/chipdb/ ChipDB] - Pinouts von gängigen 74xx&lt;br /&gt;
* [http://www.interfacebus.com/voltage_threshold.html Logic Threshold Voltage Levels], Die Schaltschwellen der verschiedenen Logikfamilien&lt;br /&gt;
* [http://www.interfacebus.com/IC_Output_Slew_Rate.html Output slew rate], die Anstiegszeiten der verschiedenen Logikfamilien&lt;br /&gt;
* [http://design.stanford.edu/spdl/ME218a/logic/which_is_best.html Motorola Logic Families, Which Is Best for You?], Vergleich der verschiedenen Logikfamilien, engl.&lt;br /&gt;
&lt;br /&gt;
[[Category:Bauteile]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
	<entry>
		<id>https://www.mikrocontroller.net/index.php?title=RFM69&amp;diff=102091</id>
		<title>RFM69</title>
		<link rel="alternate" type="text/html" href="https://www.mikrocontroller.net/index.php?title=RFM69&amp;diff=102091"/>
		<updated>2020-06-25T03:50:11Z</updated>

		<summary type="html">&lt;p&gt;Mratix: /* Ausstattung */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;[[Datei:rf69cw.png|thumb|300px|RFM69CW, Pinkompatibel zum RFM12]]&lt;br /&gt;
Das RFM69 von HopeRF ist ein universelles Funkmodul für die ISM-Frequenzbänder 315, 433, 868 und 915 MHz. Eine [[SPI]]-Schnitttstelle ermöglicht die einfache Integration in Mikrocontrollerprojekte.&lt;br /&gt;
&lt;br /&gt;
== Ausführungen ==&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! !! RFM69HCW !! RFM69HW !! RFM69CW !! RFM69W&lt;br /&gt;
|-&lt;br /&gt;
| Sendeleistung || 20 dBm || 20 dBm || 13 dBm || 13 dBm&lt;br /&gt;
|-&lt;br /&gt;
| Pins || 16 || 16 || 14 || 16&lt;br /&gt;
|-&lt;br /&gt;
| Abmessungen || 16 x 16 mm || 19,7 x 16 mm || 16 x 16 mm || 19,7 x 16 mm&lt;br /&gt;
|-&lt;br /&gt;
| Sonstiges || Ersatz für RFM22B || || Ersatz für RFM12 ||&lt;br /&gt;
|-&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
Die CW-Variante hat 2 Pins weniger (es fehlt der Pin DIO4), und ist Pinkompatibel zum Vorgänger RFM12B.&lt;br /&gt;
Es kann ohne Änderung am Layout oder der Schaltung ausgetauscht werden. Lediglich die Software muss angepasst werden.&lt;br /&gt;
&lt;br /&gt;
== Ausstattung ==&lt;br /&gt;
* Betriebsspannung 1,8 - 3,6 V&lt;br /&gt;
* SPI-Schnittstelle&lt;br /&gt;
* FSK- und OOK-Modulation (Frequency Shift Keying = Frequenzumtastung, On-Off-Keying = Amplitudentastung)&lt;br /&gt;
* Eingebauter Manchester de- und -encoder&lt;br /&gt;
* Frequenzbereiche 315, 433, 868, 915 MHz&lt;br /&gt;
* Max. Datenrate 300 kbit/s&lt;br /&gt;
* Ausgangsleistung +13 dBm (rund 20 mW)&lt;br /&gt;
* Stromaufnahme 45 mA senden (13 dBm), 16 mA empfangen, 0,1 µA Standby&lt;br /&gt;
* Integrierte Packetengine für Synchronwort, CRC, Scrambling und AES-Verschlüsselung&lt;br /&gt;
* 66 Byte FIFO&lt;br /&gt;
* Module RFM69W und RFM69CW basieren auf dem SX1231 von Semtech (Pin PA_BOOST fehlt, deswegen nur +13dB)&lt;br /&gt;
* Module RFM69HW und RFM69HCW basieren auf dem SX1231H von Semtech&lt;br /&gt;
&lt;br /&gt;
== Vergleich zum RFM12B ==&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! !! RFM12B !! RFM69(C)W&lt;br /&gt;
|-&lt;br /&gt;
| Versorgungsspannung || 2,2 - 3,8 V || 1,8 - 3,6 V&lt;br /&gt;
|-&lt;br /&gt;
| Max. Datenrate || 115,2 kbit/s || 300 kbit/s&lt;br /&gt;
|-&lt;br /&gt;
| Sendeleistung || 5 dBm || 13 dBm&lt;br /&gt;
|-&lt;br /&gt;
| Empfindlichkeit || -105 dBm || -120 dBm&lt;br /&gt;
|-&lt;br /&gt;
| Stromaufnahme || 22 mA/11 mA/0,3 µA || 45 mA/16 mA/0,1 µA&lt;br /&gt;
|-&lt;br /&gt;
| FIFO Größe || 16 Bit || 66 Bytes&lt;br /&gt;
|-&lt;br /&gt;
| Syncmustererkennung || Fest 0x2DD4 oder 0xD4 || Frei bis zu 8 Bytes&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Ansteuerung ==&lt;br /&gt;
Das Funkmodul kommuniziert über die SPI Schnittstelle mit dem µC. Im einfachsten Fall werden SCK, MISO, MOSI und NSS benötigt. Am besten führt man auch noch DIO0 zum Prozessor. Dieser Pin kann softwareseitig so konfiguriert werden, dass er anzeigt, wenn ein Paket vollständig gesendet oder ein neues Paket empfangen wurde. Ist das Modul in Minimalkonfiguration angeschlossen, müssen dazu die Statusregister RegIrqFlags1 (0x27) oder RegIrqFlags2 (0x28) ausgelesen werden.&lt;br /&gt;
&lt;br /&gt;
Die SPI-Ansteuerung erfolgt im Modus CPOL=0, CPHA=0, wobei jeweils 16 Bits vom µC zum Modul geschickt werden:&lt;br /&gt;
Das erste Bit teilt dem Modul mit, ob es sich um einen Lese- (Bitwert 0) oder Schreibvorgang (Bitwert 1) handelt, die restlichen sieben Bit des ersten Bytes geben die Registeradresse an. Mit den zweiten acht Bit wird im Schreibmodus der zu übertragende Befehl an das Modul übermittelt, im Lesemodus kann eine beliebige Bitfolge gesendet werden. Während das zweite Byte gesendet wird, empfängt der µC sowohl im Lese- als auch im Schreibmodus den Inhalt des angesprochenen Registers vor dem aktuellen Zugriff.&lt;br /&gt;
&lt;br /&gt;
Werden nach dem Adressbyte mehrere Bytes empfangen oder gelesen, wird der Adresszeiger im RFM69 automatisch inkrementiert, so dass in einem einzigen Burst mehrere Register gelesen werden können. Zu beachten ist dabei, dass in Registern die mehr als 8 Bit breit sind (Frequenz, Bitrate, ...), das höchstwertige Byte zu erst geschrieben/gelesen wird (big endian). Wird das FIFO Register gelesen/geschrieben, wird der Adresszeiger nicht inkrementiert, so dass auf das FIFO in einem Burst zugegriffen werden kann.&lt;br /&gt;
&lt;br /&gt;
== Funktionsweise ==&lt;br /&gt;
Es gibt zwei grundsätzliche Funktionsmodi, die im Register &amp;quot;RegDataModule&amp;quot; gewählt werden:&lt;br /&gt;
=== Continuous Mode ===&lt;br /&gt;
Für die Datenübertragung vom/zum Modul werden die beiden Pins &amp;quot;DIO1/DCLK&amp;quot; und &amp;quot;DIO2/DATA&amp;quot; verwendet. An DCLK gibt das Modul den Takt vor mit dem die Datenbits an DATA geschrieben oder gelesen werden müssen.&lt;br /&gt;
=== Packet Mode ===&lt;br /&gt;
Die Packetengine des RFM69 kümmert sich um die Erzeugung und Auswertung der Preamble, des Synchronwortes, des Scramblings, der CRC und der Verschlüsselung. Im Sendebetrieb bearbeitet die eingebaute Packet Engine ein Nutzdatenpaket folgendermaßen:&lt;br /&gt;
==== Fixed Length Format ====&lt;br /&gt;
===== Senden =====&lt;br /&gt;
* Einstellbare Anzahl (0-65535) von Preamblebytes (0xAA) an den Anfang setzen&lt;br /&gt;
* Synchronwort hinzufügen (Länge zwischen 0-8 Bytes einstellbar, Synchronwort selbst ebenfalls einstellbar)&lt;br /&gt;
* Nutzdaten hinzufügen (Länge wird in einem Register angegeben)&lt;br /&gt;
* CRC hinzufügen (abschaltbar)&lt;br /&gt;
===== Empfangen =====&lt;br /&gt;
* Länge des zu empfangenden Frames wird in einem Register angegeben&lt;br /&gt;
==== Variable Length Format ====&lt;br /&gt;
===== Senden =====&lt;br /&gt;
* Länge des zu sendenen Frames in einem Register angeben. Die Packetengine sendet das Längenbyte automatisch vor den Nutzdaten&lt;br /&gt;
===== Empfangen =====&lt;br /&gt;
* Packetengine erkennt automatisch die Packetlänge&lt;br /&gt;
==== Unlimited Length Packet Format ====&lt;br /&gt;
===== Senden =====&lt;br /&gt;
* Beliebig lange Frames; Senden muss von der Software selber gestoppt werden&lt;br /&gt;
===== Empfangen =====&lt;br /&gt;
* Empfangen muss von der Software selber gestoppt werden&lt;br /&gt;
&lt;br /&gt;
== Interrupts ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! Bezeichnung !! Beschreibung !! Verfügbar an (Packet mode) !! Verfügbar an (Cont. mode)&lt;br /&gt;
|-&lt;br /&gt;
| ModeReady || Beispiel || DIO5&lt;br /&gt;
|-&lt;br /&gt;
| RxReady || Beispiel || Beispiel&lt;br /&gt;
|-&lt;br /&gt;
| TxReady || Beispiel || DIO3, DIO0&lt;br /&gt;
|-&lt;br /&gt;
| PllLock || Beispiel || DIO3, DIO1, DIO0&lt;br /&gt;
|-&lt;br /&gt;
| Rssi || Eingestellte Rssi-Schwelle überschritten; wird gelöscht wenn RX Modus verlassen wird || DIO0, DIO3 || DIO0, DIO3, DIO5&lt;br /&gt;
|-&lt;br /&gt;
| Timeout || Beispiel || DIO1&lt;br /&gt;
|-&lt;br /&gt;
| AutoMode || Beispiel || DIO2&lt;br /&gt;
|-&lt;br /&gt;
| SyncAddressMatch || Syncadresse empfangen || DIO0, DIO3 || DIO0, DIO1&lt;br /&gt;
|-&lt;br /&gt;
| FifoFull || Beispiel || DIO3, DIO1&lt;br /&gt;
|-&lt;br /&gt;
| FifoNotEmpty || || DIO2, DIO1&lt;br /&gt;
|-&lt;br /&gt;
| FifoLevel || || DIO1&lt;br /&gt;
|-&lt;br /&gt;
| FifoOverrun || ||&lt;br /&gt;
|-&lt;br /&gt;
| PacketSent || || DIO0&lt;br /&gt;
|-&lt;br /&gt;
| PayloadReady || || DIO0&lt;br /&gt;
|-&lt;br /&gt;
| CrcOk || || DIO0&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Pinbelegung RFM69(H)CW ==&lt;br /&gt;
[[Datei:RFM12 69 Pins.svg|Anschlussbelegung RFM12B und RFM69]]&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! Pinnummer !! Name !! Richtung !! Fktn. im packet mode !! Fktn. im cont. mode!! Pin am RFM12&lt;br /&gt;
|-&lt;br /&gt;
| 1 || ANA || || Antennenanschluss || || ANT&lt;br /&gt;
|-&lt;br /&gt;
| 2 || 3.3V || || Versorgungsspannung || || VDD&lt;br /&gt;
|-&lt;br /&gt;
| 3 || GND || || || ||GND&lt;br /&gt;
|-&lt;br /&gt;
| 4 || DIO3 || || FifoFull&amp;amp;nbsp;PllLock&amp;lt;br/&amp;gt;Rssi&amp;lt;br/&amp;gt;SyncAdress&amp;lt;br/&amp;gt;TXReady || || nINT/VDI&lt;br /&gt;
|-&lt;br /&gt;
| 5 || MOSI || || SPI Daten Eingang || || SDI&lt;br /&gt;
|-&lt;br /&gt;
| 6 || SCK || || SPI Takt || || SCK&lt;br /&gt;
|-&lt;br /&gt;
| 7 || NSS || || Chip select || || nSEL&lt;br /&gt;
|-&lt;br /&gt;
| 8 || MISO || || SPI Daten Ausgang || || SDO&lt;br /&gt;
|-&lt;br /&gt;
| 9 || DIO0 || || PllLock (FS, TX)&amp;lt;br/&amp;gt;CrcOK (RX)&amp;lt;br/&amp;gt;PayloadReady (RX)&amp;lt;br/&amp;gt;SyncAddress (RX)&amp;lt;br/&amp;gt;Rssi (RX)&amp;lt;br/&amp;gt;PacketSent (TX)&amp;lt;br/&amp;gt;TxReady (TX) || ModeReady&amp;lt;br /&amp;gt;&lt;br /&gt;
PllLock&amp;lt;br /&amp;gt;&lt;br /&gt;
SyncAddress&amp;lt;br /&amp;gt;&lt;br /&gt;
Timeout&amp;lt;br /&amp;gt;&lt;br /&gt;
Rssi&amp;lt;br /&amp;gt;&lt;br /&gt;
TxReady || nIRQ&lt;br /&gt;
|-&lt;br /&gt;
| 10 || DIO2 || || FifoNotEmpty (Sleep, Stdby, FS, RX, TX)&amp;lt;br/&amp;gt;AutoMode(Sleep, Stdby, FS, RX, TX)&amp;lt;br/&amp;gt;Data (RX, TX) || Data || FSK&amp;lt;br /&amp;gt;DATA&amp;lt;br /&amp;gt;nFFS&lt;br /&gt;
|-&lt;br /&gt;
| 11 || DIO1 || || FifoLevel (Sleep, Stdby, FS, RX, TX)&amp;lt;br/&amp;gt;FifoFull (Sleep, Stdby, FS, RX, TX)&amp;lt;br/&amp;gt;FifoNotEmpty (Sleep, Stdby, FS, RX, TX)&amp;lt;br/&amp;gt;PllLock (FS, TX)&amp;lt;br/&amp;gt;Timeout (RX) || PllLock&amp;lt;br /&amp;gt;&lt;br /&gt;
Dclk&amp;lt;br /&amp;gt;&lt;br /&gt;
RxReady&amp;lt;br /&amp;gt;&lt;br /&gt;
SyncAddress&amp;lt;br /&amp;gt;&lt;br /&gt;
TxReady&amp;lt;br /&amp;gt;&lt;br /&gt;
 || DCLK/CFIL/FFIT&lt;br /&gt;
|-&lt;br /&gt;
| 12 || DIO5 || || ModeReady&amp;lt;br/&amp;gt;ClkOut (Stdby, FS, RX, TX)&amp;lt;br/&amp;gt;Data (RX, TX) || ||CLK&lt;br /&gt;
|-&lt;br /&gt;
| 13 || RESET || || || || nRES&lt;br /&gt;
|-&lt;br /&gt;
| 14 || GND || || || || GND&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Register ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! Adresse !! Registername !! Beschreibung !! Beispiel&lt;br /&gt;
|-&lt;br /&gt;
| 0x00 || RegFifo || Zugriff auf das FIFO Register&lt;br /&gt;
|-&lt;br /&gt;
| 0x01 || RegOpMode || Betriebsart (senden, empfangen, ...) || 0x04 = Standby&lt;br /&gt;
|-&lt;br /&gt;
| 0x02 || RegDataModule || Modulationsart &amp;amp;-shaping, Packetengine || 0x00 = FSK, Packetengine aktiv&lt;br /&gt;
|-&lt;br /&gt;
| 0x03 - 0x04|| RegBitrate || = FXOSC/Bitrate || 0x1A0B = 6667 -&amp;gt; 4,8 kbit/s&lt;br /&gt;
|-&lt;br /&gt;
| 0x05 - 0x06 || RegFdev || Frequenzabweichung (Hub * 2) || 0x52 = 82 -&amp;gt; 5 kHz&lt;br /&gt;
|-&lt;br /&gt;
| 0x07 - 0x09 || RegFrf || Mittenfrequenz; RegFrf = Frequenz_in_Hz / (FXOSC / 524288) || 0xD91333 = 14226227 -&amp;gt; 868,300 MHz&lt;br /&gt;
|-&lt;br /&gt;
| 0x11|| RegPaLevel || Sendeleistung und Ausgangspin, muss passend zum Modultyp gewaehlt werden: PA1+2 funktionieren nur bei den *H*-Varianten, dafuer funktioniert dort PA0 nicht. || 0x12 = 18 -&amp;gt; 0 dBm (? stimmt das Beispiel?) ; 0x5F -&amp;gt; 13 dBM auf RFM69HCW ; 0x9F -&amp;gt; 13 dBm auf RFM69W&lt;br /&gt;
|-&lt;br /&gt;
| 0x19|| RegRxBw || Filterbandbreite || 0b01001 -&amp;gt; 200 kHz&lt;br /&gt;
|-&lt;br /&gt;
| 0x25|| RegDioMapping1 || DIO Funktionen ||&lt;br /&gt;
|-&lt;br /&gt;
| 0x27|| RegIrqFlags1 || Statusflags (ModeReady, RxReady, TxReady, PllLock, RSSI, Timeout, AutoMode, SyncAddressMatch) || 0xD0 -&amp;gt; Empfänger bereit zum Datenempfang&lt;br /&gt;
|-&lt;br /&gt;
| 0x28|| RegIrqFlags2 || Statusflags (FifoFull, FifoNotEmpty, FifoLevel, FifoOverrun, PacketSent, PayloadReady, CrcOk, LowBat) || 0x06 -&amp;gt; Daten mit erfolgreichem CRC empfangen&lt;br /&gt;
|-&lt;br /&gt;
| 0x2C - 0x2D|| RegPreamble || Preamblelänge ||&lt;br /&gt;
|-&lt;br /&gt;
| 0x2E || RegSyncConfig || Synchronworteinstellungen ||&lt;br /&gt;
|-&lt;br /&gt;
| 0x2F - 0x36 || RegSyncValue || Synchronwort || 0x2DD4&lt;br /&gt;
|-&lt;br /&gt;
| 0x37 || RegPacketConfig1 || Einstellungen Packetengine ||&lt;br /&gt;
|-&lt;br /&gt;
| 0x38 || RegPayloadLength || Datenpacketgröße ||&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Software Implementierungen ==&lt;br /&gt;
* [https://github.com/LowPowerLab/RFM69 Arduinobibliothek (C++) von LowPowerLab]&lt;br /&gt;
* [https://github.com/jcw/jeelib Arduinobibliothek (C++) für JeeNodes]&lt;br /&gt;
* [https://github.com/gkaindl/rfm12b-linux Linux Kerneltreiber (C) für RFM12 und RFM69]&lt;br /&gt;
* [https://github.com/ahessling/RFM69-STM32 Bibliothek (C++) für STM32]&lt;br /&gt;
* [https://github.com/etrombly/RFM69 RFM69 Anbindung in Python]&lt;br /&gt;
* [https://github.com/russss/rfm69-python RFM69 Anbindung in Python]&lt;br /&gt;
* [https://github.com/cristi85/RFM69 RFM69 in C]&lt;br /&gt;
&lt;br /&gt;
== Projekte ==&lt;br /&gt;
&lt;br /&gt;
=== Intertechno Funksteckdosen schalten ===&lt;br /&gt;
Hier gibt es einen Artikel wie mit einem Raspberry Pi und einem RFM69 Modul Funksteckdosen angesteuert werden:&lt;br /&gt;
[[http://www.seegel-systeme.de/2015/09/05/funksteckdosen-mit-dem-raspberry-pi-steuern/ Funksteckdosen am Raspberry Pi]]&lt;br /&gt;
&lt;br /&gt;
=== FS20 Funksteckdosen schalten ===&lt;br /&gt;
Da das RFM69 OOK modulieren kann, können damit die FS20 Funksteckdosen geschaltet werden. FS20 verwendet allerdings eine Art Pulsdauermodulation; eine 1 wird mit 600&amp;amp;nbsp;µs Träger an gefolgt von 600&amp;amp;nbsp;µs Träger aus, und eine 0 mit 400&amp;amp;nbsp;µs an gefolgt von 400&amp;amp;nbsp;µs aus übertragen. Man teilt einfach das Signal in 200&amp;amp;nbsp;µs Schlitze ein (OOK-Datenrate 5&amp;amp;nbsp;kbit/s), und sendet für eine 1 die Folge 111000 und für eine 0 die Folge 1100. Im FS20 Protokoll wird ein 13 Bit langer Header (0000000000001) übertragen, diesen kann man umrechnen und im RFM69 als Syncword einstellen. So wird der Header vom RFM69 bei jeder Übertragung automatisch vorweg ausgesendet.&lt;br /&gt;
&lt;br /&gt;
=== Conrad Energy Count 3000 ===&lt;br /&gt;
Unter http://forum.jeelabs.net/node/3412679.html?page=1 wurde schon das Protokoll der Conrad Energy Count 3000 (baugleich mit Technoline Cost Control RC) Funk-Energiekostenmessgeräte beschrieben. Mit dem RFM69 lässt sich ein Frame des Messgerätes mit dem konfigurierbarem Synchronwortfinder bequem empfangen.&lt;br /&gt;
&lt;br /&gt;
=== LaCrosse Temperatursensoren empfangen ===&lt;br /&gt;
=== Open Energy Monitor empfangen ===&lt;br /&gt;
&lt;br /&gt;
== Hardware mit RFM69 ==&lt;br /&gt;
* [http://www.seegel-systeme.de/produkt/raspyrfm-ii/ RaspyRFM, ein Aufsteckmodul für den Raspberry Pi]&lt;br /&gt;
* [https://lowpowerlab.com/guide/moteino/ Moteino, Arduino kompatibles Board mit RFM69]&lt;br /&gt;
* [http://shop.in-circuit.de/product_info.php?cPath=22_27&amp;amp;products_id=159 radino, Minimodul mit ATMega32u4 und RFM69]&lt;br /&gt;
* [https://www.adafruit.com/product/3177 Adafruit Feather M0, Modul mit Atmel ARM und RFM69]&lt;br /&gt;
&lt;br /&gt;
== Themen zum RFM69 im Forum ==&lt;br /&gt;
* [http://www.mikrocontroller.net/topic/332579 Thread im Forum: Wer verwendet RFM69]&lt;br /&gt;
* [https://www.mikrocontroller.net/topic/397900 RFM69 - Beispiel für Initialisierung gesucht]&lt;br /&gt;
* [https://www.mikrocontroller.net/topic/409803 RFM69 - RSSI Messung]&lt;br /&gt;
* [https://www.mikrocontroller.net/topic/359345 Simple SPI Interaktion mit dem rfm69 Modul]&lt;br /&gt;
* [https://www.mikrocontroller.net/topic/400123 RFM69 Sleep Mode]&lt;br /&gt;
* [https://www.mikrocontroller.net/topic/369204 Raspberry Pi mit RFM69 und FS20]&lt;br /&gt;
* [https://www.mikrocontroller.net/topic/370196 RFM 69 Hub, Bandbreite, Bitrate?]&lt;br /&gt;
* [https://www.mikrocontroller.net/topic/421164 RFM69 AFC Versatz auslesen?]&lt;br /&gt;
* [https://www.mikrocontroller.net/topic/372914 Umstieg von RFM22 auf RFM69]&lt;br /&gt;
&lt;br /&gt;
== Bezugsquellen ==&lt;br /&gt;
* [http://www.seegel-systeme.de/produkt/funkmodul-rfm69cw-rev-v1-0-smd/ Seegel Systeme]&lt;br /&gt;
* Pollin: [http://www.pollin.de/shop/dt/Nzk2OTgxOTk-/Bausaetze_Module/Module/Funkmodul_HOPERF_RFM69CW_433_MHz_TX_RX.html 433 MHz] / [http://www.pollin.de/shop/dt/Njk2OTgxOTk-/Bausaetze_Module/Module/Funkmodul_HOPERF_RFM69CW_868_MHz_TX_RX.html 868 MHz]&lt;br /&gt;
* [http://www.aliexpress.com/item/RFM69CW-13dBm-transceiver-module-pin-to-pin-compatible-to-RFM12B-433-868-915mhz-can-be-selected/2010762457.html AliExpress]&lt;br /&gt;
&lt;br /&gt;
== Links ==&lt;br /&gt;
* [http://www.hoperf.com/upload/rf/RFM69CW-V1.1.pdf Datenblatt RFM69CW]&lt;br /&gt;
* [http://www.hoperf.com/upload/rf/RFM69W-V1.3.pdf Datenblatt RFM69W]&lt;br /&gt;
* [http://www.semtech.com/images/datasheet/sx1231.pdf Datenblatt Semtech SX1231]&lt;br /&gt;
* [http://www.semtech.com/images/datasheet/AN1200.18_STD.pdf Application Note zur Softwareimplementierung von Data-Whitening und CRC]&lt;br /&gt;
&lt;br /&gt;
[[Kategorie:RFM12]]&lt;br /&gt;
[[Kategorie:Funk]]&lt;/div&gt;</summary>
		<author><name>Mratix</name></author>
	</entry>
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