Xmega Application Note | |||||
Chip-specific system clock management functions. More...
#include <board.h>
#include <compiler.h>
#include <parts.h>
#include <ccp.h>
#include <osc.h>
#include <pll.h>
#include <conf_clock.h>
Go to the source code of this file.
Defines | |
#define | CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 |
#define | CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1 |
Clocks on PORTA and PORTB | |
#define | SYSCLK_AC PR_AC_bm |
Analog Comparator. | |
#define | SYSCLK_ADC PR_ADC_bm |
A/D Converter. | |
#define | SYSCLK_DAC PR_DAC_bm |
D/A Converter. | |
Clocks not associated with any port | |
#define | SYSCLK_AES PR_AES_bm |
AES Module. | |
#define | SYSCLK_DMA PR_DMA_bm |
DMA Controller. | |
#define | SYSCLK_EBI PR_EBI_bm |
Ext Bus Interface. | |
#define | SYSCLK_EVSYS PR_EVSYS_bm |
Event System. | |
#define | SYSCLK_RTC PR_RTC_bm |
Real-Time Counter. | |
#define | SYSCLK_USB PR_USB_bm |
USB Module. | |
Clocks on PORTC, PORTD, PORTE and PORTF | |
#define | SYSCLK_HIRES PR_HIRES_bm |
Hi-Res Extension. | |
#define | SYSCLK_SPI PR_SPI_bm |
SPI controller. | |
#define | SYSCLK_TC0 PR_TC0_bm |
Timer/Counter 0. | |
#define | SYSCLK_TC1 PR_TC1_bm |
Timer/Counter 1. | |
#define | SYSCLK_TWI PR_TWI_bm |
TWI controller. | |
#define | SYSCLK_USART0 PR_USART0_bm |
USART 0. | |
#define | SYSCLK_USART1 PR_USART1_bm |
USART 1. | |
Prescaler A Setting (relative to CLKsys) | |
#define | SYSCLK_PSADIV_1 CLK_PSADIV_1_gc |
Do not prescale. | |
#define | SYSCLK_PSADIV_128 CLK_PSADIV_128_gc |
Prescale CLKper4 by 128. | |
#define | SYSCLK_PSADIV_16 CLK_PSADIV_16_gc |
Prescale CLKper4 by 16. | |
#define | SYSCLK_PSADIV_2 CLK_PSADIV_2_gc |
Prescale CLKper4 by 2. | |
#define | SYSCLK_PSADIV_256 CLK_PSADIV_256_gc |
Prescale CLKper4 by 256. | |
#define | SYSCLK_PSADIV_32 CLK_PSADIV_32_gc |
Prescale CLKper4 by 32. | |
#define | SYSCLK_PSADIV_4 CLK_PSADIV_4_gc |
Prescale CLKper4 by 4. | |
#define | SYSCLK_PSADIV_512 CLK_PSADIV_512_gc |
Prescale CLKper4 by 512. | |
#define | SYSCLK_PSADIV_64 CLK_PSADIV_64_gc |
Prescale CLKper4 by 64. | |
#define | SYSCLK_PSADIV_8 CLK_PSADIV_8_gc |
Prescale CLKper4 by 8. | |
Prescaler B and C Setting (relative to CLKper4) | |
#define | SYSCLK_PSBCDIV_1_1 CLK_PSBCDIV_1_1_gc |
Do not prescale. | |
#define | SYSCLK_PSBCDIV_1_2 CLK_PSBCDIV_1_2_gc |
Prescale CLKper and CLKcpu by 2. | |
#define | SYSCLK_PSBCDIV_2_2 CLK_PSBCDIV_2_2_gc |
Prescale CLKper2 by 2, CLKper and CLKcpu by 4. | |
#define | SYSCLK_PSBCDIV_4_1 CLK_PSBCDIV_4_1_gc |
Prescale CLKper2, CLKper and CLKcpu by 4. | |
System Clock Sources | |
#define | SYSCLK_SRC_PLL CLK_SCLKSEL_PLL_gc |
Phase-Locked Loop. | |
#define | SYSCLK_SRC_RC2MHZ CLK_SCLKSEL_RC2M_gc |
Internal 2 MHz RC oscillator. | |
#define | SYSCLK_SRC_RC32KHZ CLK_SCLKSEL_RC32K_gc |
Internal 32 KHz RC oscillator. | |
#define | SYSCLK_SRC_RC32MHZ CLK_SCLKSEL_RC32M_gc |
Internal 32 MHz RC oscillator. | |
#define | SYSCLK_SRC_XOSC CLK_SCLKSEL_XOSC_gc |
External oscillator. | |
Enumerations | |
System Clock Port Numbers | |
enum | sysclk_port_id { SYSCLK_PORT_GEN, SYSCLK_PORT_A, SYSCLK_PORT_B, SYSCLK_PORT_C, SYSCLK_PORT_D, SYSCLK_PORT_E, SYSCLK_PORT_F } |
Functions | |
void | sysclk_init (void) |
Initialize the synchronous clock system. | |
Enabling and disabling synchronous clocks | |
void | sysclk_disable_module (enum sysclk_port_id port, uint8_t id) |
Disable the clock to peripheral id on port port. | |
void | sysclk_enable_module (enum sysclk_port_id port, uint8_t id) |
Enable the clock to peripheral id on port port. | |
static bool | sysclk_module_is_enabled (enum sysclk_port_id port, uint8_t id) |
Check if the synchronous clock is enabled for a module. | |
Querying the system clock and its derived clocks | |
The following functions may be used to query the current frequency of the system clock and the CPU and bus clocks derived from it. sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be available on all platforms, although some platforms may define additional accessors for various chip-internal bus clocks. These are usually not intended to be queried directly by generic code. | |
static uint32_t | sysclk_get_cpu_hz (void) |
Return the current rate in Hz of the CPU clock. | |
static uint32_t | sysclk_get_main_hz (void) |
Return the current rate in Hz of the main system clock. | |
Querying the system clock and its derived clocks | |
static uint32_t | sysclk_get_per2_hz (void) |
Return the current rate in Hz of clk_PER2. | |
static uint32_t | sysclk_get_per4_hz (void) |
Return the current rate in Hz of clk_PER4. | |
static uint32_t | sysclk_get_per_hz (void) |
Return the current rate in Hz of clk_PER. | |
System Clock Source and Prescaler configuration | |
static void | sysclk_lock (void) |
Lock the system clock configuration. | |
static void | sysclk_set_prescalers (uint8_t psadiv, uint8_t psbcdiv) |
Set system clock prescaler configuration. | |
static void | sysclk_set_source (uint8_t src) |
Change the source of the main system clock. |
Chip-specific system clock management functions.
Copyright (C) 2010 Atmel Corporation. All rights reserved.
Definition in file sysclk.h.
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1 |
Definition at line 61 of file sysclk.h.
Referenced by sysclk_get_per4_hz(), and sysclk_init().
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1 |
Definition at line 65 of file sysclk.h.
Referenced by sysclk_get_per2_hz(), sysclk_get_per_hz(), and sysclk_init().
Generated on Fri Oct 22 12:15:25 2010 for AVR1300 Using the Xmega ADC by ![]() |