Xmega Application Note


genclk.h

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00001 
00038 #ifndef CHIP_GENCLK_H_INCLUDED
00039 #define CHIP_GENCLK_H_INCLUDED
00040 
00046 
00047 
00048 
00050 #define GENCLK_DIV_MAX     ((1 << AVR32_PM_GCCTRL_DIV_SIZE) * 2)
00051 
00052 #ifndef __ASSEMBLY__
00053 
00054 #include <stdint.h>
00055 #include <avr32/io.h>
00056 
00057 enum genclk_source {
00058         GENCLK_SRC_OSC0    = 0,    
00059         GENCLK_SRC_OSC1    = 1,    
00060         GENCLK_SRC_PLL0    = 2,    
00061         GENCLK_SRC_PLL1    = 3,    
00062 };
00063 
00065 
00066 struct genclk_config {
00067         uint32_t ctrl;
00068 };
00069 
00070 static inline void genclk_config_defaults(struct genclk_config *cfg,
00071                 unsigned int id)
00072 {
00073         cfg->ctrl = 0;
00074 }
00075 
00076 static inline void genclk_config_read(struct genclk_config *cfg,
00077                 unsigned int id)
00078 {
00079         cfg->ctrl = AVR32_PM.gcctrl[id];
00080 }
00081 
00082 static inline void genclk_config_write(const struct genclk_config *cfg,
00083                 unsigned int id)
00084 {
00085         AVR32_PM.gcctrl[id] = cfg->ctrl;
00086 }
00087 
00088 static inline void genclk_config_set_source(struct genclk_config *cfg,
00089                 enum genclk_source src)
00090 {
00091         uint32_t mask;
00092 
00093         mask = AVR32_PM_GCCTRL_OSCSEL_MASK | AVR32_PM_GCCTRL_PLLSEL_MASK;
00094         Assert(!(src & ~mask));
00095 
00096         cfg->ctrl = (cfg->ctrl & ~mask) | (src << AVR32_PM_GCCTRL_OSCSEL);
00097 }
00098 
00099 static inline void genclk_config_set_divider(struct genclk_config *cfg,
00100                 unsigned int divider)
00101 {
00102         Assert(divider > 0 && divider <= GENCLK_DIV_MAX);
00103 
00104         /* Clear all the bits we're about to modify */
00105         cfg->ctrl &= ~(AVR32_PM_GCCTRL_DIVEN_MASK | AVR32_PM_GCCTRL_DIV_MASK);
00106 
00107         if (divider > 1) {
00108                 cfg->ctrl |= 1U << AVR32_PM_GCCTRL_DIVEN;
00109                 cfg->ctrl |= ((divider >> 1) - 1) << AVR32_PM_GCCTRL_DIV;
00110         }
00111 }
00112 
00113 static inline void genclk_enable(const struct genclk_config *cfg,
00114                 unsigned int id)
00115 {
00116         AVR32_PM.gcctrl[id] = cfg->ctrl | (1U << AVR32_PM_GCCTRL_CEN);
00117 }
00118 
00119 static inline void genclk_disable(unsigned int id)
00120 {
00121         AVR32_PM.gcctrl[id] = 0;
00122 }
00123 
00124 
00125 #endif /* __ASSEMBLY__ */
00126 
00128 
00129 #endif /* CHIP_GENCLK_H_INCLUDED */
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