Xmega Application Note


sysclk.c

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00001 
00038 #include <compiler.h>
00039 #include <stdbool.h>
00040 #include <sysclk.h>
00041 #include <avr32/io.h>
00042 #include <flashc.h>
00043 #include <gpio.h>
00044 
00045 
00076 void sysclk_priv_enable_module(unsigned int bus_id, unsigned int module_index)
00077 {
00078   // Ahem... no, thanks.
00079 }
00080 
00089 void sysclk_priv_disable_module(unsigned int bus_id, unsigned int module_index)
00090 {
00091 }
00092 
00093 
00098 void sysclk_disable_pbb_module(unsigned int index)
00099 {
00100 }
00101 
00102 #ifdef CONFIG_USBCLK_SOURCE
00103 void sysclk_enable_usb(void)
00104 {
00105 }
00106 
00107 void sysclk_disable_usb(void)
00108 {
00109 }
00110 #endif // CONFIG_USBCLK_SOURCE
00111 
00112 
00113 void sysclk_init(void)
00114 {
00115   // Enable clock from fractional prescaler
00116   AVR32_PM.fpcvr = 0x80010001; // enable prescaler + div=min=2
00117   //AVR32_PM.fpcvr = 0x80000000 | (96<<16) | 125; // enable prescaler + Fout = 256*48000 KHz
00118   //AVR32_PM.fpcvr = 0x80000000 | (16<<16) | 125; // enable prescaler + Fout = 256*8000 KHz
00119 
00120   // Map Franctional prescaler output on generic clock (pin AH3 on Mistral)
00121   gpio_enable_module_pin( AVR32_PM_GCLK_3_0_PIN, AVR32_PM_GCLK_3_0_FUNCTION);
00122 
00123   // Map PLL output on generic clock CLK_GEN(0) (pin AL3 on Mistral)
00124   gpio_enable_module_pin( AVR32_PM_GCLK_0_0_PIN, AVR32_PM_GCLK_0_0_FUNCTION);
00125 }
00126 
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