00001 #include <string.h>
00002 #include "adc.h"
00003
00005 #define SAMPLE_COUNT 100
00006
00007 void adc_ch3_callback(ADC_t *adc, uint8_t ch, adc_result_t res);
00008
00010 int16_t adcSamples[4][SAMPLE_COUNT];
00011
00012 uint16_t interrupt_count = 0;
00013 int8_t offset;
00014
00015 int main(void)
00016 {
00017 struct adc_config adc_conf;
00018 struct adc_channel_config adc_ch_conf_ch0;
00019 struct adc_channel_config adc_ch_conf_ch1;
00020 struct adc_channel_config adc_ch_conf_ch2;
00021 struct adc_channel_config adc_ch_conf_ch3;
00022 uint16_t ADCA_cal;
00023
00024
00025
00026
00027
00028
00029 memset(&adc_conf, 0, sizeof(struct adc_config));
00030 memset(&adc_ch_conf_ch0, 0, sizeof(struct adc_channel_config));
00031 memset(&adc_ch_conf_ch1, 0, sizeof(struct adc_channel_config));
00032 memset(&adc_ch_conf_ch2, 0, sizeof(struct adc_channel_config));
00033 memset(&adc_ch_conf_ch3, 0, sizeof(struct adc_channel_config));
00034
00035
00036
00037 adc_set_conversion_parameters(&adc_conf, ADC_SIGN_ON, ADC_RES_12, ADC_REF_VCC);
00038
00039
00040 adc_set_clock_rate(&adc_conf, 200000UL);
00041
00042
00043 adc_write_configuration(&ADCA, &adc_conf);
00044
00045
00046 adcch_set_input(&adc_ch_conf_ch0, ADCCH_POS_PIN1, ADCCH_NEG_PIN1, 1);
00047 adcch_write_configuration(&ADCA, 0, &adc_ch_conf_ch0);
00048
00049 adc_enable(&ADCA);
00050
00051
00052 adc_start_conversion(&ADCA, ADC_CH0);
00053 adc_wait_for_interrupt_flag(&ADCA, ADC_CH0);
00054
00055
00056 adc_start_conversion(&ADCA, ADC_CH0);
00057 adc_wait_for_interrupt_flag(&ADCA, ADC_CH0);
00058 offset = adcch_get_result(&ADCA, 0);
00059 adc_disable(&ADCA);
00060
00061
00062
00063 adcch_set_input(&adc_ch_conf_ch0, ADCCH_POS_PIN4, ADCCH_NEG_NONE, 1);
00064 adcch_set_input(&adc_ch_conf_ch1, ADCCH_POS_PIN5, ADCCH_NEG_NONE, 1);
00065 adcch_set_input(&adc_ch_conf_ch2, ADCCH_POS_PIN6, ADCCH_NEG_NONE, 1);
00066 adcch_set_input(&adc_ch_conf_ch3, ADCCH_POS_PIN7, ADCCH_NEG_NONE, 1);
00067
00068
00069 adcch_write_configuration(&ADCA, 0, &adc_ch_conf_ch0);
00070 adcch_write_configuration(&ADCA, 1, &adc_ch_conf_ch1);
00071 adcch_write_configuration(&ADCA, 2, &adc_ch_conf_ch2);
00072 adcch_write_configuration(&ADCA, 3, &adc_ch_conf_ch3);
00073
00074
00075 adc_set_conversion_trigger(&adc_conf, ADC_TRIG_FREERUN_SWEEP, 4, 0);
00076 adc_write_configuration(&ADCA, &adc_conf);
00077
00078
00079 adc_enable(&ADCA);
00080
00081 for(int i = 0; i < SAMPLE_COUNT; ++i)
00082 {
00083 adc_start_conversion(&ADCA, ADC_CH0);
00084 adc_wait_for_interrupt_flag(&ADCA, ADC_CH0);
00085 adcSamples[0][i] = adcch_get_signed_result(&ADCA, 0) - offset;
00086
00087 adc_start_conversion(&ADCA, ADC_CH1);
00088 adc_wait_for_interrupt_flag(&ADCA, ADC_CH1);
00089 adcSamples[1][i] = adcch_get_signed_result(&ADCA, 1) - offset;
00090
00091 adc_start_conversion(&ADCA, ADC_CH2);
00092 adc_wait_for_interrupt_flag(&ADCA, ADC_CH2);
00093 adcSamples[2][i] = adcch_get_signed_result(&ADCA, 2) - offset;
00094
00095 adc_start_conversion(&ADCA, ADC_CH3);
00096 adc_wait_for_interrupt_flag(&ADCA, ADC_CH3);
00097 adcSamples[3][i] = adcch_get_signed_result(&ADCA, 3) - offset;
00098 }
00099
00100 adc_set_conversion_trigger(&adc_conf, ADC_TRIG_MANUAL, 4, 0);
00101 adc_write_configuration(&ADCA, &adc_conf);
00102 adc_disable(&ADCA);
00103
00104 }
00105
00106
00107