Xmega Application Note


System Clock Management
[Clock Management]

Collaboration diagram for System Clock Management:

Modules

 System Clock internals

Defines

#define CONFIG_SYSCLK_CPU_DIV   0
#define CONFIG_SYSCLK_PBA_DIV   0
 Configuration symbol for dividing the PBA clock frequency by $2^{CONFIG\_SYSCLK\_PBA\_DIV}$.

Functions

void sysclk_disable_usb (void)
 Disables the USB generick clock.
void sysclk_enable_usb (void)
 Enables the USB generick clock This one must be at 48MHz.
void sysclk_init (void)
 Initialize the synchronous clock system.
void sysclk_priv_disable_module (unsigned int bus_id, unsigned int module_index)
 Disable a maskable module clock.
void sysclk_priv_enable_module (unsigned int bus_id, unsigned int module_index)
 Enable a maskable module clock.

System Clock Port Numbers



enum  sysclk_port_id {
  SYSCLK_PORT_GEN, SYSCLK_PORT_A, SYSCLK_PORT_B, SYSCLK_PORT_C,
  SYSCLK_PORT_D, SYSCLK_PORT_E, SYSCLK_PORT_F
}

Enabling and disabling synchronous clocks



static void sysclk_disable_cpu_module (unsigned int index)
 Disable a module clock derived from the CPU clock.
static void sysclk_disable_hsb_module (unsigned int index)
 Disable a module clock derived from the HSB clock.
static void sysclk_disable_pba_module (unsigned int index)
 Disable a module clock derived from the PBA clock.
void sysclk_disable_pbb_module (unsigned int index)
 Disable a module clock derived from the PBB clock.
static void sysclk_enable_cpu_module (unsigned int index)
 Enable a module clock derived from the CPU clock.
static void sysclk_enable_hsb_module (unsigned int index)
 Enable a module clock derived from the HSB clock.
static void sysclk_enable_pba_module (unsigned int index)
 Enable a module clock derived from the PBA clock.
void sysclk_enable_pbb_module (unsigned int index)
 Disable a module clock derived from the CPU clock.

Enabling and disabling synchronous clocks



void sysclk_disable_module (enum sysclk_port_id port, uint8_t id)
 Disable the clock to peripheral id on port port.
void sysclk_enable_module (enum sysclk_port_id port, uint8_t id)
 Enable the clock to peripheral id on port port.
static bool sysclk_module_is_enabled (enum sysclk_port_id port, uint8_t id)
 Check if the synchronous clock is enabled for a module.

Querying the system clock and its derived clocks

The following functions may be used to query the current frequency of the system clock and the CPU and bus clocks derived from it. sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be available on all platforms, although some platforms may define additional accessors for various chip-internal bus clocks. These are usually not intended to be queried directly by generic code.



static uint32_t sysclk_get_cpu_hz (void)
 Return the current rate in Hz of the CPU clock.
static uint32_t sysclk_get_hsb_hz (void)
 Return the current rate in Hz of the High-Speed Bus clock.
static uint32_t sysclk_get_main_hz (void)
 Return the current rate in Hz of the main system clock.
static uint32_t sysclk_get_pba_hz (void)
 Return the current rate in Hz of the Peripheral Bus A clock.
static uint32_t sysclk_get_pbb_hz (void)
 Return the current rate in Hz of the Peripheral Bus B clock.

Querying the system clock and its derived clocks



static uint32_t sysclk_get_per2_hz (void)
 Return the current rate in Hz of clk_PER2.
static uint32_t sysclk_get_per4_hz (void)
 Return the current rate in Hz of clk_PER4.
static uint32_t sysclk_get_per_hz (void)
 Return the current rate in Hz of clk_PER.

System Clock Source and Prescaler configuration



static void sysclk_lock (void)
 Lock the system clock configuration.
static void sysclk_set_prescalers (uint8_t psadiv, uint8_t psbcdiv)
 Set system clock prescaler configuration.
static void sysclk_set_source (uint8_t src)
 Change the source of the main system clock.

System Clock Source and Prescaler configuration



static void sysclk_set_prescalers (unsigned int cpu_shift, unsigned int pba_shift, unsigned int pbb_shift)
 Set system clock prescaler configuration.
static void sysclk_set_source (uint_fast8_t src)
 Change the source of the main system clock.

Clocks on PORTA and PORTB

Note:
See the datasheet for available modules in the device.


#define SYSCLK_AC   PR_AC_bm
 Analog Comparator.
#define SYSCLK_ADC   PR_ADC_bm
 A/D Converter.
#define SYSCLK_DAC   PR_DAC_bm
 D/A Converter.

Clocks derived from the PBA clock



#define SYSCLK_ADC   (AVR32_ADC_CLK_PBA % 32)
 A/D Converter.
#define SYSCLK_DAC   (AVR32_ABDAC_CLK_PBA % 32)
 D/A Converter.
#define SYSCLK_GPIO   (AVR32_GPIO_CLK_PBA % 32)
 General-Purpose I/O.
#define SYSCLK_INTC   (AVR32_INTC_CLK_PBA % 32)
 Internal interrupt controller.
#define SYSCLK_PDCA_PB   (AVR32_PDCA_CLK_PBA % 32)
 PDCA periph bus interface.
#define SYSCLK_PM   (AVR32_PM_CLK_PBA % 32)
 PM/RTC/EIM configuration.
#define SYSCLK_PWM   (AVR32_PWM_CLK_PBA % 32)
 PWM.
#define SYSCLK_SPI0   (AVR32_SPI0_CLK_PBA % 32)
 SPI Controller 0.
#define SYSCLK_SPI1   (AVR32_SPI1_CLK_PBA % 32)
 SPI Controller 1.
#define SYSCLK_SSC   (AVR32_SSC_CLK_PBA % 32)
 Synchronous Serial Controller.
#define SYSCLK_TC   (AVR32_TC_CLK_PBA % 32)
 Timer/Counter.
#define SYSCLK_TWI   (AVR32_TWI_CLK_PBA % 32)
 TWI Controller.
#define SYSCLK_USART0   (AVR32_USART0_CLK_PBA % 32)
 USART 0.
#define SYSCLK_USART1   (AVR32_USART1_CLK_PBA % 32)
 USART 1.
#define SYSCLK_USART2   (AVR32_USART2_CLK_PBA % 32)
 USART 2.
#define SYSCLK_USART3   (AVR32_USART3_CLK_PBA % 32)
 USART 3.

Clocks not associated with any port

Note:
See the datasheet for available modules in the device.


#define SYSCLK_AES   PR_AES_bm
 AES Module.
#define SYSCLK_DMA   PR_DMA_bm
 DMA Controller.
#define SYSCLK_EBI   PR_EBI_bm
 Ext Bus Interface.
#define SYSCLK_EVSYS   PR_EVSYS_bm
 Event System.
#define SYSCLK_RTC   PR_RTC_bm
 Real-Time Counter.
#define SYSCLK_USB   PR_USB_bm
 USB Module.

Clocks derived from the HSB clock



#define SYSCLK_EBI   (AVR32_EBI_CLK_HSB % 32)
 External Bus Interface.
#define SYSCLK_FLASHC_DATA   (AVR32_FLASHC_CLK_HSB % 32)
 Flash data interface.
#define SYSCLK_MACB_DATA   (AVR32_MACB_CLK_HSB % 32)
 MACB DMA interface.
#define SYSCLK_PBA_BRIDGE   (AVR32_HMATRIX_CLK_HSB_PBA_BRIDGE % 32)
 HSB<->PBA bridge.
#define SYSCLK_PBB_BRIDGE   (AVR32_HMATRIX_CLK_HSB_PBB_BRIDGE % 32)
 HSB<->PBB bridge.
#define SYSCLK_PDCA_HSB   (AVR32_PDCA_CLK_HSB % 32)
 PDCA memory interface.
#define SYSCLK_USBC_DATA   (AVR32_USBC_CLK_HSB % 32)
 USB DMA and FIFO interface.

Clocks derived from the PBB clock



#define SYSCLK_FLASHC_REGS   (AVR32_FLASHC_CLK_PBB % 32)
 Flash Controller registers.
#define SYSCLK_HMATRIX   (AVR32_HMATRIX_CLK_PBB % 32)
 HSB Matrix configuration.
#define SYSCLK_MACB_REGS   (AVR32_MACB_CLK_PBB % 32)
 MACB Controller registers.
#define SYSCLK_SDRAMC_REGS   (AVR32_SDRAMC_CLK_PBB % 32)
 SDRAM Controller registers.
#define SYSCLK_SMC_REGS   (AVR32_SMC_CLK_PBB % 32)
 Static Memory Controller registers.
#define SYSCLK_USBC_REGS   (AVR32_USBC_CLK_PBB % 32)
 USBC registers.

Clocks on PORTC, PORTD, PORTE and PORTF

Note:
See the datasheet for available modules in the device.


#define SYSCLK_HIRES   PR_HIRES_bm
 Hi-Res Extension.
#define SYSCLK_SPI   PR_SPI_bm
 SPI controller.
#define SYSCLK_TC0   PR_TC0_bm
 Timer/Counter 0.
#define SYSCLK_TC1   PR_TC1_bm
 Timer/Counter 1.
#define SYSCLK_TWI   PR_TWI_bm
 TWI controller.
#define SYSCLK_USART0   PR_USART0_bm
 USART 0.
#define SYSCLK_USART1   PR_USART1_bm
 USART 1.

Clocks derived from the CPU clock



#define SYSCLK_OCD   AVR32_OCD_CLK_CPU
 On-Chip Debug system.
#define SYSCLK_SYSTIMER   AVR32_CORE_CLK_CPU_COUNT
 COUNT/COMPARE registers.

Prescaler A Setting (relative to CLKsys)



#define SYSCLK_PSADIV_1   CLK_PSADIV_1_gc
 Do not prescale.
#define SYSCLK_PSADIV_128   CLK_PSADIV_128_gc
 Prescale CLKper4 by 128.
#define SYSCLK_PSADIV_16   CLK_PSADIV_16_gc
 Prescale CLKper4 by 16.
#define SYSCLK_PSADIV_2   CLK_PSADIV_2_gc
 Prescale CLKper4 by 2.
#define SYSCLK_PSADIV_256   CLK_PSADIV_256_gc
 Prescale CLKper4 by 256.
#define SYSCLK_PSADIV_32   CLK_PSADIV_32_gc
 Prescale CLKper4 by 32.
#define SYSCLK_PSADIV_4   CLK_PSADIV_4_gc
 Prescale CLKper4 by 4.
#define SYSCLK_PSADIV_512   CLK_PSADIV_512_gc
 Prescale CLKper4 by 512.
#define SYSCLK_PSADIV_64   CLK_PSADIV_64_gc
 Prescale CLKper4 by 64.
#define SYSCLK_PSADIV_8   CLK_PSADIV_8_gc
 Prescale CLKper4 by 8.

Prescaler B and C Setting (relative to CLKper4)



#define SYSCLK_PSBCDIV_1_1   CLK_PSBCDIV_1_1_gc
 Do not prescale.
#define SYSCLK_PSBCDIV_1_2   CLK_PSBCDIV_1_2_gc
 Prescale CLKper and CLKcpu by 2.
#define SYSCLK_PSBCDIV_2_2   CLK_PSBCDIV_2_2_gc
 Prescale CLKper2 by 2, CLKper and CLKcpu by 4.
#define SYSCLK_PSBCDIV_4_1   CLK_PSBCDIV_4_1_gc
 Prescale CLKper2, CLKper and CLKcpu by 4.

System Clock Sources



#define SYSCLK_SRC_OSC0   1
 Use OSC0 as main clock.
#define SYSCLK_SRC_PLL0   2
 Use PLL0 as main clock.
#define SYSCLK_SRC_RCSYS   0
 Use slow clock as main clock.
#define SYSCLK_SRC_ZEPHYR_CLOCK   3
 Use Zephyr hardcoded clock.

System Clock Sources



#define SYSCLK_SRC_PLL   CLK_SCLKSEL_PLL_gc
 Phase-Locked Loop.
#define SYSCLK_SRC_RC2MHZ   CLK_SCLKSEL_RC2M_gc
 Internal 2 MHz RC oscillator.
#define SYSCLK_SRC_RC32KHZ   CLK_SCLKSEL_RC32K_gc
 Internal 32 KHz RC oscillator.
#define SYSCLK_SRC_RC32MHZ   CLK_SCLKSEL_RC32M_gc
 Internal 32 MHz RC oscillator.
#define SYSCLK_SRC_XOSC   CLK_SCLKSEL_XOSC_gc
 External oscillator.

USB Clock Sources



#define USBCLK_SRC_OSC0   0
 Use OSC0.
#define USBCLK_SRC_PLL0   1
 Use PLL0.
#define USBCLK_SRC_PLL1   2
 Use PLL1.

Detailed Description

The sysclk API covers the system clock and all clocks derived from it. The system clock is a chip-internal clock on which all synchronous clocks, i.e. CPU and bus/peripheral clocks, are based. The system clock is typically generated from one of a variety of sources, which may include crystal and RC oscillators as well as PLLs. The clocks derived from the system clock are sometimes also known as synchronous clocks, since they always run synchronously with respect to each other, as opposed to generic clocks which may run from different oscillators or PLLs.

Most applications should simply call sysclk_init() to initialize everything related to the system clock and its source (oscillator, PLL or DFLL), and leave it at that. More advanced applications, and platform-specific drivers, may require additional services from the clock system, some of which may be platform-specific.

Platform Dependencies

The sysclk API is partially chip- or platform-specific. While all platforms provide mostly the same functionality, there are some variations around how different bus types and clock tree structures are handled.

The following functions are available on all platforms with the same parameters and functionality. These functions may be called freely by portable applications, drivers and services:

The following functions are available on all platforms, but there may be variations in the function signature (i.e. parameters) and behaviour. These functions are typically called by platform-specific parts of drivers, and applications that aren't intended to be portable:

All other functions should be considered platform-specific. Enabling/disabling clocks to specific peripherals as well as determining the speed of these clocks should be done by calling functions provided by the driver for that peripheral.

Configuration Symbols

The following configuration symbols may be used to specify the initial system clock configuration. If any of the symbols are not set, reasonable defaults will be provided.


Define Documentation

#define CONFIG_SYSCLK_CPU_DIV   0

Definition at line 167 of file sysclk.h.

Referenced by sysclk_get_hsb_hz(), and sysclk_get_pbb_hz().

#define CONFIG_SYSCLK_PBA_DIV   0

Configuration symbol for dividing the PBA clock frequency by $2^{CONFIG\_SYSCLK\_PBA\_DIV}$.

If this symbol is not defined, the PBA clock frequency is not divided.

This symbol may be defined in conf_clock.h.

Definition at line 180 of file sysclk.h.

Referenced by sysclk_get_pba_hz().

#define SYSCLK_AC   PR_AC_bm

Analog Comparator.

Definition at line 153 of file sysclk.h.

#define SYSCLK_ADC   PR_ADC_bm

A/D Converter.

Definition at line 154 of file sysclk.h.

#define SYSCLK_ADC   (AVR32_ADC_CLK_PBA % 32)

A/D Converter.

Definition at line 107 of file sysclk.h.

Referenced by adc_disable_clock(), and adc_enable_clock().

#define SYSCLK_AES   PR_AES_bm

AES Module.

Definition at line 144 of file sysclk.h.

#define SYSCLK_DAC   PR_DAC_bm

D/A Converter.

Definition at line 155 of file sysclk.h.

#define SYSCLK_DAC   (AVR32_ABDAC_CLK_PBA % 32)

D/A Converter.

Definition at line 129 of file sysclk.h.

#define SYSCLK_DMA   PR_DMA_bm

DMA Controller.

Definition at line 140 of file sysclk.h.

#define SYSCLK_EBI   PR_EBI_bm

Ext Bus Interface.

Definition at line 143 of file sysclk.h.

#define SYSCLK_EBI   (AVR32_EBI_CLK_HSB % 32)

External Bus Interface.

Definition at line 93 of file sysclk.h.

#define SYSCLK_EVSYS   PR_EVSYS_bm

Event System.

Definition at line 141 of file sysclk.h.

#define SYSCLK_FLASHC_DATA   (AVR32_FLASHC_CLK_HSB % 32)

Flash data interface.

Definition at line 81 of file sysclk.h.

#define SYSCLK_FLASHC_REGS   (AVR32_FLASHC_CLK_PBB % 32)

Flash Controller registers.

Definition at line 139 of file sysclk.h.

#define SYSCLK_GPIO   (AVR32_GPIO_CLK_PBA % 32)

General-Purpose I/O.

Definition at line 101 of file sysclk.h.

#define SYSCLK_HIRES   PR_HIRES_bm

Hi-Res Extension.

Definition at line 165 of file sysclk.h.

#define SYSCLK_HMATRIX   (AVR32_HMATRIX_CLK_PBB % 32)

HSB Matrix configuration.

Definition at line 135 of file sysclk.h.

#define SYSCLK_INTC   (AVR32_INTC_CLK_PBA % 32)

Internal interrupt controller.

Definition at line 99 of file sysclk.h.

#define SYSCLK_MACB_DATA   (AVR32_MACB_CLK_HSB % 32)

MACB DMA interface.

Definition at line 89 of file sysclk.h.

#define SYSCLK_MACB_REGS   (AVR32_MACB_CLK_PBB % 32)

MACB Controller registers.

Definition at line 141 of file sysclk.h.

#define SYSCLK_OCD   AVR32_OCD_CLK_CPU

On-Chip Debug system.

Definition at line 74 of file sysclk.h.

#define SYSCLK_PBA_BRIDGE   (AVR32_HMATRIX_CLK_HSB_PBA_BRIDGE % 32)

HSB<->PBA bridge.

Definition at line 83 of file sysclk.h.

#define SYSCLK_PBB_BRIDGE   (AVR32_HMATRIX_CLK_HSB_PBB_BRIDGE % 32)

HSB<->PBB bridge.

Definition at line 85 of file sysclk.h.

#define SYSCLK_PDCA_HSB   (AVR32_PDCA_CLK_HSB % 32)

PDCA memory interface.

Definition at line 91 of file sysclk.h.

#define SYSCLK_PDCA_PB   (AVR32_PDCA_CLK_PBA % 32)

PDCA periph bus interface.

Definition at line 103 of file sysclk.h.

#define SYSCLK_PM   (AVR32_PM_CLK_PBA % 32)

PM/RTC/EIM configuration.

Definition at line 105 of file sysclk.h.

#define SYSCLK_PSADIV_1   CLK_PSADIV_1_gc

Do not prescale.

Definition at line 100 of file sysclk.h.

Referenced by sysclk_init().

#define SYSCLK_PSADIV_128   CLK_PSADIV_128_gc

Prescale CLKper4 by 128.

Definition at line 107 of file sysclk.h.

#define SYSCLK_PSADIV_16   CLK_PSADIV_16_gc

Prescale CLKper4 by 16.

Definition at line 104 of file sysclk.h.

#define SYSCLK_PSADIV_2   CLK_PSADIV_2_gc

Prescale CLKper4 by 2.

Definition at line 101 of file sysclk.h.

#define SYSCLK_PSADIV_256   CLK_PSADIV_256_gc

Prescale CLKper4 by 256.

Definition at line 108 of file sysclk.h.

#define SYSCLK_PSADIV_32   CLK_PSADIV_32_gc

Prescale CLKper4 by 32.

Definition at line 105 of file sysclk.h.

#define SYSCLK_PSADIV_4   CLK_PSADIV_4_gc

Prescale CLKper4 by 4.

Definition at line 102 of file sysclk.h.

#define SYSCLK_PSADIV_512   CLK_PSADIV_512_gc

Prescale CLKper4 by 512.

Definition at line 109 of file sysclk.h.

#define SYSCLK_PSADIV_64   CLK_PSADIV_64_gc

Prescale CLKper4 by 64.

Definition at line 106 of file sysclk.h.

#define SYSCLK_PSADIV_8   CLK_PSADIV_8_gc

Prescale CLKper4 by 8.

Definition at line 103 of file sysclk.h.

#define SYSCLK_PSBCDIV_1_1   CLK_PSBCDIV_1_1_gc

Do not prescale.

Definition at line 115 of file sysclk.h.

Referenced by sysclk_get_per2_hz(), and sysclk_init().

#define SYSCLK_PSBCDIV_1_2   CLK_PSBCDIV_1_2_gc

Prescale CLKper and CLKcpu by 2.

Definition at line 117 of file sysclk.h.

Referenced by sysclk_get_per2_hz().

#define SYSCLK_PSBCDIV_2_2   CLK_PSBCDIV_2_2_gc

Prescale CLKper2 by 2, CLKper and CLKcpu by 4.

Definition at line 121 of file sysclk.h.

Referenced by sysclk_get_per2_hz().

#define SYSCLK_PSBCDIV_4_1   CLK_PSBCDIV_4_1_gc

Prescale CLKper2, CLKper and CLKcpu by 4.

Definition at line 119 of file sysclk.h.

Referenced by sysclk_get_per2_hz().

#define SYSCLK_PWM   (AVR32_PWM_CLK_PBA % 32)

PWM.

Definition at line 123 of file sysclk.h.

#define SYSCLK_RTC   PR_RTC_bm

Real-Time Counter.

Definition at line 142 of file sysclk.h.

Referenced by rtc_init().

#define SYSCLK_SDRAMC_REGS   (AVR32_SDRAMC_CLK_PBB % 32)

SDRAM Controller registers.

Definition at line 145 of file sysclk.h.

#define SYSCLK_SMC_REGS   (AVR32_SMC_CLK_PBB % 32)

Static Memory Controller registers.

Definition at line 143 of file sysclk.h.

#define SYSCLK_SPI   PR_SPI_bm

SPI controller.

Definition at line 166 of file sysclk.h.

#define SYSCLK_SPI0   (AVR32_SPI0_CLK_PBA % 32)

SPI Controller 0.

Definition at line 109 of file sysclk.h.

#define SYSCLK_SPI1   (AVR32_SPI1_CLK_PBA % 32)

SPI Controller 1.

Definition at line 111 of file sysclk.h.

#define SYSCLK_SRC_OSC0   1

Use OSC0 as main clock.

Definition at line 59 of file sysclk.h.

#define SYSCLK_SRC_PLL   CLK_SCLKSEL_PLL_gc

Phase-Locked Loop.

Definition at line 95 of file sysclk.h.

Referenced by sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_PLL0   2

Use PLL0 as main clock.

Definition at line 60 of file sysclk.h.

Referenced by sysclk_set_source().

#define SYSCLK_SRC_RC2MHZ   CLK_SCLKSEL_RC2M_gc

Internal 2 MHz RC oscillator.

Definition at line 87 of file sysclk.h.

Referenced by sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_RC32KHZ   CLK_SCLKSEL_RC32K_gc

Internal 32 KHz RC oscillator.

Definition at line 91 of file sysclk.h.

Referenced by sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_RC32MHZ   CLK_SCLKSEL_RC32M_gc

Internal 32 MHz RC oscillator.

Definition at line 89 of file sysclk.h.

Referenced by sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_RCSYS   0

Use slow clock as main clock.

Definition at line 58 of file sysclk.h.

#define SYSCLK_SRC_XOSC   CLK_SCLKSEL_XOSC_gc

External oscillator.

Definition at line 93 of file sysclk.h.

Referenced by sysclk_get_main_hz(), and sysclk_init().

#define SYSCLK_SRC_ZEPHYR_CLOCK   3

Use Zephyr hardcoded clock.

Definition at line 61 of file sysclk.h.

#define SYSCLK_SSC   (AVR32_SSC_CLK_PBA % 32)

Synchronous Serial Controller.

Definition at line 125 of file sysclk.h.

#define SYSCLK_SYSTIMER   AVR32_CORE_CLK_CPU_COUNT

COUNT/COMPARE registers.

Definition at line 75 of file sysclk.h.

#define SYSCLK_TC   (AVR32_TC_CLK_PBA % 32)

Timer/Counter.

Definition at line 127 of file sysclk.h.

#define SYSCLK_TC0   PR_TC0_bm

Timer/Counter 0.

Definition at line 163 of file sysclk.h.

#define SYSCLK_TC1   PR_TC1_bm

Timer/Counter 1.

Definition at line 164 of file sysclk.h.

#define SYSCLK_TWI   PR_TWI_bm

TWI controller.

Definition at line 169 of file sysclk.h.

#define SYSCLK_TWI   (AVR32_TWI_CLK_PBA % 32)

TWI Controller.

Definition at line 113 of file sysclk.h.

#define SYSCLK_USART0   PR_USART0_bm

USART 0.

Definition at line 167 of file sysclk.h.

#define SYSCLK_USART0   (AVR32_USART0_CLK_PBA % 32)

USART 0.

Definition at line 115 of file sysclk.h.

#define SYSCLK_USART1   PR_USART1_bm

USART 1.

Definition at line 168 of file sysclk.h.

#define SYSCLK_USART1   (AVR32_USART1_CLK_PBA % 32)

USART 1.

Definition at line 117 of file sysclk.h.

#define SYSCLK_USART2   (AVR32_USART2_CLK_PBA % 32)

USART 2.

Definition at line 119 of file sysclk.h.

#define SYSCLK_USART3   (AVR32_USART3_CLK_PBA % 32)

USART 3.

Definition at line 121 of file sysclk.h.

#define SYSCLK_USB   PR_USB_bm

USB Module.

Definition at line 145 of file sysclk.h.

#define SYSCLK_USBC_DATA   (AVR32_USBC_CLK_HSB % 32)

USB DMA and FIFO interface.

Definition at line 87 of file sysclk.h.

#define SYSCLK_USBC_REGS   (AVR32_USBC_CLK_PBB % 32)

USBC registers.

Definition at line 137 of file sysclk.h.

#define USBCLK_SRC_OSC0   0

Use OSC0.

Definition at line 66 of file sysclk.h.

#define USBCLK_SRC_PLL0   1

Use PLL0.

Definition at line 67 of file sysclk.h.

#define USBCLK_SRC_PLL1   2

Use PLL1.

Definition at line 68 of file sysclk.h.


Enumeration Type Documentation

Enumerator:
SYSCLK_PORT_GEN 

Devices not associated with a specific port.

SYSCLK_PORT_A 

Devices on PORTA.

SYSCLK_PORT_B 

Devices on PORTB.

SYSCLK_PORT_C 

Devices on PORTC.

SYSCLK_PORT_D 

Devices on PORTD.

SYSCLK_PORT_E 

Devices on PORTE.

SYSCLK_PORT_F 

Devices on PORTF.

Definition at line 125 of file sysclk.h.

00125                     {
00126         SYSCLK_PORT_GEN,   
00127         SYSCLK_PORT_A,     
00128         SYSCLK_PORT_B,     
00129         SYSCLK_PORT_C,     
00130         SYSCLK_PORT_D,     
00131         SYSCLK_PORT_E,     
00132         SYSCLK_PORT_F,     
00133 };


Function Documentation

static void sysclk_disable_cpu_module ( unsigned int  index  )  [inline, static]

Disable a module clock derived from the CPU clock.

Parameters:
index Index of the module clock in the CPUMASK register

Definition at line 288 of file sysclk.h.

References sysclk_priv_disable_module().

00289 {
00290         sysclk_priv_disable_module(AVR32_PM_CLK_GRP_CPU, index);
00291 }

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static void sysclk_disable_hsb_module ( unsigned int  index  )  [inline, static]

Disable a module clock derived from the HSB clock.

Parameters:
index Index of the module clock in the HSBMASK register

Definition at line 306 of file sysclk.h.

References sysclk_priv_disable_module().

00307 {
00308         sysclk_priv_disable_module(AVR32_PM_CLK_GRP_HSB, index);
00309 }

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void sysclk_disable_module ( enum sysclk_port_id  port,
uint8_t  id 
)

Disable the clock to peripheral id on port port.

Parameters:
port ID of the port to which the module is connected (one of the SYSCLK_PORT_* definitions).
id The ID (bitmask) of the peripheral module to be disabled.

Definition at line 166 of file sysclk.c.

References cpu_irq_restore(), and cpu_irq_save().

Referenced by adc_disable_clock().

00167 {
00168         irqflags_t flags = cpu_irq_save();
00169 
00170         *((uint8_t *)&PR.PRGEN + port) |= id;
00171 
00172         cpu_irq_restore(flags);
00173 }

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static void sysclk_disable_pba_module ( unsigned int  index  )  [inline, static]

Disable a module clock derived from the PBA clock.

Parameters:
index Index of the module clock in the PBAMASK register

Definition at line 324 of file sysclk.h.

References sysclk_priv_disable_module().

00325 {
00326         sysclk_priv_disable_module(AVR32_PM_CLK_GRP_PBA, index);
00327 }

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void sysclk_disable_pbb_module ( unsigned int  index  ) 

Disable a module clock derived from the PBB clock.

Parameters:
index Index of the module clock in the PBBMASK register

Definition at line 98 of file sysclk.c.

00099 {
00100 }

void sysclk_disable_usb ( void   ) 

Disables the USB generick clock.

static void sysclk_enable_cpu_module ( unsigned int  index  )  [inline, static]

Enable a module clock derived from the CPU clock.

Parameters:
index Index of the module clock in the CPUMASK register

Definition at line 279 of file sysclk.h.

References sysclk_priv_enable_module().

00280 {
00281         sysclk_priv_enable_module(AVR32_PM_CLK_GRP_CPU, index);
00282 }

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static void sysclk_enable_hsb_module ( unsigned int  index  )  [inline, static]

Enable a module clock derived from the HSB clock.

Parameters:
index Index of the module clock in the HSBMASK register

Definition at line 297 of file sysclk.h.

References sysclk_priv_enable_module().

00298 {
00299         sysclk_priv_enable_module(AVR32_PM_CLK_GRP_HSB, index);
00300 }

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void sysclk_enable_module ( enum sysclk_port_id  port,
uint8_t  id 
)

Enable the clock to peripheral id on port port.

Parameters:
port ID of the port to which the module is connected (one of the SYSCLK_PORT_* definitions).
id The ID (bitmask) of the peripheral module to be enabled.

Definition at line 157 of file sysclk.c.

References cpu_irq_restore(), and cpu_irq_save().

Referenced by adc_enable_clock(), and rtc_init().

00158 {
00159         irqflags_t flags = cpu_irq_save();
00160 
00161         *((uint8_t *)&PR.PRGEN + port) &= ~id;
00162 
00163         cpu_irq_restore(flags);
00164 }

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static void sysclk_enable_pba_module ( unsigned int  index  )  [inline, static]

Enable a module clock derived from the PBA clock.

Parameters:
index Index of the module clock in the PBAMASK register

Definition at line 315 of file sysclk.h.

References sysclk_priv_enable_module().

00316 {
00317         sysclk_priv_enable_module(AVR32_PM_CLK_GRP_PBA, index);
00318 }

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void sysclk_enable_pbb_module ( unsigned int  index  ) 

Disable a module clock derived from the CPU clock.

Parameters:
index Index of the module clock in the CPUMASK register
void sysclk_enable_usb ( void   ) 

Enables the USB generick clock This one must be at 48MHz.

static uint32_t sysclk_get_cpu_hz ( void   )  [inline, static]

Return the current rate in Hz of the CPU clock.

Todo:
This function assumes that the CPU always runs at the system clock frequency. We want to support at least two more scenarios: Fixed CPU/bus clock dividers (config symbols) and dynamic CPU/bus clock dividers (which may change at run time). Ditto for all the bus clocks.

Definition at line 304 of file sysclk.h.

References sysclk_get_per_hz().

00305 {
00306         return sysclk_get_per_hz();
00307 }

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static uint32_t sysclk_get_hsb_hz ( void   )  [inline, static]

Return the current rate in Hz of the High-Speed Bus clock.

Definition at line 244 of file sysclk.h.

References CONFIG_SYSCLK_CPU_DIV, and sysclk_get_main_hz().

00245 {
00246         return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV;
00247 }

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static uint32_t sysclk_get_main_hz ( void   )  [inline, static]

Return the current rate in Hz of the main system clock.

Todo:
This function assumes that the main clock source never changes once it's been set up, and that PLL0 always runs at the compile-time configured default rate. While this is probably the most common configuration, which we want to support as a special case for performance reasons, we will at some point need to support more dynamic setups as well.
Todo:
This function assumes that the main clock source never changes once it's been set up, and that PLL0 always runs at the compile-time configured default rate. While this is probably the most common configuration, which we want to support as a special case for performance reasons, we will at some point need to support more dynamic setups as well.

Definition at line 216 of file sysclk.h.

References BOARD_XOSC_HZ, pll_get_default_rate, SYSCLK_SRC_PLL, SYSCLK_SRC_RC2MHZ, SYSCLK_SRC_RC32KHZ, SYSCLK_SRC_RC32MHZ, and SYSCLK_SRC_XOSC.

Referenced by sysclk_get_hsb_hz(), sysclk_get_pba_hz(), sysclk_get_pbb_hz(), and sysclk_get_per4_hz().

00217 {
00218         switch (CONFIG_SYSCLK_SOURCE) {
00219         case SYSCLK_SRC_RC2MHZ:
00220                 return 2000000UL;
00221 
00222         case SYSCLK_SRC_RC32MHZ:
00223 #ifdef CONFIG_OSC_RC32_CAL
00224                 return CONFIG_OSC_RC32_CAL;
00225 #else
00226                 return 32000000UL;
00227 #endif
00228 
00229         case SYSCLK_SRC_RC32KHZ:
00230                 return 32768UL;
00231 
00232 #ifdef BOARD_XOSC_HZ
00233         case SYSCLK_SRC_XOSC:
00234                 return BOARD_XOSC_HZ;
00235 #endif
00236 
00237 #ifdef CONFIG_PLL0_SOURCE
00238         case SYSCLK_SRC_PLL:
00239                 return pll_get_default_rate(0);
00240 #endif
00241 
00242         default:
00243                 //unhandled_case(CONFIG_SYSCLK_SOURCE);
00244                 return 0;
00245         }
00246 }

static uint32_t sysclk_get_pba_hz ( void   )  [inline, static]

Return the current rate in Hz of the Peripheral Bus A clock.

Definition at line 252 of file sysclk.h.

References CONFIG_SYSCLK_PBA_DIV, and sysclk_get_main_hz().

00253 {
00254         return sysclk_get_main_hz() >> CONFIG_SYSCLK_PBA_DIV;
00255 }

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static uint32_t sysclk_get_pbb_hz ( void   )  [inline, static]

Return the current rate in Hz of the Peripheral Bus B clock.

Definition at line 260 of file sysclk.h.

References CONFIG_SYSCLK_CPU_DIV, and sysclk_get_main_hz().

00261 {
00262         return sysclk_get_main_hz() >> CONFIG_SYSCLK_CPU_DIV;
00263 }

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static uint32_t sysclk_get_per2_hz ( void   )  [inline, static]

Return the current rate in Hz of clk_PER2.

This clock can run up to two times faster than the CPU clock.

Definition at line 269 of file sysclk.h.

References CONFIG_SYSCLK_PSBCDIV, sysclk_get_per4_hz(), SYSCLK_PSBCDIV_1_1, SYSCLK_PSBCDIV_1_2, SYSCLK_PSBCDIV_2_2, and SYSCLK_PSBCDIV_4_1.

Referenced by sysclk_get_per_hz().

00270 {
00271         switch (CONFIG_SYSCLK_PSBCDIV) {
00272         case SYSCLK_PSBCDIV_1_1: /* Fall through */
00273         case SYSCLK_PSBCDIV_1_2:
00274                 return sysclk_get_per4_hz();
00275 
00276         case SYSCLK_PSBCDIV_4_1:
00277                 return sysclk_get_per4_hz() / 4;
00278 
00279         case SYSCLK_PSBCDIV_2_2:
00280                 return sysclk_get_per4_hz() / 2;
00281 
00282         default:
00283                 //unhandled_case(CONFIG_SYSCLK_PSBCDIV);
00284                 return 0;
00285         }
00286 }

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static uint32_t sysclk_get_per4_hz ( void   )  [inline, static]

Return the current rate in Hz of clk_PER4.

This clock can run up to four times faster than the CPU clock.

Definition at line 253 of file sysclk.h.

References CONFIG_SYSCLK_PSADIV, and sysclk_get_main_hz().

Referenced by sysclk_get_per2_hz().

00254 {
00255         uint8_t shift = 0;
00256 
00257         if (CONFIG_SYSCLK_PSADIV & (1U << CLK_PSADIV_gp)) {
00258                 shift = (CONFIG_SYSCLK_PSADIV >> (1 + CLK_PSADIV_gp)) + 1;
00259         }
00260 
00261         return sysclk_get_main_hz() >> shift;
00262 }

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static uint32_t sysclk_get_per_hz ( void   )  [inline, static]

Return the current rate in Hz of clk_PER.

This clock always runs at the same rate as the CPU clock.

Definition at line 293 of file sysclk.h.

References CONFIG_SYSCLK_PSBCDIV, and sysclk_get_per2_hz().

Referenced by adc_set_clock_rate(), and sysclk_get_cpu_hz().

00294 {
00295         if (CONFIG_SYSCLK_PSBCDIV & (1U << CLK_PSBCDIV_gp))
00296                 return sysclk_get_per2_hz() / 2;
00297         else
00298                 return sysclk_get_per2_hz();
00299 }

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void sysclk_init ( void   ) 

Initialize the synchronous clock system.

This function will initialize the system clock and its source. This includes:

  • Mask all synchronous clocks except for any clocks which are essential for normal operation (for example internal memory clocks).
  • Set up the system clock prescalers as specified by the application's configuration file.
  • Enable the clock source specified by the application's configuration file (oscillator or PLL) and wait for it to become stable.
  • Set the main system clock source to the clock specified by the application's configuration file.

Since all non-essential peripheral clocks are initially disabled, it is the responsibility of the peripheral driver to re-enable any clocks that are needed for normal operation.

Definition at line 113 of file sysclk.c.

References Assert, ccp_write_io(), CONFIG_SYSCLK_PSADIV, CONFIG_SYSCLK_PSBCDIV, LSB, MSB, nvm_read_production_signature_row(), osc_disable(), osc_enable(), osc_enable_autocalibration(), OSC_ID_RC2MHZ, OSC_ID_RC32KHZ, OSC_ID_RC32MHZ, OSC_ID_XOSC, osc_user_calibration(), osc_wait_ready(), PLL_SRC_RC2MHZ, reg, SYSCLK_PORT_F, SYSCLK_PSADIV_1, SYSCLK_PSBCDIV_1_1, sysclk_set_prescalers(), SYSCLK_SRC_PLL, SYSCLK_SRC_RC2MHZ, SYSCLK_SRC_RC32KHZ, SYSCLK_SRC_RC32MHZ, and SYSCLK_SRC_XOSC.

00114 {
00115   // Enable clock from fractional prescaler
00116   AVR32_PM.fpcvr = 0x80010001; // enable prescaler + div=min=2
00117   //AVR32_PM.fpcvr = 0x80000000 | (96<<16) | 125; // enable prescaler + Fout = 256*48000 KHz
00118   //AVR32_PM.fpcvr = 0x80000000 | (16<<16) | 125; // enable prescaler + Fout = 256*8000 KHz
00119 
00120   // Map Franctional prescaler output on generic clock (pin AH3 on Mistral)
00121   gpio_enable_module_pin( AVR32_PM_GCLK_3_0_PIN, AVR32_PM_GCLK_3_0_FUNCTION);
00122 
00123   // Map PLL output on generic clock CLK_GEN(0) (pin AL3 on Mistral)
00124   gpio_enable_module_pin( AVR32_PM_GCLK_0_0_PIN, AVR32_PM_GCLK_0_0_FUNCTION);
00125 }

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static void sysclk_lock ( void   )  [inline, static]

Lock the system clock configuration.

This function will lock the current system clock source and prescaler configuration, preventing any further changes.

Definition at line 395 of file sysclk.h.

References ccp_write_io().

00396 {
00397         ccp_write_io((uint8_t *)&CLK.LOCK, CLK_LOCK_bm);
00398 }

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static bool sysclk_module_is_enabled ( enum sysclk_port_id  port,
uint8_t  id 
) [inline, static]

Check if the synchronous clock is enabled for a module.

Parameters:
port ID of the port to which the module is connected (one of the SYSCLK_PORT_* definitions).
id The ID (bitmask) of the peripheral module to check (one of the SYSCLK_* module definitions).
Return values:
true If the clock for module id on port is enabled.
false If the clock for module id on port is disabled.

Definition at line 343 of file sysclk.h.

00345 {
00346         uint8_t mask = *((uint8_t *)&PR.PRGEN + port);
00347         return (mask & id) == 0;
00348 }

void sysclk_priv_disable_module ( unsigned int  bus_id,
unsigned int  module_index 
)

Disable a maskable module clock.

For internal use only.

Parameters:
bus_id Bus index starting at 0 and following the same order as the xxxMASK registers.
module_index Index of the module to be disabled. This is the bit number in the corresponding xxxMASK register.

Definition at line 89 of file sysclk.c.

Referenced by sysclk_disable_cpu_module(), sysclk_disable_hsb_module(), and sysclk_disable_pba_module().

00090 {
00091 }

void sysclk_priv_enable_module ( unsigned int  bus_id,
unsigned int  module_index 
)

Enable a maskable module clock.

For internal use only.

Parameters:
bus_id Bus index starting at 0 and following the same order as the xxxMASK registers.
module_index Index of the module to be enabled. This is the bit number in the corresponding xxxMASK register.

Definition at line 76 of file sysclk.c.

Referenced by sysclk_enable_cpu_module(), sysclk_enable_hsb_module(), and sysclk_enable_pba_module().

00077 {
00078   // Ahem... no, thanks.
00079 }

static void sysclk_set_prescalers ( uint8_t  psadiv,
uint8_t  psbcdiv 
) [inline, static]

Set system clock prescaler configuration.

This function will change the system clock prescaler configuration to match the parameters.

Note:
The parameters to this function are device-specific.
Parameters:
psadiv The prescaler A setting (one of the SYSCLK_PSADIV_* definitions). This determines the clkPER4 frequency.
psbcdiv The prescaler B and C settings (one of the SYSCLK_PSBCDIV_* definitions). These determine the clkPER2, clkPER and clkCPU frequencies.

Definition at line 373 of file sysclk.h.

References ccp_write_io().

00374 {
00375         ccp_write_io((uint8_t *)&CLK.PSCTRL, psadiv | psbcdiv);
00376 }

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static void sysclk_set_prescalers ( unsigned int  cpu_shift,
unsigned int  pba_shift,
unsigned int  pbb_shift 
) [inline, static]

Set system clock prescaler configuration.

This function will change the system clock prescaler configuration to match the parameters.

Note:
The parameters to this function are device-specific.
Parameters:
cpu_shift The CPU clock will be divided by $2^{cpu\_shift}$
pba_shift The PBA clock will be divided by $2^{pba\_shift}$
pbb_shift The PBB clock will be divided by $2^{pbb\_shift}$

Definition at line 349 of file sysclk.h.

References Assert.

Referenced by sysclk_init().

00351 {
00352         uint32_t cksel = 0;
00353 
00354         Assert(cpu_shift <= pba_shift);
00355         Assert(cpu_shift <= pbb_shift);
00356 
00357         if (cpu_shift > 0)
00358                 cksel = ((cpu_shift - 1) << AVR32_PM_CKSEL_CPUSEL)
00359                                 | (1U << AVR32_PM_CKSEL_CPUDIV);
00360 
00361         if (pba_shift > 0)
00362                 cksel |= ((pba_shift - 1) << AVR32_PM_CKSEL_PBASEL)
00363                                 | (1U << AVR32_PM_CKSEL_PBADIV);
00364 
00365         if (pbb_shift > 0)
00366                 cksel |= ((pbb_shift - 1) << AVR32_PM_CKSEL_PBBSEL)
00367                                 | (1U << AVR32_PM_CKSEL_PBBDIV);
00368 
00369         AVR32_PM.cksel = cksel;
00370 }

static void sysclk_set_source ( uint8_t  src  )  [inline, static]

Change the source of the main system clock.

Parameters:
src The new system clock source. Must be one of the constants from the System Clock Sources section.

Definition at line 384 of file sysclk.h.

References ccp_write_io().

00385 {
00386         ccp_write_io((uint8_t *)&CLK.CTRL, src);
00387 }

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static void sysclk_set_source ( uint_fast8_t  src  )  [inline, static]

Change the source of the main system clock.

Precondition:
The appropriate Flash Wait state must be set previously.
Parameters:
src The new system clock source. Must be one of the constants from the System Clock Sources section.

Definition at line 380 of file sysclk.h.

References Assert, cpu_irq_restore(), cpu_irq_save(), and SYSCLK_SRC_PLL0.

00381 {
00382         irqflags_t flags;
00383         uint32_t   mcctrl;
00384 
00385         Assert(src <= SYSCLK_SRC_PLL0);
00386 
00387         flags = cpu_irq_save();
00388         mcctrl = AVR32_PM.mcctrl & ~AVR32_PM_MCCTRL_MCSEL_MASK;
00389         mcctrl |= src << AVR32_PM_MCCTRL_MCSEL;
00390         AVR32_PM.mcctrl = mcctrl;
00391         cpu_irq_restore(flags);
00392 }

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@DOC_TITLE@
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