Xmega Application Note | |||||
Chip-specific PLL definitions. More...
#include <avr32/io.h>
#include <osc.h>
#include <stdbool.h>
#include <stdint.h>
Go to the source code of this file.
Data Structures | |
struct | pll_config |
Hardware-specific representation of PLL configuration. More... | |
Defines | |
#define | NR_PLLS 2 |
#define | pll_config_defaults(cfg, pll_id) |
#define | pll_get_default_rate(pll_id) |
#define | PLL_MAX_HZ 240000000 |
#define | PLL_MIN_HZ 40000000 |
#define | PLL_TIMEOUT_MS div_ceil(1000 * (PLL_MAX_STARTUP_CYCLES * 2), OSC_SLOW_MIN_HZ) |
Number of milliseconds to wait for PLL lock. | |
Chip-specific PLL characteristics | |
#define | PLL_MAX_STARTUP_CYCLES ((1 << AVR32_PM_PLL0_PLLCOUNT_SIZE) - 1) |
Maximum PLL startup time in number of slow clock cycles. | |
Chip-specific PLL options | |
#define | PLL_NR_OPTIONS AVR32_PM_PLL0_PLLOPT_SIZE |
Number of PLL options. | |
#define | PLL_OPT_OUTPUT_DIV 1 |
Divide output frequency by two. | |
#define | PLL_OPT_VCO_RANGE_LOW 0 |
VCO frequency range is 80-180 MHz (160-240 MHz if unset). | |
#define | PLL_OPT_WBM_DISABLE 2 |
Disable wide-bandwidth mode. | |
#define | PLL_VCO_LOW_THRESHOLD AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ |
The threshold under which to set the PLL_OPT_VCO_RANGE_LOW option. | |
Enumerations | |
enum | pll_source { PLL_SRC_OSC0 = 0, PLL_SRC_OSC1 = 1, PLL_NR_SOURCES, PLL_SRC_RC2MHZ = OSC_PLLSRC_RC2M_gc, PLL_SRC_RC32MHZ = OSC_PLLSRC_RC32M_gc, PLL_SRC_XOSC = OSC_PLLSRC_XOSC_gc } |
PLL clock source. More... | |
Functions | |
PLL configuration | |
static void | pll_config_clear_option (struct pll_config *cfg, unsigned int option) |
Clear the PLL option bit option in the configuration cfg. | |
static void | pll_config_init (struct pll_config *cfg, enum pll_source src, unsigned int div, unsigned int mul) |
Initialize PLL configuration from standard parameters. | |
static void | pll_config_read (struct pll_config *cfg, unsigned int pll_id) |
Read the currently active configuration of pll_id. | |
static void | pll_config_set_option (struct pll_config *cfg, unsigned int option) |
Set the PLL option bit option in the configuration cfg. | |
static void | pll_config_write (const struct pll_config *cfg, unsigned int pll_id) |
Activate the configuration cfg on pll_id. | |
Interaction with the PLL hardware | |
static void | pll_disable (unsigned int pll_id) |
Disable the PLL identified by pll_id. | |
static void | pll_enable (const struct pll_config *cfg, unsigned int pll_id) |
Activate the configuration cfg and enable PLL pll_id. | |
static bool | pll_is_locked (unsigned int pll_id) |
Determine whether the PLL is locked or not. |
Chip-specific PLL definitions.
Copyright (C) 2010 Atmel Corporation. All rights reserved.
Definition in file pll.h.
Generated on Fri Oct 22 12:15:25 2010 for AVR1300 Using the Xmega ADC by ![]() |