Xmega Application Note


pll.h File Reference

Chip-specific PLL management functions. More...

#include <compiler.h>
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Data Structures

struct  pll_config
 Hardware-specific representation of PLL configuration. More...

Defines

#define NR_PLLS   1
#define pll_config_defaults(cfg, pll_id)
#define pll_get_default_rate(pll_id)
#define PLL_MAX_HZ   200000000UL
#define PLL_MIN_HZ   10000000UL
#define PLL_NR_OPTIONS   0

Enumerations

enum  pll_source {
  PLL_SRC_OSC0 = 0, PLL_SRC_OSC1 = 1, PLL_NR_SOURCES, PLL_SRC_RC2MHZ = OSC_PLLSRC_RC2M_gc,
  PLL_SRC_RC32MHZ = OSC_PLLSRC_RC32M_gc, PLL_SRC_XOSC = OSC_PLLSRC_XOSC_gc
}

Functions

static uint32_t pll_get_default_rate_priv (enum pll_source src, unsigned int mul, unsigned int div)
 Return clock rate for specified PLL settings.
PLL configuration

static void pll_config_init (struct pll_config *cfg, enum pll_source src, unsigned int div, unsigned int mul)
 Initialize PLL configuration from standard parameters.
static void pll_config_read (struct pll_config *cfg, unsigned int pll_id)
 Read the currently active configuration of pll_id.
static void pll_config_write (const struct pll_config *cfg, unsigned int pll_id)
 Activate the configuration cfg on pll_id.
Interaction with the PLL hardware

static void pll_disable (unsigned int pll_id)
 Disable the PLL identified by pll_id.
static void pll_enable (const struct pll_config *cfg, unsigned int pll_id)
 Activate the configuration cfg and enable PLL pll_id.
static bool pll_is_locked (unsigned int pll_id)
 Determine whether the PLL is locked or not.

Detailed Description

Chip-specific PLL management functions.

Copyright (C) 2010 Atmel Corporation. All rights reserved.

Definition in file pll.h.

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