Xmega Application Note | |||||
Chip-specific system clock management functions. More...
#include <avr32/io.h>
Go to the source code of this file.
Defines | |
#define | CONFIG_SYSCLK_CPU_DIV 0 |
#define | CONFIG_SYSCLK_PBA_DIV 0 |
Configuration symbol for dividing the PBA clock frequency by ![]() | |
#define | FCPU_HZ FCPU_HZ_ZEPHYR |
#define | FCPU_HZ_MISTRAL 20000000 |
#define | FCPU_HZ_ZEPHYR 48000000 |
#define | FPBA_HZ FCPU_HZ |
Clocks derived from the PBA clock | |
#define | SYSCLK_ADC (AVR32_ADC_CLK_PBA % 32) |
A/D Converter. | |
#define | SYSCLK_DAC (AVR32_ABDAC_CLK_PBA % 32) |
D/A Converter. | |
#define | SYSCLK_GPIO (AVR32_GPIO_CLK_PBA % 32) |
General-Purpose I/O. | |
#define | SYSCLK_INTC (AVR32_INTC_CLK_PBA % 32) |
Internal interrupt controller. | |
#define | SYSCLK_PDCA_PB (AVR32_PDCA_CLK_PBA % 32) |
PDCA periph bus interface. | |
#define | SYSCLK_PM (AVR32_PM_CLK_PBA % 32) |
PM/RTC/EIM configuration. | |
#define | SYSCLK_PWM (AVR32_PWM_CLK_PBA % 32) |
PWM. | |
#define | SYSCLK_SPI0 (AVR32_SPI0_CLK_PBA % 32) |
SPI Controller 0. | |
#define | SYSCLK_SPI1 (AVR32_SPI1_CLK_PBA % 32) |
SPI Controller 1. | |
#define | SYSCLK_SSC (AVR32_SSC_CLK_PBA % 32) |
Synchronous Serial Controller. | |
#define | SYSCLK_TC (AVR32_TC_CLK_PBA % 32) |
Timer/Counter. | |
#define | SYSCLK_TWI (AVR32_TWI_CLK_PBA % 32) |
TWI Controller. | |
#define | SYSCLK_USART0 (AVR32_USART0_CLK_PBA % 32) |
USART 0. | |
#define | SYSCLK_USART1 (AVR32_USART1_CLK_PBA % 32) |
USART 1. | |
#define | SYSCLK_USART2 (AVR32_USART2_CLK_PBA % 32) |
USART 2. | |
#define | SYSCLK_USART3 (AVR32_USART3_CLK_PBA % 32) |
USART 3. | |
Clocks derived from the HSB clock | |
#define | SYSCLK_EBI (AVR32_EBI_CLK_HSB % 32) |
External Bus Interface. | |
#define | SYSCLK_FLASHC_DATA (AVR32_FLASHC_CLK_HSB % 32) |
Flash data interface. | |
#define | SYSCLK_MACB_DATA (AVR32_MACB_CLK_HSB % 32) |
MACB DMA interface. | |
#define | SYSCLK_PBA_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBA_BRIDGE % 32) |
HSB<->PBA bridge. | |
#define | SYSCLK_PBB_BRIDGE (AVR32_HMATRIX_CLK_HSB_PBB_BRIDGE % 32) |
HSB<->PBB bridge. | |
#define | SYSCLK_PDCA_HSB (AVR32_PDCA_CLK_HSB % 32) |
PDCA memory interface. | |
#define | SYSCLK_USBC_DATA (AVR32_USBC_CLK_HSB % 32) |
USB DMA and FIFO interface. | |
Clocks derived from the PBB clock | |
#define | SYSCLK_FLASHC_REGS (AVR32_FLASHC_CLK_PBB % 32) |
Flash Controller registers. | |
#define | SYSCLK_HMATRIX (AVR32_HMATRIX_CLK_PBB % 32) |
HSB Matrix configuration. | |
#define | SYSCLK_MACB_REGS (AVR32_MACB_CLK_PBB % 32) |
MACB Controller registers. | |
#define | SYSCLK_SDRAMC_REGS (AVR32_SDRAMC_CLK_PBB % 32) |
SDRAM Controller registers. | |
#define | SYSCLK_SMC_REGS (AVR32_SMC_CLK_PBB % 32) |
Static Memory Controller registers. | |
#define | SYSCLK_USBC_REGS (AVR32_USBC_CLK_PBB % 32) |
USBC registers. | |
Clocks derived from the CPU clock | |
#define | SYSCLK_OCD AVR32_OCD_CLK_CPU |
On-Chip Debug system. | |
#define | SYSCLK_SYSTIMER AVR32_CORE_CLK_CPU_COUNT |
COUNT/COMPARE registers. | |
System Clock Sources | |
#define | SYSCLK_SRC_OSC0 1 |
Use OSC0 as main clock. | |
#define | SYSCLK_SRC_PLL0 2 |
Use PLL0 as main clock. | |
#define | SYSCLK_SRC_RCSYS 0 |
Use slow clock as main clock. | |
#define | SYSCLK_SRC_ZEPHYR_CLOCK 3 |
Use Zephyr hardcoded clock. | |
USB Clock Sources | |
#define | USBCLK_SRC_OSC0 0 |
Use OSC0. | |
#define | USBCLK_SRC_PLL0 1 |
Use PLL0. | |
#define | USBCLK_SRC_PLL1 2 |
Use PLL1. | |
Functions | |
void | sysclk_disable_usb (void) |
Disables the USB generick clock. | |
void | sysclk_enable_usb (void) |
Enables the USB generick clock This one must be at 48MHz. | |
void | sysclk_init (void) |
Initialize the synchronous clock system. | |
void | sysclk_priv_disable_module (unsigned int bus_id, unsigned int module_index) |
Disable a maskable module clock. | |
void | sysclk_priv_enable_module (unsigned int bus_id, unsigned int module_index) |
Enable a maskable module clock. | |
Enabling and disabling synchronous clocks | |
static void | sysclk_disable_cpu_module (unsigned int index) |
Disable a module clock derived from the CPU clock. | |
static void | sysclk_disable_hsb_module (unsigned int index) |
Disable a module clock derived from the HSB clock. | |
static void | sysclk_disable_pba_module (unsigned int index) |
Disable a module clock derived from the PBA clock. | |
void | sysclk_disable_pbb_module (unsigned int index) |
Disable a module clock derived from the PBB clock. | |
static void | sysclk_enable_cpu_module (unsigned int index) |
Enable a module clock derived from the CPU clock. | |
static void | sysclk_enable_hsb_module (unsigned int index) |
Enable a module clock derived from the HSB clock. | |
static void | sysclk_enable_pba_module (unsigned int index) |
Enable a module clock derived from the PBA clock. | |
void | sysclk_enable_pbb_module (unsigned int index) |
Disable a module clock derived from the CPU clock. | |
Querying the system clock and its derived clocks | |
The following functions may be used to query the current frequency of the system clock and the CPU and bus clocks derived from it. sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be available on all platforms, although some platforms may define additional accessors for various chip-internal bus clocks. These are usually not intended to be queried directly by generic code. | |
static uint32_t | sysclk_get_cpu_hz (void) |
Return the current rate in Hz of the CPU clock. | |
static uint32_t | sysclk_get_hsb_hz (void) |
Return the current rate in Hz of the High-Speed Bus clock. | |
static uint32_t | sysclk_get_main_hz (void) |
Return the current rate in Hz of the main system clock. | |
static uint32_t | sysclk_get_pba_hz (void) |
Return the current rate in Hz of the Peripheral Bus A clock. | |
static uint32_t | sysclk_get_pbb_hz (void) |
Return the current rate in Hz of the Peripheral Bus B clock. | |
System Clock Source and Prescaler configuration | |
static void | sysclk_set_prescalers (unsigned int cpu_shift, unsigned int pba_shift, unsigned int pbb_shift) |
Set system clock prescaler configuration. | |
static void | sysclk_set_source (uint_fast8_t src) |
Change the source of the main system clock. |
Chip-specific system clock management functions.
Copyright (C) 2010 Atmel Corporation. All rights reserved.
Definition in file sysclk.h.
Generated on Fri Oct 22 12:15:25 2010 for AVR1300 Using the Xmega ADC by ![]() |