; ***************************************************************************************** ; * TWI_MASTER FUNKTIONEN - INTERRUPT BASIEREND nach AVR315 * ; ***************************************************************************************** ;------------------------------------------------------------------------------------------ // TWI DEFINES ;------------------------------------------------------------------------------------------ ; Baudrate-Berechnung ;.equ f_CPU = 16000000 ; CPU Frequenz in Hz ;.equ f_TWI = 400000 ; TWI Frequenz in Hz .equ TWI_BAUD_RATE = 12 ;[400.000 Hz];((f_CPU / (2 * f_TWI)) - 8) ; Baud register setting calculation .equ TWI_PORT = PORTC .equ TWI_SCL = 0 .equ TWI_SDA = 1 ;------------------------------------------------------------------------------------------ // TWI KONSTANTEN BEREITSTELLEN ;------------------------------------------------------------------------------------------ ;Flagbelegung bei TWI_STATE .equ TWI_busy = 0 ; 1 --> TWI ist beschäftigt / 0 --> frei .equ TWI_ready = 1 ; 1 --> TWI-Telegramm abgearbeitet - empfangene Daten müssen noch verarbeitet werden .equ TWI_error = 2 ; 1 --> Error ;.equ TWI_STATE = 3..7 ; Bit 3-7 --> Error State .equ twi_start_cmd = (1<0 -> dann SLA+W [SLA+0] sbr r16, (1<<0) ; Wenn "TWI_WR_CNT" =0 -> dann SLA+R [SLA+1] twi_process_sla: sts (TWDR), r16 ; SLA+R/W -> TWDR ldi XL, Byte1(TWI_BUFFER) ; init Buffer Pointer ldi XH, Byte2(TWI_BUFFER) ; init Buffer Pointer sts (pTWI_BUFFER +0), XL ; init Buffer Pointer sts (pTWI_BUFFER +1), XH ; init Buffer Pointer ldi r16, twi_wr_data_cmd rjmp TWI_int_end twi_process_write: lds r16, (TWI_WR_CNT) tst r16 breq twi_process_test_rd dec r16 sts (TWI_WR_CNT), r16 lds XL, (pTWI_BUFFER +0) lds XH, (pTWI_BUFFER +1) ld r16, X+ sts (pTWI_BUFFER +0), XL sts (pTWI_BUFFER +1), XH sts (TWDR), r16 ldi r16, twi_wr_data_cmd rjmp TWI_int_end twi_process_read: lds XL, (pTWI_BUFFER +0) lds XH, (pTWI_BUFFER +1) lds r16, (TWDR) st X+, r16 sts (pTWI_BUFFER +0), XL sts (pTWI_BUFFER +1), XH twi_process_sla_r: lds r16, (TWI_RD_CNT) dec r16 breq twi_process_nack_read sts (TWI_RD_CNT), r16 ldi r16, twi_rd_data_ack_cmd rjmp TWI_int_end twi_process_last_read: lds XL, (pTWI_BUFFER +0) lds XH, (pTWI_BUFFER +1) lds r16, (TWDR) st X+, r16 rjmp twi_process_stop twi_process_test_rd: lds r16, (TWI_RD_CNT) tst r16 brne twi_process_restart rjmp twi_process_stop twi_process_restart: ldi r16, twi_start_cmd rjmp TWI_int_end twi_process_nack_read: ldi r16, twi_rd_data_nack_cmd rjmp TWI_int_end twi_process_error: cpi r16, TWI_SLAw_nACK breq twi_bus_error cpi r16, TWI_SLAr_nACK breq twi_bus_error cpi r16, TWI_DATAw_nACK breq twi_bus_error cpi r16, TWI_ARBLOST breq twi_arbitration_lost twi_bus_error: cbr r17, (1<