Design Overview for MeinSchema

PropertyValue
Project Name:c:\temp\xilinxtest\meinprojekt
Target Device:xc2s50
Report Generated:Thursday 11/24/05 at 14:43
Printable Summary (View as HTML)MeinSchema_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Logic Distribution:    
Number of Slices containing only related logic:000% 
Number of Slices containing unrelated logic:000% 
Number of bonded IOBs:31402% 

Performance Summary

PropertyValue
Number of Unrouted Signals:All signals are completely routed.
Number of Failing Constraints:0

Failing Constraints

Constraint(s)RequestedActualLogic Levels
No Constraints Found   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentThursday 11/24/05 at 14:29
Translation ReportCurrentThursday 11/24/05 at 14:35
Map ReportCurrentThursday 11/24/05 at 14:36
Pad ReportCurrentThursday 11/24/05 at 14:36
Place and Route ReportCurrentThursday 11/24/05 at 14:36
Post Place and Route Static Timing ReportCurrentThursday 11/24/05 at 14:36
Bitgen ReportCurrentThursday 11/24/05 at 14:43