<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="6.1">
<drawing>
<library>
<packages>
<package name="LQFP100">
</package>
</packages>
<symbols>
<symbol name="SIDE1">
<pin name="PE2"/>
<pin name="PE3"/>
<pin name="PE4"/>
<pin name="PE5"/>
<pin name="PE6"/>
<pin name="VBAT"/>
<pin name="PC13/RTC_AF1"/>
<pin name="PC14/OSC32_IN"/>
<pin name="PC15/OSC32_OUT"/>
<pin name="VSS"/>
<pin name="VDD"/>
<pin name="PH0/OSC_IN"/>
<pin name="PH1/OSC_OUT"/>
<pin name="NRST"/>
<pin name="PC0"/>
<pin name="PC1"/>
<pin name="PC2/SPI2_MISO"/>
<pin name="PC3/SPI2_MOSI"/>
<pin name="VDD1"/>
<pin name="VSSA"/>
<pin name="VREF+"/>
<pin name="VDDA"/>
<pin name="PA0/USART2_CTS/USART4_TX/WKUP"/>
<pin name="PA1/USART2_RTS/USART4_RX"/>
<pin name="PA2/USART2_TX"/>
</symbol>
<symbol name="SIDE2">
<pin name="PA3/USART2_RX"/>
<pin name="VSS2"/>
<pin name="VDD2"/>
<pin name="PA4/SPI1_NSS/SPI3_NSS/USART2_CK"/>
<pin name="PA5/SPI1_SCK"/>
<pin name="PA6/SPI1_MISO"/>
<pin name="PA7/SPI1_MOSI"/>
<pin name="PC4"/>
<pin name="PC5"/>
<pin name="PB0"/>
<pin name="PB1"/>
<pin name="PE7"/>
<pin name="PE8"/>
<pin name="PE9"/>
<pin name="PE10"/>
<pin name="PE11"/>
<pin name="PE12"/>
<pin name="PE13"/>
<pin name="PE14"/>
<pin name="PE15"/>
<pin name="PB10/I2C2_SCL/SPI2_SCK/USART3_TX"/>
<pin name="PB11/I2C2_SDA/USART3_RX"/>
<pin name="PB2/BOOT1"/>
<pin name="VCAP_1"/>
<pin name="VDD3"/>
</symbol>
<symbol name="SIDE3">
<pin name="VDD4"/>
<pin name="VSS4"/>
<pin name="VCAP_2"/>
<pin name="PA13/JTMS/SWDIO"/>
<pin name="PA12/USART1_RTS/CAN1_TX/OTG_FS_DP+"/>
<pin name="PA11/USART1_CTS/CAN1_RX/OTG_FS_D-"/>
<pin name="PA10/USART1_RX"/>
<pin name="PA9/USART1_TX/I2C3_SMBA"/>
<pin name="PA8/USART1_CK/I2C3_SCL"/>
<pin name="PC9/I2C3_SDA"/>
<pin name="PC8/USART6_CK"/>
<pin name="PC6/USART6_TX"/>
<pin name="PD15"/>
<pin name="PD14"/>
<pin name="PD13"/>
<pin name="PD12/USART3_RTS"/>
<pin name="PD11/USART3_CTS"/>
<pin name="PD10/USART3_CK"/>
<pin name="PD9/USART3_RX"/>
<pin name="PD8/USART3_TX"/>
<pin name="PB15/SPI2_MOSI"/>
<pin name="PB14/SPI2_MISO/USART3_RTS"/>
<pin name="PC7/USART6_RX"/>
<pin name="PB13/SPI2_SCK_USART3_CTS_CAN2_TX"/>
<pin name="PB12/SPI2_NSS/I2C2_SMBA/USART3_CK/CAN2_RX"/>
</symbol>
<symbol name="SIDE4">
<pin name="VDD5"/>
<pin name="PDR_ON"/>
<pin name="PE1"/>
<pin name="PE0"/>
<pin name="PB9/I2C1_SDA/SPI2_NSS/CAN1_TX"/>
<pin name="PB8/I2C1_SCL/CAN1_RX"/>
<pin name="BOOT0"/>
<pin name="PB7/I2C1_SDA/USART1_RX"/>
<pin name="PB6/I2C1_SCL/CAN2_TX/USART1_TX"/>
<pin name="PB5/I2C1_SMBA/CAN2_RX/SPI1_MOSI/SPI3_MOSI"/>
<pin name="PB4/NJTRST/SPI3_MISO/SPI1_MISO"/>
<pin name="PD7/USART2_CK"/>
<pin name="PD6/USART2_RX"/>
<pin name="PD5/USART2_TX"/>
<pin name="PD4/USART2_RTS"/>
<pin name="PD3/USART2_CTS"/>
<pin name="PD2/UART5_RX"/>
<pin name="PD1/CAN1_TX"/>
<pin name="PD0/CAN1_RX"/>
<pin name="PC12/UART5_TX/SPI3_MOSI/USART3_CK"/>
<pin name="PC11/UART4_RX/SPI3_MISO/USART3_RX"/>
<pin name="PC10/SPI3_SCK/UART4_TX/USART3_CK"/>
<pin name="PB3/JTDO/TRACESWO/SPI3_SCK/SPI1_SCK"/>
<pin name="PA15/JTDI/SPI3_NSS/SPI1_NSS"/>
<pin name="PA14/JTCK/SWCLK"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="STM32F407VX">
<description>STmicroelectronics Cortex M4 Series

Typ: STM32F407Vx LQFP100

Copyright 2012 by Ersan Günes, Quantitec, info@quantitec.de</description>
<gates>
<gate name="G$1" symbol="SIDE1"/>
<gate name="G$2" symbol="SIDE2"/>
<gate name="G$3" symbol="SIDE3"/>
<gate name="G$4" symbol="SIDE4"/>
</gates>
<devices>
<device name="" package="LQFP100">
<connects>
<connect gate="G$1" pin="NRST" pad="14"/>
<connect gate="G$1" pin="PA0/USART2_CTS/USART4_TX/WKUP" pad="23"/>
<connect gate="G$1" pin="PA1/USART2_RTS/USART4_RX" pad="24"/>
<connect gate="G$1" pin="PA2/USART2_TX" pad="25"/>
<connect gate="G$1" pin="PC0" pad="15"/>
<connect gate="G$1" pin="PC1" pad="16"/>
<connect gate="G$1" pin="PC13/RTC_AF1" pad="7"/>
<connect gate="G$1" pin="PC14/OSC32_IN" pad="8"/>
<connect gate="G$1" pin="PC15/OSC32_OUT" pad="9"/>
<connect gate="G$1" pin="PC2/SPI2_MISO" pad="17"/>
<connect gate="G$1" pin="PC3/SPI2_MOSI" pad="18"/>
<connect gate="G$1" pin="PE2" pad="1"/>
<connect gate="G$1" pin="PE3" pad="2"/>
<connect gate="G$1" pin="PE4" pad="3"/>
<connect gate="G$1" pin="PE5" pad="4"/>
<connect gate="G$1" pin="PE6" pad="5"/>
<connect gate="G$1" pin="PH0/OSC_IN" pad="12"/>
<connect gate="G$1" pin="PH1/OSC_OUT" pad="13"/>
<connect gate="G$1" pin="VBAT" pad="6"/>
<connect gate="G$1" pin="VDD" pad="11"/>
<connect gate="G$1" pin="VDD1" pad="19"/>
<connect gate="G$1" pin="VDDA" pad="22"/>
<connect gate="G$1" pin="VREF+" pad="21"/>
<connect gate="G$1" pin="VSS" pad="10"/>
<connect gate="G$1" pin="VSSA" pad="20"/>
<connect gate="G$2" pin="PA3/USART2_RX" pad="26"/>
<connect gate="G$2" pin="PA4/SPI1_NSS/SPI3_NSS/USART2_CK" pad="29"/>
<connect gate="G$2" pin="PA5/SPI1_SCK" pad="30"/>
<connect gate="G$2" pin="PA6/SPI1_MISO" pad="31"/>
<connect gate="G$2" pin="PA7/SPI1_MOSI" pad="32"/>
<connect gate="G$2" pin="PB0" pad="35"/>
<connect gate="G$2" pin="PB1" pad="36"/>
<connect gate="G$2" pin="PB10/I2C2_SCL/SPI2_SCK/USART3_TX" pad="47"/>
<connect gate="G$2" pin="PB11/I2C2_SDA/USART3_RX" pad="48"/>
<connect gate="G$2" pin="PB2/BOOT1" pad="37"/>
<connect gate="G$2" pin="PC4" pad="33"/>
<connect gate="G$2" pin="PC5" pad="34"/>
<connect gate="G$2" pin="PE10" pad="41"/>
<connect gate="G$2" pin="PE11" pad="42"/>
<connect gate="G$2" pin="PE12" pad="43"/>
<connect gate="G$2" pin="PE13" pad="44"/>
<connect gate="G$2" pin="PE14" pad="45"/>
<connect gate="G$2" pin="PE15" pad="46"/>
<connect gate="G$2" pin="PE7" pad="38"/>
<connect gate="G$2" pin="PE8" pad="39"/>
<connect gate="G$2" pin="PE9" pad="40"/>
<connect gate="G$2" pin="VCAP_1" pad="49"/>
<connect gate="G$2" pin="VDD2" pad="28"/>
<connect gate="G$2" pin="VDD3" pad="50"/>
<connect gate="G$2" pin="VSS2" pad="27"/>
<connect gate="G$3" pin="PA10/USART1_RX" pad="69"/>
<connect gate="G$3" pin="PA11/USART1_CTS/CAN1_RX/OTG_FS_D-" pad="70"/>
<connect gate="G$3" pin="PA12/USART1_RTS/CAN1_TX/OTG_FS_DP+" pad="71"/>
<connect gate="G$3" pin="PA13/JTMS/SWDIO" pad="72"/>
<connect gate="G$3" pin="PA8/USART1_CK/I2C3_SCL" pad="67"/>
<connect gate="G$3" pin="PA9/USART1_TX/I2C3_SMBA" pad="68"/>
<connect gate="G$3" pin="PB12/SPI2_NSS/I2C2_SMBA/USART3_CK/CAN2_RX" pad="51"/>
<connect gate="G$3" pin="PB13/SPI2_SCK_USART3_CTS_CAN2_TX" pad="52"/>
<connect gate="G$3" pin="PB14/SPI2_MISO/USART3_RTS" pad="53"/>
<connect gate="G$3" pin="PB15/SPI2_MOSI" pad="54"/>
<connect gate="G$3" pin="PC6/USART6_TX" pad="63"/>
<connect gate="G$3" pin="PC7/USART6_RX" pad="64"/>
<connect gate="G$3" pin="PC8/USART6_CK" pad="65"/>
<connect gate="G$3" pin="PC9/I2C3_SDA" pad="66"/>
<connect gate="G$3" pin="PD10/USART3_CK" pad="57"/>
<connect gate="G$3" pin="PD11/USART3_CTS" pad="58"/>
<connect gate="G$3" pin="PD12/USART3_RTS" pad="59"/>
<connect gate="G$3" pin="PD13" pad="60"/>
<connect gate="G$3" pin="PD14" pad="61"/>
<connect gate="G$3" pin="PD15" pad="62"/>
<connect gate="G$3" pin="PD8/USART3_TX" pad="55"/>
<connect gate="G$3" pin="PD9/USART3_RX" pad="56"/>
<connect gate="G$3" pin="VCAP_2" pad="73"/>
<connect gate="G$3" pin="VDD4" pad="75"/>
<connect gate="G$3" pin="VSS4" pad="74"/>
<connect gate="G$4" pin="BOOT0" pad="94"/>
<connect gate="G$4" pin="PA14/JTCK/SWCLK" pad="76"/>
<connect gate="G$4" pin="PA15/JTDI/SPI3_NSS/SPI1_NSS" pad="77"/>
<connect gate="G$4" pin="PB3/JTDO/TRACESWO/SPI3_SCK/SPI1_SCK" pad="89"/>
<connect gate="G$4" pin="PB4/NJTRST/SPI3_MISO/SPI1_MISO" pad="90"/>
<connect gate="G$4" pin="PB5/I2C1_SMBA/CAN2_RX/SPI1_MOSI/SPI3_MOSI" pad="91"/>
<connect gate="G$4" pin="PB6/I2C1_SCL/CAN2_TX/USART1_TX" pad="92"/>
<connect gate="G$4" pin="PB7/I2C1_SDA/USART1_RX" pad="93"/>
<connect gate="G$4" pin="PB8/I2C1_SCL/CAN1_RX" pad="95"/>
<connect gate="G$4" pin="PB9/I2C1_SDA/SPI2_NSS/CAN1_TX" pad="96"/>
<connect gate="G$4" pin="PC10/SPI3_SCK/UART4_TX/USART3_CK" pad="78"/>
<connect gate="G$4" pin="PC11/UART4_RX/SPI3_MISO/USART3_RX" pad="79"/>
<connect gate="G$4" pin="PC12/UART5_TX/SPI3_MOSI/USART3_CK" pad="80"/>
<connect gate="G$4" pin="PD0/CAN1_RX" pad="81"/>
<connect gate="G$4" pin="PD1/CAN1_TX" pad="82"/>
<connect gate="G$4" pin="PD2/UART5_RX" pad="83"/>
<connect gate="G$4" pin="PD3/USART2_CTS" pad="84"/>
<connect gate="G$4" pin="PD4/USART2_RTS" pad="85"/>
<connect gate="G$4" pin="PD5/USART2_TX" pad="86"/>
<connect gate="G$4" pin="PD6/USART2_RX" pad="87"/>
<connect gate="G$4" pin="PD7/USART2_CK" pad="88"/>
<connect gate="G$4" pin="PDR_ON" pad="99"/>
<connect gate="G$4" pin="PE0" pad="97"/>
<connect gate="G$4" pin="PE1" pad="98"/>
<connect gate="G$4" pin="VDD5" pad="100"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
