;----------------------------------------------------------------------- ;| | Z80 | 8080 | | | ;|Mnemonic |SZHPNC|SZHP gnum C|Description |Notes | ;|----------+------+------+---------------------+----------------------| ;|CALL cc,nn|------|---- -|Conditional Call |If cc CALL | ;|CALL nn |------|---- -|Unconditional Call |-[SP]=PC,PC=nn | ;|DEC ss |------|---- -|Decrement |ss=ss-1 | ;|DI |------|---- -|Disable Interrupts | | ;|EI |------|---- -|Enable Interrupts | | ;|EX DE,HL |------|---- -|Exchange |DE<->HL | ;|EX [SP],HL|------|---- -|Exchange |[SP]<->HL | ;|HALT |------|---- -|Halt | | ;|IN A,[n] |------|---- -|Input |A=[n] | ;|INC ss |------|---- -|Increment |ss=ss+1 | ;|JP [HL] |------|---- -|Unconditional Jump |PC=[HL] | ;|JP cc,nn |------|---- -|Conditional Jump |If cc JP | ;|JP nn |------|---- -|Unconditional Jump |PC=nn | ;|LD dst,src|------|---- -|Load |dst=src | ;|NOP |------|---- -|No Operation | | ;|OUT [n],A |------|---- -|Output |[n]=A | ;|POP qq |------|---- -|Pop |qq=[SP]+ | ;|PUSH qq |------|---- -|Push |-[SP]=qq | ;|RET |------|---- -|Return |PC=[SP]+ | ;|RET cc |------|---- -|Conditional Return |If cc RET | ;|RST p |------|---- -|Restart | (p=0H,8H,10H,...,38H)| ;|CPL |--1-1-|---- -|Complement |A=~A | ;|SCF |--0-01|---- 1|Set Carry Flag |CY=1 | ;|RLA |--0-0*|---- *|Rotate Left Acc. |A={CY,A}<- | ;|RLCA |--0-0*|---- *|Rotate Left Circular |A=A<- | ;|RRA |--0-0*|---- *|Rotate Right Acc. |A=->{CY,A} | ;|RRCA |--0-0*|---- *|Rotate Right Circular|A=->A | ;|ADD HL,ss |--?-0*|---- *|Add |HL=HL+ss | ;|CCF |--?-0*|---- *|Complement Carry Flag|CY=~CY | ;|AND s |**1P00|**?P 0|Logical AND |A=A&s | ;|OR s |**0P00|**0P 0|Logical inclusive OR |A=Avs | ;|XOR s |**0P00|**0P 0|Logical Exclusive OR |A=Axs | ;|INC [HL] |***V0-|***P -|Increment |[HL]=[HL]+1 | ;|INC r |***V0-|***P -|Increment |r=r+1 | ;|DEC s |***V1-|***P -|Decrement |s=s-1 | ;|DAA |***P-*|***P *|Decimal Adjust Acc. |A=BCD format | ;|ADC A,s |***V0*|***P *|Add with Carry |A=A+s+CY | ;|ADD A,s |***V0*|***P *|Add |A=A+s | ;|CP s |***V1*|***P *|Compare |A-s | ;|SBC A,s |***V1*|***P *|Subtract with Carry |A=A-s-CY | ;|SUB s |***V1*|***P *|Subtract |A=A-s | ;|CPD |****1-| |Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1| ;|CPDR |****1-| |Compare, Dec., Repeat|CPD till A=[HL]or BC=0| ;|CPI |****1-| |Compare and Increment|A-[HL],HL=HL+1,BC=BC-1| ;|CPIR |****1-| |Compare, Inc., Repeat|CPI till A=[HL]or BC=0| ;|IN r,[C] |***P0-| |Input |r=[C] | ;|INC [xx+d]|***V0-| |Increment |[xx+d]=[xx+d]+1 | ;|NEG |***V1*| |Negate |A=-A | ;|LD A,i |**0*0-| |Load |A=i (i=I,R)| ;|RL m |**0P0*| |Rotate Left |m={CY,m}<- | ;|RLC m |**0P0*| |Rotate Left Circular |m=m<- | ;|RR m |**0P0*| |Rotate Right |m=->{CY,m} | ;|RRC m |**0P0*| |Rotate Right Circular|m=->m | ;|SLA m |**0P0*| |Shift Left Arithmetic|m=m*2 | ;|SRA m |**0P0*| |Shift Right Arith. |m=m/2 | ;|SRL m |**0P0*| |Shift Right Logical |m=->{0,m,CY} | ;|RLD |**0P0-| |Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##| ;|RRD |**0P0-| |Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##| ;|ADC HL,ss |**?V0*| |Add with Carry |HL=HL+ss+CY | ;|SBC HL,ss |**?V1*| |Subtract with Carry |HL=HL-ss-CY | ;|DEC xx |------| |Decrement |xx=xx-1 | ;|DJNZ e |------| |Dec., Jump Non-Zero |B=B-1 till B=0 | ;|EX AF,AF' |------| |Exchange |AF<->AF' | ;|EX [SP],xx|------| |Exchange |[SP]<->xx | ;|EXX |------| |Exchange |qq<->qq' (except AF)| ;|IM n |------| |Interrupt Mode | (n=0,1,2)| ;|INC xx |------| |Increment |xx=xx+1 | ;|JP [xx] |------| |Unconditional Jump |PC=[xx] | ;|JR cc,e |------| |Conditional Jump |If cc JR(cc=C,NC,NZ,Z)| ;|JR e |------| |Unconditional Jump |PC=PC+e | ;|OUT [C],r |------| |Output |[C]=r | ;|POP xx |------| |Pop |xx=[SP]+ | ;|PUSH xx |------| |Push |-[SP]=xx | ;|RES b,m |------| |Reset bit |m=m&{~2^b} | ;|RETI |------| |Return from Interrupt|PC=[SP]+ | ;|RETN |------| |Return from NMI |PC=[SP]+ | ;|SET b,m |------| |Set bit |m=mv{2^b} | ;|LDD |--0*0-| |Load and Decrement |[DE]=[HL],HL=HL-1,# | ;|LDI |--0*0-| |Load and Increment |[DE]=[HL],HL=HL+1,# | ;|LDDR |--000-| |Load, Dec., Repeat |LDD till BC=0 | ;|LDIR |--000-| |Load, Inc., Repeat |LDI till BC=0 | ;|ADD IX,pp |--?-0*| |Add |IX=IX+pp | ;|ADD IY,rr |--?-0*| |Add |IY=IY+rr | ;|BIT b,m |?*1?0-| |Test Bit |m&{2^b} | ;|IND |?*??1-| |Input and Decrement |[HL]=[C],HL=HL-1,B=B-1| ;|INI |?*??1-| |Input and Increment |[HL]=[C],HL=HL+1,B=B-1| ;|OUTD |?*??1-| |Output and Decrement |[C]=[HL],HL=HL-1,B=B-1| ;|OUTI |?*??1-| |Output and Increment |[C]=[HL],HL=HL+1,B=B-1| ;|INDR |?1??1-| |Input, Dec., Repeat |IND till B=0 | ;|INIR |?1??1-| |Input, Inc., Repeat |INI till B=0 | ;|OTDR |?1??1-| |Output, Dec., Repeat |OUTD till B=0 | ;|OTIR |?1??1-| |Output, Inc., Repeat |OUTI till B=0 | ;|----------+------+------+--------------------------------------------|