Xmega Application Note


ebi_sram_example.c File Reference


Detailed Description

XMEGA EBI driver SRAM example source.

This file contains an example application that demonstrates the EBI driver. It shows how to configure the EBI for 3-port SRAM operation. The example fills a data pattern in the memory, copies back and compares the copied block.

Application note:
AVR1312: Using the XMEGA External Bus Interface
Documentation
For comprehensive code documentation, supported compilers, compiler settings and supported devices see readme.html
Author:
Atmel Corporation: http://www.atmel.com
Support email: avr@atmel.com
Revision
595
Date
2007-03-22 14:43:03 +0100 (to, 22 mar 2007)

Copyright (c) 2008, Atmel Corporation All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.

2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.

3. The name of ATMEL may not be used to endorse or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

Definition in file ebi_sram_example.c.

#include "avr_compiler.h"
#include "ebi_driver.h"

Include dependency graph for ebi_sram_example.c:

Go to the source code of this file.

Defines

#define SRAM(addr)   ((uint8_t *) SRAM_ADDR)[addr]
 Macro to access SRAM.
#define SRAM_ADDR   0x4000
 Address where we want SRAM to be accessed.
#define VECTOR_SIZE   1000
 Number of test bytes to store to SRAM.

Functions

int main (void)
 Test function for EBI with SRAM.


Define Documentation

#define SRAM ( addr   )     ((uint8_t *) SRAM_ADDR)[addr]

Macro to access SRAM.

Definition at line 65 of file ebi_sram_example.c.

Referenced by main().

#define SRAM_ADDR   0x4000

Address where we want SRAM to be accessed.

Note:
This address is not on an address space boundry, and it will truncated down to the closest address space boundry. In this example where the address space is 128K, the base address will be 0x0000 thus loosing the first 0x4000 (16K) of this address space.

Definition at line 61 of file ebi_sram_example.c.

Referenced by main().

#define VECTOR_SIZE   1000

Number of test bytes to store to SRAM.

Definition at line 68 of file ebi_sram_example.c.


Function Documentation

int main ( void   ) 

Test function for EBI with SRAM.

Hardware setup for 3-port SRAM interface:

PORTK[7:0] - A[7:0]/A[15:8]/A[23:16] (BYTE 2 and 3 connected through ALE1 and ALE2)

PORTJ[7:0] - D[7:0]

PORTH[7:0] - {CS3,CS2,CS1,CS0,ALE2,ALE1,RE,WE} (CS0 used for SRAM)

In this example a 128KB SRAM is used, which does not require any wait states at 2 MHz. Pull-up resistors should be connected to the Chip Select line to prevent garbage from being written to the SRAM during start-up, while the control lines are still in an unknown state.

The setup is tested by writing a set of data to the SRAM. The data is then read back and verified. At the end, the program will be stuck in one of two infinite loops, dependent on whether the test passed or not.

Definition at line 90 of file ebi_sram_example.c.

References EBI_Enable(), EBI_EnableSRAM(), SRAM, SRAM_ADDR, and VECTOR_SIZE.

00091 {
00092         /* Flag indicating correct data transfer to and from SRAM */
00093         bool equal = true;
00094 
00095         /* Set signals which are active-low to high value */
00096         PORTH.OUT = 0xFF;
00097 
00098         /* Configure bus pins as outputs(except for data lines). */
00099         PORTH.DIR = 0xFF;
00100         PORTK.DIR = 0xFF;
00101 
00102         /* Initialize EBI. */
00103         EBI_Enable( EBI_SDDATAW_8BIT_gc,
00104                     EBI_LPCMODE_ALE1_gc,
00105                     EBI_SRMODE_ALE12_gc,
00106                     EBI_IFMODE_3PORT_gc );
00107 
00108         /* Initialize SRAM */
00109         EBI_EnableSRAM( &EBI.CS0,               /* Chip Select 0. */
00110                         EBI_CS_ASPACE_128KB_gc, /* 128 KB Address space. */
00111                         (void *) SRAM_ADDR,     /* Base address. */
00112                         0 );                    /* 0 wait states. */
00113 
00114         /* Fill SRAM with data. */
00115         for (uint16_t i = 0; i < VECTOR_SIZE; i++) {
00116                 SRAM(i) =  (uint8_t) i & 0xFF;
00117         }
00118 
00119         /* Read back from SRAM and verify */
00120         for (uint16_t i = 0; i < VECTOR_SIZE; i++) {
00121                 if (SRAM(i) != ((uint8_t) i & 0xFF)){
00122                         equal = false;
00123                         break;
00124                 }
00125         }
00126 
00127         /* Report success or failure. */
00128 
00129         if (equal) {
00130                 while(true) {
00131                 /* Breakpoint for success. */
00132                         nop();
00133                 }
00134         }
00135         else {
00136                 while(true) {
00137                 /* Breakpoint for failure. */
00138                         nop();
00139                 }
00140         }
00141 }

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