00001
00059 #ifndef EBI_DRIVER_H
00060 #define EBI_DRIVER_H
00061
00062 #include "avr_compiler.h"
00063
00064
00065
00066
00072 #define EBI_Disable() (EBI.CTRL = EBI.CTRL & ~EBI_IFMODE_gm | EBI_IFMODE_DISABLED_gc)
00073
00074
00075
00082 #define EBI_DisableChipSelect(_chipSelect) ( (_chipSelect)->CTRLA = (_chipSelect)->CTRLA & ~EBI_CS_MODE_gm | EBI_CS_MODE_DISABLED_gc )
00083
00084
00085
00093 #define EBI_SetSDRAMMode(_sdramMode) ( EBI.CS3.CTRLB = EBI.CS3.CTRLB & ~EBI_CS_SDMODE_gm | (_sdramMode) )
00094
00095
00096
00103 #define EBI_EnableSelfRefresh() (EBI.CS3.CTRLB |= EBI_CS_SDSREN_bm)
00104
00105
00106
00112 #define EBI_DisableSelfRefresh() (EBI.CS3.CTRLB &= ~EBI_CS_SDSREN_bm)
00113
00114
00115
00116
00117
00118 void EBI_Enable( EBI_SDDATAW_t sdramDataWidth,
00119 EBI_LPCMODE_t lpcMode,
00120 EBI_SRMODE_t sramMode,
00121 EBI_IFMODE_t interfaceMode );
00122
00123 void EBI_EnableSRAM( volatile EBI_CS_t * chipSelect,
00124 EBI_CS_ASPACE_t addrSpace,
00125 void * baseAddr,
00126 uint8_t waitStateCycles );
00127
00128 void EBI_EnableLPC( volatile EBI_CS_t * chipSelect,
00129 EBI_CS_ASPACE_t addrSpace,
00130 void * baseAddr,
00131 uint8_t waitStateCycles );
00132
00133 void EBI_EnableSDRAM( EBI_CS_ASPACE_t addrSpace,
00134 void * baseAddr,
00135 bool casLatency,
00136 bool rowBits,
00137 EBI_SDCOL_t columnBits,
00138 EBI_MRDLY_t modeRegisterDelay,
00139 EBI_ROWCYCDLY_t rowCycleDelay,
00140 EBI_RPDLY_t rowToPrechargeDelay,
00141 EBI_WRDLY_t writeRecoveryDelay,
00142 EBI_ESRDLY_t exitSelfRefreshToActiveDelay,
00143 EBI_ROWCOLDLY_t rowToColumnDelay,
00144 uint16_t refreshPeriod,
00145 uint16_t initializationDelay );
00146
00147 #endif