;-------------------------------------------------------- ; File Created by SDCC : FreeWare ANSI-C Compiler ; Version 2.5.0 #1020 (May 8 2005) ; This file generated Sat Apr 29 17:26:28 2006 ;-------------------------------------------------------- .module komfort .optsdcc -mmcs51 --model-small ;-------------------------------------------------------- ; Public variables in this module ;-------------------------------------------------------- .globl _CY .globl _AC .globl _F0 .globl _RS1 .globl _RS0 .globl _OV .globl _FL .globl _P .globl _PS .globl _PT1 .globl _PX1 .globl _PT0 .globl _PX0 .globl _AOUT .globl _T1 .globl _T0 .globl _INT1 .globl _INT0 .globl _TXD .globl _RXD .globl _P3_7 .globl _P3_5 .globl _P3_4 .globl _P3_3 .globl _P3_2 .globl _P3_1 .globl _P3_0 .globl _EA .globl _ET2 .globl _ES .globl _ET1 .globl _EX1 .globl _ET0 .globl _EX0 .globl _SM0 .globl _SM1 .globl _SM2 .globl _REN .globl _TB8 .globl _RB8 .globl _TI .globl _RI .globl _AIN1 .globl _AIN0 .globl _P1_7 .globl _P1_6 .globl _P1_5 .globl _P1_4 .globl _P1_3 .globl _P1_2 .globl _P1_1 .globl _P1_0 .globl _TF1 .globl _TR1 .globl _TF0 .globl _TR0 .globl _IE1 .globl _IT1 .globl _IE0 .globl _IT0 .globl _B .globl _ACC .globl _PSW .globl _IP .globl _P3 .globl _IE .globl _SBUF .globl _SCON .globl _P1 .globl _TH1 .globl _TH0 .globl _TL1 .globl _TL0 .globl _TMOD .globl _TCON .globl _PCON .globl _DPH .globl _DPL .globl _SP ;-------------------------------------------------------- ; special function registers ;-------------------------------------------------------- .area RSEG (DATA) _SP:: .ds 1 _DPL:: .ds 1 _DPH:: .ds 1 _PCON:: .ds 1 _TCON:: .ds 1 _TMOD:: .ds 1 _TL0:: .ds 1 _TL1:: .ds 1 _TH0:: .ds 1 _TH1:: .ds 1 _P1:: .ds 1 _SCON:: .ds 1 _SBUF:: .ds 1 _IE:: .ds 1 _P3:: .ds 1 _IP:: .ds 1 _PSW:: .ds 1 _ACC:: .ds 1 _B:: .ds 1 ;-------------------------------------------------------- ; special function bits ;-------------------------------------------------------- .area RSEG (DATA) _IT0:: .ds 1 _IE0:: .ds 1 _IT1:: .ds 1 _IE1:: .ds 1 _TR0:: .ds 1 _TF0:: .ds 1 _TR1:: .ds 1 _TF1:: .ds 1 _P1_0:: .ds 1 _P1_1:: .ds 1 _P1_2:: .ds 1 _P1_3:: .ds 1 _P1_4:: .ds 1 _P1_5:: .ds 1 _P1_6:: .ds 1 _P1_7:: .ds 1 _AIN0:: .ds 1 _AIN1:: .ds 1 _RI:: .ds 1 _TI:: .ds 1 _RB8:: .ds 1 _TB8:: .ds 1 _REN:: .ds 1 _SM2:: .ds 1 _SM1:: .ds 1 _SM0:: .ds 1 _EX0:: .ds 1 _ET0:: .ds 1 _EX1:: .ds 1 _ET1:: .ds 1 _ES:: .ds 1 _ET2:: .ds 1 _EA:: .ds 1 _P3_0:: .ds 1 _P3_1:: .ds 1 _P3_2:: .ds 1 _P3_3:: .ds 1 _P3_4:: .ds 1 _P3_5:: .ds 1 _P3_7:: .ds 1 _RXD:: .ds 1 _TXD:: .ds 1 _INT0:: .ds 1 _INT1:: .ds 1 _T0:: .ds 1 _T1:: .ds 1 _AOUT:: .ds 1 _PX0:: .ds 1 _PT0:: .ds 1 _PX1:: .ds 1 _PT1:: .ds 1 _PS:: .ds 1 _P:: .ds 1 _FL:: .ds 1 _OV:: .ds 1 _RS0:: .ds 1 _RS1:: .ds 1 _F0:: .ds 1 _AC:: .ds 1 _CY:: .ds 1 ;-------------------------------------------------------- ; overlayable register banks ;-------------------------------------------------------- .area REG_BANK_0 (REL,OVR,DATA) .ds 8 ;-------------------------------------------------------- ; internal ram data ;-------------------------------------------------------- .area DSEG (DATA) ;-------------------------------------------------------- ; overlayable items in internal ram ;-------------------------------------------------------- .area OSEG (OVR,DATA) ;-------------------------------------------------------- ; indirectly addressable internal ram data ;-------------------------------------------------------- .area ISEG (DATA) ;-------------------------------------------------------- ; bit data ;-------------------------------------------------------- .area BSEG (BIT) ;-------------------------------------------------------- ; paged external ram data ;-------------------------------------------------------- .area PSEG (PAG,XDATA) ;-------------------------------------------------------- ; external ram data ;-------------------------------------------------------- .area XSEG (XDATA) ;-------------------------------------------------------- ; external initialized ram data ;-------------------------------------------------------- .area XISEG (XDATA) .area CSEG (CODE) .area GSINIT0 (CODE) .area GSINIT1 (CODE) .area GSINIT2 (CODE) .area GSINIT3 (CODE) .area GSINIT4 (CODE) .area GSINIT5 (CODE) ;-------------------------------------------------------- ; global & static initialisations ;-------------------------------------------------------- .area CSEG (CODE) .area GSINIT (CODE) .area GSFINAL (CODE) .area GSINIT (CODE) ;AT892051.h:15: sfr SP = 0x81; ; genAssign mov _SP,#0x81 ;AT892051.h:16: sfr DPL = 0x82; ; genAssign mov _DPL,#0x82 ;AT892051.h:17: sfr DPH = 0x83; ; genAssign mov _DPH,#0x83 ;AT892051.h:18: sfr PCON = 0x87; ; genAssign mov _PCON,#0x87 ;AT892051.h:19: sfr TCON = 0x88; ; genAssign mov _TCON,#0x88 ;AT892051.h:20: sfr TMOD = 0x89; ; genAssign mov _TMOD,#0x89 ;AT892051.h:21: sfr TL0 = 0x8A; ; genAssign mov _TL0,#0x8A ;AT892051.h:22: sfr TL1 = 0x8B; ; genAssign mov _TL1,#0x8B ;AT892051.h:23: sfr TH0 = 0x8C; ; genAssign mov _TH0,#0x8C ;AT892051.h:24: sfr TH1 = 0x8D; ; genAssign mov _TH1,#0x8D ;AT892051.h:25: sfr P1 = 0x90; ; genAssign mov _P1,#0x90 ;AT892051.h:26: sfr SCON = 0x98; ; genAssign mov _SCON,#0x98 ;AT892051.h:27: sfr SBUF = 0x99; ; genAssign mov _SBUF,#0x99 ;AT892051.h:28: sfr IE = 0xA8; ; genAssign mov _IE,#0xA8 ;AT892051.h:29: sfr P3 = 0xB0; ; genAssign mov _P3,#0xB0 ;AT892051.h:30: sfr IP = 0xB8; ; genAssign mov _IP,#0xB8 ;AT892051.h:31: sfr PSW = 0xD0; ; genAssign mov _PSW,#0xD0 ;AT892051.h:32: sfr ACC = 0xE0; ; genAssign mov _ACC,#0xE0 ;AT892051.h:33: sfr B = 0xF0; ; genAssign mov _B,#0xF0 ;AT892051.h:50: sbit IT0 = 0x88; ; genAssign setb _IT0 ;AT892051.h:51: sbit IE0 = 0x89; ; genAssign setb _IE0 ;AT892051.h:52: sbit IT1 = 0x8A; ; genAssign setb _IT1 ;AT892051.h:53: sbit IE1 = 0x8B; ; genAssign setb _IE1 ;AT892051.h:54: sbit TR0 = 0x8C; ; genAssign setb _TR0 ;AT892051.h:55: sbit TF0 = 0x8D; ; genAssign setb _TF0 ;AT892051.h:56: sbit TR1 = 0x8E; ; genAssign setb _TR1 ;AT892051.h:57: sbit TF1 = 0x8F; ; genAssign setb _TF1 ;AT892051.h:77: sbit P1_0 = 0x90; ; genAssign setb _P1_0 ;AT892051.h:78: sbit P1_1 = 0x91; ; genAssign setb _P1_1 ;AT892051.h:79: sbit P1_2 = 0x92; ; genAssign setb _P1_2 ;AT892051.h:80: sbit P1_3 = 0x93; ; genAssign setb _P1_3 ;AT892051.h:81: sbit P1_4 = 0x94; ; genAssign setb _P1_4 ;AT892051.h:82: sbit P1_5 = 0x95; ; genAssign setb _P1_5 ;AT892051.h:83: sbit P1_6 = 0x96; ; genAssign setb _P1_6 ;AT892051.h:84: sbit P1_7 = 0x97; ; genAssign setb _P1_7 ;AT892051.h:86: sbit AIN0 = 0x90; /* + Analog comparator input */ ; genAssign setb _AIN0 ;AT892051.h:87: sbit AIN1 = 0x91; /* - Analog comparator input */ ; genAssign setb _AIN1 ;AT892051.h:92: sbit RI = 0x98; ; genAssign setb _RI ;AT892051.h:93: sbit TI = 0x99; ; genAssign setb _TI ;AT892051.h:94: sbit RB8 = 0x9A; ; genAssign setb _RB8 ;AT892051.h:95: sbit TB8 = 0x9B; ; genAssign setb _TB8 ;AT892051.h:96: sbit REN = 0x9C; ; genAssign setb _REN ;AT892051.h:97: sbit SM2 = 0x9D; ; genAssign setb _SM2 ;AT892051.h:98: sbit SM1 = 0x9E; ; genAssign setb _SM1 ;AT892051.h:99: sbit SM0 = 0x9F; ; genAssign setb _SM0 ;AT892051.h:104: sbit EX0 = 0xA8; /* 1=Enable External interrupt 0 */ ; genAssign setb _EX0 ;AT892051.h:105: sbit ET0 = 0xA9; /* 1=Enable Timer 0 interrupt */ ; genAssign setb _ET0 ;AT892051.h:106: sbit EX1 = 0xAA; /* 1=Enable External interrupt 1 */ ; genAssign setb _EX1 ;AT892051.h:107: sbit ET1 = 0xAB; /* 1=Enable Timer 1 interrupt */ ; genAssign setb _ET1 ;AT892051.h:108: sbit ES = 0xAC; /* 1=Enable Serial port interrupt */ ; genAssign setb _ES ;AT892051.h:109: sbit ET2 = 0xAD; /* 1=Enable Timer 2 interrupt */ ; genAssign setb _ET2 ;AT892051.h:111: sbit EA = 0xAF; /* 0=Disable all interrupts */ ; genAssign setb _EA ;AT892051.h:116: sbit P3_0 = 0xB0; ; genAssign setb _P3_0 ;AT892051.h:117: sbit P3_1 = 0xB1; ; genAssign setb _P3_1 ;AT892051.h:118: sbit P3_2 = 0xB2; ; genAssign setb _P3_2 ;AT892051.h:119: sbit P3_3 = 0xB3; ; genAssign setb _P3_3 ;AT892051.h:120: sbit P3_4 = 0xB4; ; genAssign setb _P3_4 ;AT892051.h:121: sbit P3_5 = 0xB5; ; genAssign setb _P3_5 ;AT892051.h:123: sbit P3_7 = 0xB7; ; genAssign setb _P3_7 ;AT892051.h:125: sbit RXD = 0xB0; /* Serial data input */ ; genAssign setb _RXD ;AT892051.h:126: sbit TXD = 0xB1; /* Serial data output */ ; genAssign setb _TXD ;AT892051.h:127: sbit INT0 = 0xB2; /* External interrupt 0 */ ; genAssign setb _INT0 ;AT892051.h:128: sbit INT1 = 0xB3; /* External interrupt 1 */ ; genAssign setb _INT1 ;AT892051.h:129: sbit T0 = 0xB4; /* Timer 0 external input */ ; genAssign setb _T0 ;AT892051.h:130: sbit T1 = 0xB5; /* Timer 1 external input */ ; genAssign setb _T1 ;AT892051.h:131: sbit AOUT = 0xB6; /* Analog comparator output */ ; genAssign setb _AOUT ;AT892051.h:136: sbit PX0 = 0xB8; ; genAssign setb _PX0 ;AT892051.h:137: sbit PT0 = 0xB9; ; genAssign setb _PT0 ;AT892051.h:138: sbit PX1 = 0xBA; ; genAssign setb _PX1 ;AT892051.h:139: sbit PT1 = 0xBB; ; genAssign setb _PT1 ;AT892051.h:140: sbit PS = 0xBC; ; genAssign setb _PS ;AT892051.h:145: sbit P = 0xD0; ; genAssign setb _P ;AT892051.h:146: sbit FL = 0xD1; ; genAssign setb _FL ;AT892051.h:147: sbit OV = 0xD2; ; genAssign setb _OV ;AT892051.h:148: sbit RS0 = 0xD3; ; genAssign setb _RS0 ;AT892051.h:149: sbit RS1 = 0xD4; ; genAssign setb _RS1 ;AT892051.h:150: sbit F0 = 0xD5; ; genAssign setb _F0 ;AT892051.h:151: sbit AC = 0xD6; ; genAssign setb _AC ;AT892051.h:152: sbit CY = 0xD7; ; genAssign setb _CY ;-------------------------------------------------------- ; Home ;-------------------------------------------------------- .area HOME (CODE) .area CSEG (CODE) ;-------------------------------------------------------- ; code ;-------------------------------------------------------- .area CSEG (CODE) .area CSEG (CODE) .area XINIT (CODE)