Test Project Status | |||
Project File: | CPLD_Test.xise | Parser Errors: | No Errors |
Module Name: | Test | Implementation State: | Fitted |
Target Device: | xc9572xl-10VQ44 |
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No Errors |
Product Version: | ISE 14.1 |
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4 Warnings (0 new) |
Design Goal: | Balanced |
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Design Strategy: | Xilinx Default (unlocked) |
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Environment: | System Settings |
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Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | Mo 18. Jun 23:49:05 2012 | 0 | 4 Warnings (0 new) | 0 | |
Translation Report | Current | Mo 18. Jun 23:49:13 2012 | 0 | 0 | 0 | |
CPLD Fitter Report (Text) | Current | Mo 18. Jun 23:49:15 2012 | 0 | 2 Warnings (1 new) | 0 | |
Power Report |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
ISIM Simulator Log | Out of Date | Mo 18. Jun 22:18:22 2012 | |
Post-Fit Simulation Model Report |