Summary

 Design Name  ccd_logic
 Fitting Status  Successful
 Software Version  I.27
 Device Used  XC9572-15-PC44
 Date   6-14-2006, 0:51AM

RESOURCES SUMMARY
Macrocells Used Pterms Used Registers Used Pins Used Function Block Inputs Used
38/72  (53%) 82/360  (23%) 31/72  (44%) 7/34  (21%) 69/144  (48%)

PIN RESOURCES
Signal Type Required Mapped
 Input  0  0
 Output  6  6
 Bidirectional  0  0
 GCK  1  1
 GTS  0  0
 GSR  0  0
Pin Type Used Total
 I/O  6  28
 GCK/IO  1  3
 GTS/IO  0  2
 GSR/IO  0  1

GLOBAL RESOURCES
 Signal mapped onto global clock net (GCK3)  /CLK

POWER DATA
 Macrocells in high performance mode (MCHP)  38
 Macrocells in low power mode (MCLP)  0
 Total macrocells used (MC)  38