********** Mapped Logic ********** |
$OpTx$FX_DC$29 <= ((NOT PIX_CNT(5))
OR (NOT PIX_CNT(3) AND NOT PIX_CNT(1).LFBK AND NOT PIX_CNT(2).LFBK AND NOT PIX_CNT(4).LFBK)); |
$OpTx$INV$79__$INT <= ((PIX_CLK.LFBK)
OR (CLK_CNT(0) AND CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(5) AND NOT CLK_CNT(6) AND CLK_CNT(7) AND CLK_CNT(8) AND CLK_CNT(9) AND NOT CLK_CNT(2).LFBK AND NOT CLK_CNT(1).LFBK)); |
FDCPE_ADC_ACT: FDCPE port map (ADC_ACT,'0','0',ADC_ACT_CLR,NOT ADC_ACT/ADC_ACT_SETF__$INT);
ADC_ACT_CLR <= (NOT PIX_CNT(10) AND NOT PIX_CNT(11) AND NOT PIX_CNT(6).LFBK AND NOT PIX_CNT(7).LFBK AND NOT PIX_CNT(8).LFBK AND NOT PIX_CNT(9).LFBK AND NOT ADC_ACT.LFBK AND $OpTx$FX_DC$29.LFBK); |
ADC_ACT/ADC_ACT_SETF__$INT <= ((EXP0_.EXP)
OR (ADC_EN.EXP) OR (PIX_CNT(7) AND PIX_CNT(11).LFBK) OR (PIX_CNT(9) AND PIX_CNT(11).LFBK) OR (PIX_CNT(6) AND PIX_CNT(11).LFBK) OR (PIX_CNT(8) AND PIX_CNT(11).LFBK) OR (PIX_CNT(10).LFBK AND PIX_CNT(11).LFBK)); |
FDCPE_ADC_EN: FDCPE port map (ADC_EN,'0','0',ADC_EN_CLR,ADC_EN_PRE);
ADC_EN_CLR <= (CLK_CNT(0) AND CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(5) AND CLK_CNT(6) AND NOT CLK_CNT(7) AND NOT CLK_CNT(8) AND NOT CLK_CNT(9) AND CLK_CNT(2).LFBK AND NOT CLK_CNT(1).LFBK); ADC_EN_PRE <= (NOT CLK_CNT(0) AND NOT CLK_CNT(3) AND NOT CLK_CNT(4) AND CLK_CNT(5) AND CLK_CNT(6) AND NOT CLK_CNT(7) AND NOT CLK_CNT(8) AND NOT CLK_CNT(9) AND CLK_CNT(2).LFBK AND NOT CLK_CNT(1).LFBK); |
ADC_RDY <= (ADC_ACT AND ADC_EN); |
FDCPE_CCD_CLK: FDCPE port map (CCD_CLK,'0','0',CCD_CLK_CLR,CCD_CLK_PRE);
CCD_CLK_CLR <= (NOT CLK_CNT(0) AND NOT CLK_CNT(3) AND NOT CLK_CNT(4) AND NOT CLK_CNT(5) AND NOT CLK_CNT(6) AND NOT CLK_CNT(7) AND NOT CLK_CNT(8) AND NOT CLK_CNT(9) AND PIX_CLK.LFBK AND NOT CLK_CNT(2).LFBK AND NOT CLK_CNT(1).LFBK); CCD_CLK_PRE <= (NOT CLK_CNT(0) AND NOT CLK_CNT(3) AND NOT CLK_CNT(4) AND NOT CLK_CNT(5) AND NOT CLK_CNT(6) AND NOT CLK_CNT(7) AND NOT CLK_CNT(8) AND NOT CLK_CNT(9) AND NOT PIX_CLK.LFBK AND NOT CLK_CNT(2).LFBK AND NOT CLK_CNT(1).LFBK); |
CCD_ROG <= NOT ((NOT PIX_CNT(1) AND NOT PIX_CNT(7) AND NOT PIX_CNT(9) AND
NOT PIX_CNT(2) AND NOT PIX_CNT(4) AND NOT PIX_CNT(6) AND NOT PIX_CNT(8) AND PIX_CLK.LFBK AND PIX_CNT(0).LFBK AND NOT PIX_CNT(3).LFBK AND NOT PIX_CNT(5).LFBK AND NOT PIX_CNT(10).LFBK AND NOT PIX_CNT(11).LFBK AND ROG_EN.LFBK)); |
FTCPE_CLK_CNT0: FTCPE port map (CLK_CNT(0),CLK_CNT_T(0),NOT CLK,'0','0');
CLK_CNT_T(0) <= (CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(2) AND CLK_CNT(5) AND CLK_CNT(1) AND CLK_CNT(7) AND NOT CLK_CNT(0).LFBK AND NOT CLK_CNT(6).LFBK AND CLK_CNT(8).LFBK AND CLK_CNT(9).LFBK); |
FTCPE_CLK_CNT1: FTCPE port map (CLK_CNT(1),CLK_CNT_T(1),NOT CLK,'0','0');
CLK_CNT_T(1) <= ((CLK_CNT(0)) OR (CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(5) AND NOT CLK_CNT(6) AND CLK_CNT(7) AND CLK_CNT(8) AND CLK_CNT(9) AND CLK_CNT(2).LFBK AND CLK_CNT(1).LFBK)); |
FTCPE_CLK_CNT2: FTCPE port map (CLK_CNT(2),CLK_CNT_T(2),NOT CLK,'0','0');
CLK_CNT_T(2) <= ((CLK_CNT(0) AND CLK_CNT(1).LFBK) OR (CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(5) AND NOT CLK_CNT(6) AND CLK_CNT(7) AND CLK_CNT(8) AND CLK_CNT(9) AND CLK_CNT(2).LFBK AND CLK_CNT(1).LFBK)); |
FTCPE_CLK_CNT3: FTCPE port map (CLK_CNT(3),CLK_CNT_T(3),NOT CLK,'0','0');
CLK_CNT_T(3) <= ((CLK_CNT(0) AND CLK_CNT(2) AND CLK_CNT(1)) OR (CLK_CNT(2) AND CLK_CNT(1) AND NOT CLK_CNT(6) AND CLK_CNT(8) AND CLK_CNT(9) AND CLK_CNT(3).LFBK AND CLK_CNT(4).LFBK AND CLK_CNT(5).LFBK AND CLK_CNT(7).LFBK)); |
FTCPE_CLK_CNT4: FTCPE port map (CLK_CNT(4),CLK_CNT_T(4),NOT CLK,'0','0');
CLK_CNT_T(4) <= ((CLK_CNT(0) AND CLK_CNT(2) AND CLK_CNT(1) AND CLK_CNT(3).LFBK) OR (CLK_CNT(2) AND CLK_CNT(1) AND NOT CLK_CNT(6) AND CLK_CNT(8) AND CLK_CNT(9) AND CLK_CNT(3).LFBK AND CLK_CNT(4).LFBK AND CLK_CNT(5).LFBK AND CLK_CNT(7).LFBK)); |
FTCPE_CLK_CNT5: FTCPE port map (CLK_CNT(5),CLK_CNT_T(5),NOT CLK,'0','0');
CLK_CNT_T(5) <= ((CLK_CNT(0) AND CLK_CNT(2) AND CLK_CNT(1) AND CLK_CNT(3).LFBK AND CLK_CNT(4).LFBK) OR (CLK_CNT(2) AND CLK_CNT(1) AND NOT CLK_CNT(6) AND CLK_CNT(8) AND CLK_CNT(9) AND CLK_CNT(3).LFBK AND CLK_CNT(4).LFBK AND CLK_CNT(5).LFBK AND CLK_CNT(7).LFBK)); |
FTCPE_CLK_CNT6: FTCPE port map (CLK_CNT(6),CLK_CNT_T(6),NOT CLK,'0','0');
CLK_CNT_T(6) <= (CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(2) AND CLK_CNT(5) AND CLK_CNT(1) AND CLK_CNT(0).LFBK); |
FTCPE_CLK_CNT7: FTCPE port map (CLK_CNT(7),CLK_CNT_T(7),NOT CLK,'0','0');
CLK_CNT_T(7) <= ((CLK_CNT(0) AND CLK_CNT(2) AND CLK_CNT(1) AND CLK_CNT(6) AND CLK_CNT(3).LFBK AND CLK_CNT(4).LFBK AND CLK_CNT(5).LFBK) OR (NOT CLK_CNT(0) AND CLK_CNT(2) AND CLK_CNT(1) AND NOT CLK_CNT(6) AND CLK_CNT(8) AND CLK_CNT(9) AND CLK_CNT(3).LFBK AND CLK_CNT(4).LFBK AND CLK_CNT(5).LFBK AND CLK_CNT(7).LFBK)); |
FTCPE_CLK_CNT8: FTCPE port map (CLK_CNT(8),CLK_CNT_T(8),NOT CLK,'0','0');
CLK_CNT_T(8) <= ((CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(2) AND CLK_CNT(5) AND CLK_CNT(1) AND CLK_CNT(7) AND CLK_CNT(0).LFBK AND CLK_CNT(6).LFBK) OR (CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(2) AND CLK_CNT(5) AND CLK_CNT(1) AND CLK_CNT(7) AND NOT CLK_CNT(0).LFBK AND NOT CLK_CNT(6).LFBK AND CLK_CNT(8).LFBK AND CLK_CNT(9).LFBK)); |
FTCPE_CLK_CNT9: FTCPE port map (CLK_CNT(9),CLK_CNT_T(9),NOT CLK,'0','0');
CLK_CNT_T(9) <= ((CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(2) AND CLK_CNT(5) AND CLK_CNT(1) AND CLK_CNT(7) AND CLK_CNT(0).LFBK AND CLK_CNT(6).LFBK AND CLK_CNT(8).LFBK) OR (CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(2) AND CLK_CNT(5) AND CLK_CNT(1) AND CLK_CNT(7) AND NOT CLK_CNT(0).LFBK AND NOT CLK_CNT(6).LFBK AND CLK_CNT(8).LFBK AND CLK_CNT(9).LFBK)); |
FDCPE_INT0: FDCPE port map (INT0,'0','0',INT0_CLR,INT0_PRE);
INT0_CLR <= (NOT PIX_CNT(3) AND PIX_CNT(5) AND NOT PIX_CNT(0) AND NOT PIX_CNT(10) AND NOT PIX_CNT(11) AND NOT PIX_CNT(1).LFBK AND NOT PIX_CNT(2).LFBK AND NOT PIX_CNT(4).LFBK AND NOT PIX_CNT(6).LFBK AND NOT PIX_CNT(7).LFBK AND NOT PIX_CNT(8).LFBK AND NOT PIX_CNT(9).LFBK); INT0_PRE <= (NOT PIX_CNT(3) AND NOT PIX_CNT(5) AND PIX_CNT(0) AND NOT PIX_CNT(10) AND NOT PIX_CNT(11) AND NOT PIX_CNT(1).LFBK AND NOT PIX_CNT(2).LFBK AND NOT PIX_CNT(4).LFBK AND NOT PIX_CNT(6).LFBK AND NOT PIX_CNT(7).LFBK AND NOT PIX_CNT(8).LFBK AND NOT PIX_CNT(9).LFBK); |
INT1 <= (INT_ACT AND INT_EN); |
FTCPE_INT_ACT: FTCPE port map (INT_ACT,INT_ACT_T,PIX_CLK.LFBK,'0','0');
INT_ACT_T <= ((PIX_CNT(1) AND NOT PIX_CNT(7) AND NOT PIX_CNT(9) AND NOT PIX_CNT(2) AND NOT PIX_CNT(4) AND NOT PIX_CNT(6) AND NOT PIX_CNT(8) AND NOT PIX_CNT(0).LFBK AND NOT PIX_CNT(3).LFBK AND PIX_CNT(5).LFBK AND NOT PIX_CNT(10).LFBK AND PIX_CNT(11).LFBK AND INT_ACT.LFBK) OR (PIX_CNT(1) AND NOT PIX_CNT(7) AND NOT PIX_CNT(9) AND NOT PIX_CNT(2) AND NOT PIX_CNT(4) AND NOT PIX_CNT(6) AND NOT PIX_CNT(8) AND NOT PIX_CNT(0).LFBK AND NOT PIX_CNT(3).LFBK AND PIX_CNT(5).LFBK AND NOT PIX_CNT(10).LFBK AND NOT PIX_CNT(11).LFBK AND NOT INT_ACT.LFBK)); |
FDCPE_INT_EN: FDCPE port map (INT_EN,'0','0',INT_RES,'0'); |
FDCPE_INT_RES: FDCPE port map (INT_RES,'0','0',NOT $OpTx$INV$79__$INT.LFBK,INT_RES_PRE);
INT_RES_PRE <= (CLK_CNT(0) AND CLK_CNT(3) AND CLK_CNT(4) AND CLK_CNT(5) AND NOT CLK_CNT(6) AND CLK_CNT(7) AND CLK_CNT(8) AND CLK_CNT(9) AND NOT PIX_CLK.LFBK AND NOT CLK_CNT(2).LFBK AND NOT CLK_CNT(1).LFBK); |
FTCPE_PIX_CNT0: FTCPE port map (PIX_CNT(0),PIX_CNT_T(0),PIX_CLK.LFBK,'0','0');
PIX_CNT_T(0) <= (NOT PIX_CNT(1) AND NOT PIX_CNT(7) AND NOT PIX_CNT(9) AND NOT PIX_CNT(2) AND NOT PIX_CNT(4) AND NOT PIX_CNT(6) AND NOT PIX_CNT(8) AND NOT PIX_CNT(0).LFBK AND PIX_CNT(3).LFBK AND PIX_CNT(5).LFBK AND NOT PIX_CNT(10).LFBK AND PIX_CNT(11).LFBK); |
FTCPE_PIX_CNT1: FTCPE port map (PIX_CNT(1),PIX_CNT(0),CCD_CLK,'0','0'); |
FTCPE_PIX_CNT2: FTCPE port map (PIX_CNT(2),PIX_CNT_T(2),CCD_CLK,'0','0');
PIX_CNT_T(2) <= (PIX_CNT(0) AND PIX_CNT(1).LFBK); |
FTCPE_PIX_CNT3: FTCPE port map (PIX_CNT(3),PIX_CNT_T(3),PIX_CLK.LFBK,'0','0');
PIX_CNT_T(3) <= ((PIX_CNT(1) AND PIX_CNT(2) AND PIX_CNT(0).LFBK) OR (NOT PIX_CNT(1) AND NOT PIX_CNT(7) AND NOT PIX_CNT(9) AND NOT PIX_CNT(2) AND NOT PIX_CNT(4) AND NOT PIX_CNT(6) AND NOT PIX_CNT(8) AND NOT PIX_CNT(0).LFBK AND PIX_CNT(3).LFBK AND PIX_CNT(5).LFBK AND NOT PIX_CNT(10).LFBK AND PIX_CNT(11).LFBK)); |
FTCPE_PIX_CNT4: FTCPE port map (PIX_CNT(4),PIX_CNT_T(4),CCD_CLK,'0','0');
PIX_CNT_T(4) <= (PIX_CNT(3) AND PIX_CNT(0) AND PIX_CNT(1).LFBK AND PIX_CNT(2).LFBK); |
FTCPE_PIX_CNT5: FTCPE port map (PIX_CNT(5),PIX_CNT_T(5),PIX_CLK.LFBK,'0','0');
PIX_CNT_T(5) <= ((PIX_CNT(1) AND PIX_CNT(2) AND PIX_CNT(4) AND PIX_CNT(0).LFBK AND PIX_CNT(3).LFBK) OR (NOT PIX_CNT(1) AND NOT PIX_CNT(7) AND NOT PIX_CNT(9) AND NOT PIX_CNT(2) AND NOT PIX_CNT(4) AND NOT PIX_CNT(6) AND NOT PIX_CNT(8) AND NOT PIX_CNT(0).LFBK AND PIX_CNT(3).LFBK AND PIX_CNT(5).LFBK AND NOT PIX_CNT(10).LFBK AND PIX_CNT(11).LFBK)); |
FTCPE_PIX_CNT6: FTCPE port map (PIX_CNT(6),PIX_CNT_T(6),CCD_CLK,'0','0');
PIX_CNT_T(6) <= (PIX_CNT(3) AND PIX_CNT(5) AND PIX_CNT(0) AND PIX_CNT(1).LFBK AND PIX_CNT(2).LFBK AND PIX_CNT(4).LFBK); |
FTCPE_PIX_CNT7: FTCPE port map (PIX_CNT(7),PIX_CNT_T(7),CCD_CLK,'0','0');
PIX_CNT_T(7) <= (PIX_CNT(3) AND PIX_CNT(5) AND PIX_CNT(0) AND PIX_CNT(1).LFBK AND PIX_CNT(2).LFBK AND PIX_CNT(4).LFBK AND PIX_CNT(6).LFBK); |
FTCPE_PIX_CNT8: FTCPE port map (PIX_CNT(8),PIX_CNT_T(8),CCD_CLK,'0','0');
PIX_CNT_T(8) <= (PIX_CNT(3) AND PIX_CNT(5) AND PIX_CNT(0) AND PIX_CNT(1).LFBK AND PIX_CNT(2).LFBK AND PIX_CNT(4).LFBK AND PIX_CNT(6).LFBK AND PIX_CNT(7).LFBK); |
FTCPE_PIX_CNT9: FTCPE port map (PIX_CNT(9),PIX_CNT_T(9),CCD_CLK,'0','0');
PIX_CNT_T(9) <= (PIX_CNT(3) AND PIX_CNT(5) AND PIX_CNT(0) AND PIX_CNT(1).LFBK AND PIX_CNT(2).LFBK AND PIX_CNT(4).LFBK AND PIX_CNT(6).LFBK AND PIX_CNT(7).LFBK AND PIX_CNT(8).LFBK); |
FTCPE_PIX_CNT10: FTCPE port map (PIX_CNT(10),PIX_CNT_T(10),PIX_CLK.LFBK,'0','0');
PIX_CNT_T(10) <= (PIX_CNT(1) AND PIX_CNT(7) AND PIX_CNT(9) AND PIX_CNT(2) AND PIX_CNT(4) AND PIX_CNT(6) AND PIX_CNT(8) AND PIX_CNT(0).LFBK AND PIX_CNT(3).LFBK AND PIX_CNT(5).LFBK); |
FTCPE_PIX_CNT11: FTCPE port map (PIX_CNT(11),PIX_CNT_T(11),PIX_CLK.LFBK,'0','0');
PIX_CNT_T(11) <= ((PIX_CNT(1) AND PIX_CNT(7) AND PIX_CNT(9) AND PIX_CNT(2) AND PIX_CNT(4) AND PIX_CNT(6) AND PIX_CNT(8) AND PIX_CNT(0).LFBK AND PIX_CNT(3).LFBK AND PIX_CNT(5).LFBK AND PIX_CNT(10).LFBK) OR (NOT PIX_CNT(1) AND NOT PIX_CNT(7) AND NOT PIX_CNT(9) AND NOT PIX_CNT(2) AND NOT PIX_CNT(4) AND NOT PIX_CNT(6) AND NOT PIX_CNT(8) AND NOT PIX_CNT(0).LFBK AND PIX_CNT(3).LFBK AND PIX_CNT(5).LFBK AND NOT PIX_CNT(10).LFBK AND PIX_CNT(11).LFBK)); |
RESET <= (RESET_EN AND ADC_ACT.LFBK); |
FDCPE_RESET_EN: FDCPE port map (RESET_EN,'0','0',RESET_EN_CLR,RESET_EN_PRE);
RESET_EN_CLR <= (NOT CLK_CNT(0) AND NOT CLK_CNT(3) AND NOT CLK_CNT(4) AND CLK_CNT(5) AND CLK_CNT(6) AND NOT CLK_CNT(7) AND NOT CLK_CNT(8) AND NOT CLK_CNT(9) AND NOT CLK_CNT(2).LFBK AND CLK_CNT(1).LFBK); RESET_EN_PRE <= (CLK_CNT(0) AND CLK_CNT(3) AND CLK_CNT(4) AND NOT CLK_CNT(5) AND CLK_CNT(6) AND NOT CLK_CNT(7) AND NOT CLK_CNT(8) AND NOT CLK_CNT(9) AND CLK_CNT(2).LFBK AND CLK_CNT(1).LFBK); |
FDCPE_ROG_EN: FDCPE port map (ROG_EN,'0','0',ROG_EN_CLR,ROG_EN_PRE);
ROG_EN_CLR <= (NOT CLK_CNT(0) AND NOT CLK_CNT(3) AND CLK_CNT(4) AND NOT CLK_CNT(5) AND NOT CLK_CNT(6) AND CLK_CNT(7) AND CLK_CNT(8) AND CLK_CNT(9) AND CLK_CNT(2).LFBK AND CLK_CNT(1).LFBK); ROG_EN_PRE <= (CLK_CNT(0) AND CLK_CNT(3) AND NOT CLK_CNT(4) AND CLK_CNT(5) AND NOT CLK_CNT(6) AND NOT CLK_CNT(7) AND NOT CLK_CNT(8) AND NOT CLK_CNT(9) AND NOT CLK_CNT(2).LFBK AND NOT CLK_CNT(1).LFBK); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE); FTCPE (Q,D,C,CLR,PRE); LDCP (Q,D,G,CLR,PRE); |