
CORE Generator Options:
   Target Device                  : xc5vlx155t-ff1136
   Speed Grade                    : -1
   HDL                            : vhdl
   Synthesis Tool                 : ISE

MIG Output Options:
   Module Name                    : MEMORY_CONTROLLER_TEST
   No of Controllers              : 1
   Selected Compatible Device(s)  : --
   Hardware Test Bench           : disabled
   PPC440                         : --
   PowerPC440 Block Selection     : --

FPGA Options:
   PLL                            : enabled
   Debug Signals                  : Disable
   System Clock                   : Single-Ended
   Limit to 2 Bytes per Bank      : disabled

Extended FPGA Options:
   DCI for DQ/DQS                 : enabled
   DCI for Address/Control        : disabled
   Class for Address and Control  : Class II

Reserve Pins:
   --
    
   /*******************************************************/
   /*                  Controller 0                       */
   /*******************************************************/
   Controller Options :
      Memory                         : DDR2_SDRAM
      Design Clock Frequency         : 7500 ps(133.33 MHz)
      Memory Type                    : Components
      Memory Part                    : MT47H64M16XX-3
      Equivalent Part(s)             : MT47H64M16HR-3;MT47H64M16BT-3
      Data Width                     : 16
      Memory Depth                   : 1
      ECC                            : ECC Disabled
      Data Mask                      : enabled

   Memory Options:
      Burst Length (MR[2:0])         : 4(010)
      Burst Type (MR[3])             : sequential(0)
      CAS Latency (MR[6:4])          : 4(100)
      Output Drive Strength (EMR[1]) : Reducedstrength(1)
      RTT (nominal) - ODT (EMR[6,2]) : 50ohms(11)
      Additive Latency (EMR[5:3])    : 0(000)

   FPGA Options:
      IODELAY Performance Mode       : HIGH

   Selected Banks and Pins usage : 
       Data          :bank 11(38) -> Number of pins used : 0 
                      bank 13(38) -> Number of pins used : 0 
                      bank 15(38) -> Number of pins used : 0 
                      bank 17(38) -> Number of pins used : 0 
                      bank 19(38) -> Number of pins used : 0 
                      bank 21(38) -> Number of pins used : 0 
                      bank 23(38) -> Number of pins used : 22 
                      bank 25(38) -> Number of pins used : 0 
                      
       Address/Control:bank 11(38) -> Number of pins used : 0 
                      bank 13(38) -> Number of pins used : 0 
                      bank 15(38) -> Number of pins used : 0 
                      bank 17(38) -> Number of pins used : 0 
                      bank 19(38) -> Number of pins used : 10 
                      bank 21(38) -> Number of pins used : 0 
                      bank 23(38) -> Number of pins used : 14 
                      bank 25(38) -> Number of pins used : 0 
                      
       System Control:bank 11(38) -> Number of pins used : 0 
                      bank 13(38) -> Number of pins used : 0 
                      bank 15(38) -> Number of pins used : 0 
                      bank 17(38) -> Number of pins used : 0 
                      bank 19(38) -> Number of pins used : 2 
                      bank 21(38) -> Number of pins used : 0 
                      bank 23(38) -> Number of pins used : 0 
                      bank 25(38) -> Number of pins used : 0 
                      
       System Clock  :bank 3(19) -> Number of pins used : 2 
                      bank 4(19) -> Number of pins used : 0 
                      
       Total IOs used :    50

