void ADC_refresh(System_def *system)
{
 4e2:	cf 93       	push	r28
 4e4:	df 93       	push	r29
 4e6:	ec 01       	movw	r28, r24
//	if(!system->ADCs.Timer_1ms)
//	{
//		asm("nop"); uart_puts("");
//		system->ADCs.Timer_1ms=system->ADCs.Timer_delay;//verzögerung einstellen

		if(IRQ.ADC_state)//Daten vorhanden
 4e8:	80 91 50 01 	lds	r24, 0x0150
 4ec:	88 23       	and	r24, r24
 4ee:	a9 f1       	breq	.+106    	; 0x55a <__stack+0x5b>
		{
			asm("nop"); uart_puts("");
 4f0:	00 00       	nop
 4f2:	80 e0       	ldi	r24, 0x00	; 0
 4f4:	91 e0       	ldi	r25, 0x01	; 1
 4f6:	0e 94 00 02 	call	0x400	; 0x400 <uart_puts>

			system->ADC_Value[kanal] =IRQ.ADC_value / 4;//
 4fa:	20 91 78 01 	lds	r18, 0x0178
 4fe:	80 91 4e 01 	lds	r24, 0x014E
 502:	90 91 4f 01 	lds	r25, 0x014F
 506:	c2 0f       	add	r28, r18
 508:	d1 1d       	adc	r29, r1
 50a:	96 95       	lsr	r25
 50c:	87 95       	ror	r24
 50e:	96 95       	lsr	r25
 510:	87 95       	ror	r24
 512:	8d 8b       	std	Y+21, r24	; 0x15

			kanal++;
 514:	82 2f       	mov	r24, r18
 516:	8f 5f       	subi	r24, 0xFF	; 255
 518:	80 93 78 01 	sts	0x0178, r24
			if(kanal == 2){kanal=6;}
 51c:	82 30       	cpi	r24, 0x02	; 2
 51e:	19 f4       	brne	.+6      	; 0x526 <__stack+0x27>
 520:	86 e0       	ldi	r24, 0x06	; 6
 522:	80 93 78 01 	sts	0x0178, r24
			if(kanal == 8){kanal=0;}
 526:	80 91 78 01 	lds	r24, 0x0178
 52a:	88 30       	cpi	r24, 0x08	; 8
 52c:	11 f4       	brne	.+4      	; 0x532 <__stack+0x33>
 52e:	10 92 78 01 	sts	0x0178, r1

			//ADC neueinstellen
			ADMUX=(ADMUX & ~(0x1F)) | (kanal & 0x1F);;
 532:	90 91 7c 00 	lds	r25, 0x007C
 536:	80 91 78 01 	lds	r24, 0x0178
 53a:	8f 71       	andi	r24, 0x1F	; 31
 53c:	90 7e       	andi	r25, 0xE0	; 224
 53e:	89 2b       	or	r24, r25
 540:	80 93 7c 00 	sts	0x007C, r24
			ADCSRA|=(1<<ADSC);
 544:	80 91 7a 00 	lds	r24, 0x007A
 548:	80 64       	ori	r24, 0x40	; 64
 54a:	80 93 7a 00 	sts	0x007A, r24
			IRQ.ADC_value=0;
 54e:	10 92 4f 01 	sts	0x014F, r1
 552:	10 92 4e 01 	sts	0x014E, r1
			IRQ.ADC_state=0;
 556:	10 92 50 01 	sts	0x0150, r1
		}

//	}

}
 55a:	df 91       	pop	r29
 55c:	cf 91       	pop	r28
 55e:	08 95       	ret