/* ###################################################################
**     THIS COMPONENT MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename    : pin_mux.c
**     Project     : twrk64f120m
**     Processor   : MK64FN1M0VLQ12
**     Component   : PinSettings
**     Version     : Component 01.002, Driver 1.1, CPU db: 3.00.000
**     Compiler    : IAR ARM C Compiler
**     Date/Time   : 2013-12-10, 14:58, # CodeGen: 7
**     Abstract    :
**
**     Settings    :
**
**     Contents    :
**         CAN                 - void pin_mux_CAN(uint32_t instance);
**         ENET                - void pin_mux_ENET(uint32_t instance);
**         GPIO                - void pin_mux_GPIO(uint32_t instance);
**         I2C                 - void pin_mux_I2C(uint32_t instance);
**         RTC                 - void pin_mux_RTC(uint32_t instance);
**         SDHC                - void pin_mux_SDHC(uint32_t instance);
**         SPI                 - void pin_mux_SPI(uint32_t instance);
**         UART                - void pin_mux_UART(uint32_t instance);
**
**     Copyright : 1997 - 2013 Freescale Semiconductor, Inc. All Rights Reserved.
**     SOURCE DISTRIBUTION PERMISSIBLE as directed in End User License Agreement.
**     
**     http      : www.freescale.com
**     mail      : support@freescale.com
** ###################################################################*/
/*!
** @file pin_mux.c
** @version 1.1
** @brief
**
*/         
/*!
**  @addtogroup pin_mux_module pin_mux module documentation
**  @{
*/         

/* MODULE pin_mux. */

#include "fsl_device_registers.h"
#include "fsl_port_hal.h"
#include "pin_mux.h"


void pin_mux_CAN(uint32_t instance)
{
  /* PORTB_PCR19 */
  port_hal_mux_control(HW_PORTB,19u,kPortMuxAlt2);
  /* PORTB_PCR18 */
  port_hal_mux_control(HW_PORTB,18u,kPortMuxAlt2);
}

void pin_mux_ENET(uint32_t instance)
{
  /* PORTC_PCR16 */
  port_hal_mux_control(HW_PORTC,16u,kPortMuxAlt4);
  /* PORTC_PCR17 */
  port_hal_mux_control(HW_PORTC,17u,kPortMuxAlt4);
  /* PORTC_PCR18 */
  port_hal_mux_control(HW_PORTC,18u,kPortMuxAlt4);
  /* PORTC_PCR19 */
  port_hal_mux_control(HW_PORTC,19u,kPortMuxAlt4);
  /* PORTA_PCR14 */
  port_hal_mux_control(HW_PORTA,14u,kPortMuxAlt4);
  /* PORTB_PCR1 */
  port_hal_mux_control(HW_PORTB,1u,kPortMuxAlt4);
  /* PORTB_PCR0 */
  port_hal_mux_control(HW_PORTB,0u,kPortMuxAlt4);
  /* PORTA_PCR13 */
  port_hal_mux_control(HW_PORTA,13u,kPortMuxAlt4);
  /* PORTA_PCR12 */
  port_hal_mux_control(HW_PORTA,12u,kPortMuxAlt4);
  /* PORTA_PCR5 */
  port_hal_mux_control(HW_PORTA,5u,kPortMuxAlt4);
  /* PORTA_PCR16 */
  port_hal_mux_control(HW_PORTA,16u,kPortMuxAlt4);
  /* PORTA_PCR17 */
  port_hal_mux_control(HW_PORTA,17u,kPortMuxAlt4);
  /* PORTA_PCR15 */
  port_hal_mux_control(HW_PORTA,15u,kPortMuxAlt4);
}

void pin_mux_GPIO(uint32_t instance)
{
  switch(instance) {    
    case 0:                             /* PTA */
      /* PORTA_PCR4 */
      port_hal_mux_control(HW_PORTA,4u,kPortMuxAsGpio);
      break;
    case 1:                             /* PTB */
      /* PORTB_PCR21 */
      port_hal_mux_control(HW_PORTB,21u,kPortMuxAsGpio);
      /* PORTB_PCR22 */
      port_hal_mux_control(HW_PORTB,22u,kPortMuxAsGpio);
      break;
    case 2:                             /* PTC */
      /* PORTC_PCR0 */
      port_hal_mux_control(HW_PORTC,0u,kPortMuxAsGpio);
      /* PORTC_PCR6 */
      port_hal_mux_control(HW_PORTC,6u,kPortMuxAsGpio);
      /* PORTC_PCR8 */
      port_hal_mux_control(HW_PORTC,8u,kPortMuxAsGpio);
      /* PORTC_PCR9 */
      port_hal_mux_control(HW_PORTC,9u,kPortMuxAsGpio);
      /* PORTC_PCR12 */
      port_hal_mux_control(HW_PORTC,12u,kPortMuxAsGpio);
      /* PORTC_PCR13 */
      port_hal_mux_control(HW_PORTC,13u,kPortMuxAsGpio);
      /* PORTC_PCR18 */
      port_hal_mux_control(HW_PORTC,18u,kPortMuxAsGpio);
      break;
    case 4:                             /* PTE */
      /* PORTE_PCR26 */
      port_hal_mux_control(HW_PORTE,26u,kPortMuxAsGpio);
      break;
    default:
      break;
  }
}

void pin_mux_I2C(uint32_t instance)
{
  switch(instance) {    
    case 0:                             /* I2C0 */
      /* PORTE_PCR24 */
      port_hal_mux_control(HW_PORTE,24u,kPortMuxAlt5);
      port_hal_configure_open_drain(HW_PORTE,24u,true);
      /* PORTE_PCR25 */
      port_hal_mux_control(HW_PORTE,25u,kPortMuxAlt5);
      port_hal_configure_open_drain(HW_PORTE,25u,true);
      break;
    case 1:                             /* I2C1 */
      /* PORTC_PCR10 */
      port_hal_mux_control(HW_PORTC,10u,kPortMuxAlt2);
      port_hal_configure_open_drain(HW_PORTC,10u,true);
      /* PORTC_PCR11 */
      port_hal_mux_control(HW_PORTC,11u,kPortMuxAlt2);
      port_hal_configure_open_drain(HW_PORTC,11u,true);
      break;
    default:
      break;
  }
}

void pin_mux_RTC(uint32_t instance)
{
  /* PORTE_PCR26 */
  port_hal_mux_control(HW_PORTE,26u,kPortMuxAlt6);
}

void pin_mux_SDHC(uint32_t instance)
{
  /* PORTE_PCR3 */
  port_hal_mux_control(HW_PORTE,3u,kPortMuxAlt4);
  /* PORTE_PCR1 */
  port_hal_mux_control(HW_PORTE,1u,kPortMuxAlt4);
  /* PORTE_PCR0 */
  port_hal_mux_control(HW_PORTE,0u,kPortMuxAlt4);
  /* PORTE_PCR5 */
  port_hal_mux_control(HW_PORTE,5u,kPortMuxAlt4);
  /* PORTE_PCR4 */
  port_hal_mux_control(HW_PORTE,4u,kPortMuxAlt4);
  /* PORTE_PCR2 */
  port_hal_mux_control(HW_PORTE,2u,kPortMuxAlt4);
}

void pin_mux_SPI(uint32_t instance)
{
  switch(instance) {
    case 0:                             /* SPI0 */
      /* PORTD_PCR0 */
      port_hal_mux_control(HW_PORTD,0u,kPortMuxAlt2);
      /* PORTD_PCR3 */
      port_hal_mux_control(HW_PORTD,3u,kPortMuxAlt2);
      /* PORTD_PCR1 */
      port_hal_mux_control(HW_PORTD,1u,kPortMuxAlt2);
      /* PORTD_PCR2 */
      port_hal_mux_control(HW_PORTD,2u,kPortMuxAlt2);
      break;
    case 1:                             /* SPI1 */
      /* PORTD_PCR4 */
      port_hal_mux_control(HW_PORTD,4u,kPortMuxAlt7);
      /* PORTD_PCR5 */
      port_hal_mux_control(HW_PORTD,5u,kPortMuxAlt7);
      /* PORTD_PCR6 */
      port_hal_mux_control(HW_PORTD,6u,kPortMuxAlt7);
      /* PORTD_PCR7 */
      port_hal_mux_control(HW_PORTD,7u,kPortMuxAlt7);
      break;
    default:
      break;
  }
}

void pin_mux_UART(uint32_t instance)
{
  switch(instance) {
    case 0:                             /* UART0 */
      /* PORTB_PCR16 */
      port_hal_mux_control(HW_PORTB,16u,kPortMuxAlt3);
      /* PORTB_PCR17 */
      port_hal_mux_control(HW_PORTB,17u,kPortMuxAlt3);
      break;
    case 4:                             /* UART4 BT */
      /* PORTC_PCR14 */
      port_hal_mux_control(HW_PORTC,14u,kPortMuxAlt3);
      /* PORTC_PCR15 */
      port_hal_mux_control(HW_PORTC,15u,kPortMuxAlt3);
      break;
    default:
      break;
  }
}

void pin_mux_CMP(uint32_t instance)
{
  switch(instance) {
    case 0:                             /* CMP0 */
      /* PORTB_PCR20 */
      port_hal_mux_control(HW_PORTB,20u,kPortMuxAlt6);
      break;
    default:
      break;
  }
}

void pin_mux_I2S(uint32_t instance)
{
  /* MCLK output */
  port_hal_mux_control(HW_PORTC,8u,kPortMuxAlt4);
  /* RX Data */
  port_hal_mux_control(HW_PORTC,5u,kPortMuxAlt4);
  /* RX Frame Sync */
  port_hal_mux_control(HW_PORTC,7u,kPortMuxAlt4);
  /* RX Bit clock */
  port_hal_mux_control(HW_PORTC,9u,kPortMuxAlt4);
  /* TX Bit Clock */
  port_hal_mux_control(HW_PORTB,18u,kPortMuxAlt4);
  /* TX Frame Sync */
  port_hal_mux_control(HW_PORTB,19u,kPortMuxAlt4);
  /* TX Data */
  port_hal_mux_control(HW_PORTC,1u,kPortMuxAlt6);
}

void pin_mux_SPI_CS0(uint32_t instance)
{
  port_hal_mux_control(HW_PORTD,0u,kPortMuxAsGpio);
}

void pin_mux_SPI_CS1(uint32_t instance)
{
  port_hal_mux_control(HW_PORTD,4u,kPortMuxAsGpio);
}

void pin_mux_FTM(uint32_t instance)
{
    switch(instance) 
    {    
        case 0:
            port_hal_mux_control(HW_PORTC,1u,kPortMuxAlt4);
            break;
        default:
            break;
    }
}

void pin_mux_GPIO_I2C(uint32_t instance)
{
  port_hal_mux_control(HW_PORTE,24u,kPortMuxAsGpio);
  port_hal_mux_control(HW_PORTE,25u,kPortMuxAsGpio);
}

void pin_mux_GPIO_UART(uint32_t instance)
{
  port_hal_mux_control(HW_PORTB,16u,kPortMuxAsGpio);
  port_hal_mux_control(HW_PORTB,17u,kPortMuxAsGpio);
}

/* END pin_mux. */
/*!
** @}
*/
/*
** ###################################################################
**
**     This file was created by Processor Expert 10.3 [05.09]
**     for the Freescale Kinetis series of microcontrollers.
**
** ###################################################################
*/
