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flash_demo.h
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1 /*
2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * o Redistributions of source code must retain the above copyright notice, this list
9 * of conditions and the following disclaimer.
10 *
11 * o Redistributions in binary form must reproduce the above copyright notice, this
12 * list of conditions and the following disclaimer in the documentation and/or
13 * other materials provided with the distribution.
14 *
15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
31 #ifndef _FLASH_DEMO_H_
32 #define _FLASH_DEMO_H_
33
34 #include "user_cfg.h"
35 #include "fsl_device_registers.h"
36 #include "board.h"
37 #include "SSD_Types.h"
38 #include "SSD_FTFx_Internal.h"
39 #include "SSD_FTFx_Common.h"
40 #include "SSD_FTFx.h"
41
42 /************************************************************************************************/
43 /************************************************************************************************/
44 /* K64FN Setup Definitions */
45 /************************************************************************************************/
46 /************************************************************************************************/
47 #if (defined(CPU_MK64FN1M0VMD12))
48
49 #define BUFFER_SIZE_BYTE 0x100
50
51 #define EE_ENABLE 0x00
52 #define RAM_ENABLE 0xFF
53 #define DEBUGENABLE 0x00
54
55 #define PSECTOR_SIZE 0x00001000 /* 4 KB size */
56 #define DSECTOR_SIZE 0x00001000 /* 4 KB size */
57
58 /* FTFL module base */
59 #define FTFx_REG_BASE 0x40020000
60 #define PFLASH_BLOCK_BASE 0x00000000
61 #define DEFLASH_BLOCK_BASE 0xFFFFFFFF
62 #define EERAM_BLOCK_BASE 0x14000000
63
64 #define PBLOCK_SIZE 0x00100000 /* 1024 KB size */
65 #define EERAM_BLOCK_SIZE 0x00001000 /* 4 KB size */
66
67 #define PBLOCK_NUM 2 /* number of individual Pflash block */
68 #define DBLOCK_NUM 0 /* number of individual Dflash block */
69
70 /* destination to program security key back to flash location */
71 #define SECURITY_LOCATION 0x408
72 #define BACKDOOR_KEY_LOCATION 0x400
73
74 #define PFLASH_IFR 0x3C0 /*Program flash IFR map*/
75 #define DFLASH_IFR 0x3F8 /*Data flash IFR map*/
76
77 #define EEE_DATA_SIZE_CODE 0x22
78 #define DE_PARTITION_CODE 0x03
79
80 #define PASS 0x00
81 #define FAIL 0xFF
82
83 #define READ_NORMAL_MARGIN 0x00
84 #define READ_USER_MARGIN 0x01
85 #define READ_FACTORY_MARGIN 0x02
86
87 /****************************************************************************/
88 /* Use an address towards the end of P-Flash block for the swap indicator. */
89 /* The swap indicator is managed by the swap system, but is a location in */
90 /* PFlash and it gets modified (erased & programmed) throughout the swap */
91 /* process, so it cannot share space with normal application code */
92 /* Here, we are using the second-to-last sector, since the Lower/Upper */
93 /* data blocks use the last sector are used to hold our test data to help */
94 /* identify each block after the swap */
95 /****************************************************************************/
96 #define PSWAP_INDICATOR_ADDR (PBLOCK_SIZE/PBLOCK_NUM - (2*FTFx_PSECTOR_SIZE))
97 /* The Lower & Upper Data sectors are used to program test data into, to */
98 /* help identify each block - for debug purposes. */
99 #define PSWAP_LOWERDATA_ADDR (PSWAP_INDICATOR_ADDR + FTFx_PSECTOR_SIZE)
100 #define PSWAP_UPPERDATA_ADDR (PSWAP_LOWERDATA_ADDR + PBLOCK_SIZE/2)
101
102 /* swap state in FCCOB5*/
103 #define FTFx_SWAP_STATE_UNINIT 0x0
104 #define FTFx_SWAP_STATE_READY 0x1
105 #define FTFx_SWAP_STATE_UPDATE 0x2
106 #define FTFx_SWAP_STATE_UPDATE_ERS 0x3
107 #define FTFx_SWAP_STATE_COMPLETE 0x4
108
109 #define CC_ISR_NUM 34
110 #define RDCOL_ISR_NUM 35
111
112 /* Cache disable macro */
113 #define CACHE_DISABLE FMC_PFB0CR &= ~(FMC_PFB0CR_B0SEBE_MASK | FMC_PFB0CR_B0IPE_MASK | FMC_PFB0CR_B0DPE_MASK | FMC_PFB0CR_B0ICE_MASK | FMC_PFB0CR_B0DCE_MASK);\
114 FMC_PFB1CR &= ~(FMC_PFB1CR_B1SEBE_MASK | FMC_PFB1CR_B1IPE_MASK | FMC_PFB1CR_B1DPE_MASK | FMC_PFB1CR_B1ICE_MASK | FMC_PFB1CR_B1DCE_MASK);\
115
116 void ErrorTrap(UINT32 returnCode);
117
118 /************************************************************************************************/
119 /************************************************************************************************/
120 /* K22FN Setup Definitions */
121 /************************************************************************************************/
122 /************************************************************************************************/
123 #elif (defined(CPU_MK22FN512VDC12))
124
125 #define BUFFER_SIZE_BYTE 0x100
126
127 #define EE_ENABLE 0x00
128 #define RAM_ENABLE 0xFF
129 #define DEBUGENABLE 0x00
130
131 #define PSECTOR_SIZE 0x800
132 #define DSECTOR_SIZE 0x800
133
134 /* FTFA module base */
135 #define FTFx_REG_BASE 0x40020000
136 #define PFLASH_BLOCK_BASE 0x00000000
137 #define DEFLASH_BLOCK_BASE 0xFFFFFFFF
138 #define EERAM_BLOCK_BASE 0xFFFFFFFF
139
140 #define PBLOCK_SIZE 0x00080000 /* 512 KB size */
141 #define EERAM_BLOCK_SIZE 0x00000000 /* 0 KB size */
142
143 #define PBLOCK_NUM 2 /* number of individual Pflash block */
144
145 /* destination to program security key back to flash location */
146 #define SECURITY_LOCATION 0x40C
147 #define BACKDOOR_KEY_LOCATION 0x400
148
149 #define PFLASH_IFR 0xC0
150
151 /******************************************************/
152 //#define DFLASH_IFR 0xFC
153
154 // #define EEE_DATA_SIZE_CODE 0x22 //2048 : 2048 Byte
155 // #define DE_PARTITION_CODE 0x03 //1:1
156
157 // #define READ_NORMAL_MARGIN 0x00
158 // #define READ_USER_MARGIN 0x01
159 // #define READ_FACTORY_MARGIN 0x02
160
161 // #define PFLASH_START_ADDR PFLASH_BLOCK_BASE /* PFlash start address */
162 // #define DFLASH_START_ADDR DEFLASH_BLOCK_BASE /* DFlash start address */
163
164 // #define PSWAP_INDICATOR_ADDR 0x2000
165 // #define PSWAP_LOWERDATA_ADDR (PSWAP_INDICATOR_ADDR + PSECTOR_SIZE)
166 // #define PSWAP_UPPERDATA_ADDR (PSWAP_LOWERDATA_ADDR + PBLOCK_SIZE/2 + PSECTOR_SIZE)
167
168 #define PASS 0x00
169 #define FAIL 0xFF
170
171 /* swap state in FCCOB5*/
172 // #define FTFx_SWAP_STATE_UNINIT 0x0
173 // #define FTFx_SWAP_STATE_READY 0x1
174 // #define FTFx_SWAP_STATE_UPDATE 0x2
175 // #define FTFx_SWAP_STATE_UPDATE_ERS 0x3
176 // #define FTFx_SWAP_STATE_COMPLETE 0x4
177
178 #define CC_ISR_NUM 34
179 #define RDCOL_ISR_NUM 35
180
181 /* Disable cache */
182 #define CACHE_DISABLE FMC_PFB0CR &= ~(FMC_PFB0CR_B0SEBE_MASK | FMC_PFB0CR_B0IPE_MASK | FMC_PFB0CR_B0DPE_MASK |FMC_PFB0CR_B0ICE_MASK | FMC_PFB0CR_B0DCE_MASK); \
183 FMC_PFB1CR &= ~(FMC_PFB1CR_B1SEBE_MASK | FMC_PFB1CR_B1IPE_MASK | FMC_PFB1CR_B1DPE_MASK |FMC_PFB1CR_B1ICE_MASK | FMC_PFB1CR_B1DCE_MASK);
184
185 void ErrorTrap(UINT32 ret);
186
187 #endif /* if/else device definition */
188 /***************************************************************************************/
189 /***************************************************************************************/
190 /***************************************************************************************/
191 /***************************************************************************************/
192
193 /* Other defines */
194
195 #define ONE_KB 1024 //0x400: 10 zeros
196 #define TWO_KB (2*ONE_KB)
197 #define THREE_KB (3*ONE_KB)
198 #define FOUR_KB (4*ONE_KB)
199 #define FIVE_KB (5*ONE_KB)
200 #define SIX_KB (6*ONE_KB)
201 #define SEVEN_KB (7*ONE_KB)
202 #define EIGHT_KB (8*ONE_KB)
203 #define NINE_KB (9*ONE_KB)
204 #define TEN_KB (10*ONE_KB)
205 #define ONE_MB (ONE_KB*ONE_KB) //0x100000: 20 zeros
206 #define ONE_GB (ONE_KB*ONE_KB*ONE_KB) //0x40000000: 30 zeros
207
208 #define WORD_SIZE 4
209 #define BLANK_DATA 0xFFFFFFFF
210
211 #define NORMAL_MARGIN_READ 0 /* normal margin read reference */
212 #define USER_MARGIN_READ 1 /* use for test scenarios for bit shifts */
213
214 #define UPPER_BLOCK_START_ADDRESS (flashSSDConfig.PFlashBlockBase + BYTE2WORD(flashSSDConfig.PFlashBlockSize/PBLOCK_NUM))
215 #define LOWER_BLOCK_START_ADDRESS (flashSSDConfig.PFlashBlockBase)
216
217 #define SWAP_STATUS_BIT \
218 (REG_READ(FTFx_REG_BASE + FTFx_SSD_FCNFG_OFFSET) & FTFE_FCNFG_SWAP_MASK)
219 #define DEMO_LOCATIONS_ARE_BLANK \
220 ((READ32(PSWAP_LOWERDATA_ADDR) == 0xFFFFFFFF) && (READ32(PSWAP_UPPERDATA_ADDR) == 0xFFFFFFFF))
221
222 /************************************************************/
223 /* prototypes */
224 /************************************************************/
225 void callback(void);
226 extern UINT32 RelocateFunction(UINT32 dest, UINT32 size, UINT32 src);
227 void print_welcome_message(void);
228 #if (defined(SWAP))
229 UINT32 flash_swap(void);
230 void run_flash_swap(void);
231 void print_swap_application_data(void);
232 #endif /* #if (defined(SWAP)) */
233
234 #endif /* _FLASH_DEMO_H_ */
callback
void callback(void)
Definition: flash_demo.c:462
ErrorTrap
void ErrorTrap(UINT32 ret)
Definition: flash_demo.c:445
print_welcome_message
void print_welcome_message(void)
RelocateFunction
UINT32 RelocateFunction(UINT32 dest, UINT32 size, UINT32 src)
user_cfg.h