#include ; Include header file ;------------------------------------------------------------------------------ ORG 0E000h ; Program start ;------------------------------------------------------------------------------ RESET mov.w #0300h,SP ; Initialise stackpointer StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT ; Use R4 for delay subroutine, initialised in subroutine ; Use R5 to define start of RAM for conversion results, initialised in subroutine ; Use R6 for number of samples to acquire, initialised in interrupt routine ; Use R7 for start of flash memory, initialised in subroutine call #SetupDOC SetupP1 bis.b #BIT1,&P1DIR ; Set P1.1 as output SetupP2 bic.b #BIT1,&P2DIR ; Set P2.1 as input bic.b #BIT1,&P2OUT ; Reset P2.1 bic.b #BIT1,&P2IES ; Select low-to-high transition bis.b #BIT1,&P2IE ; Enable interrupt at P2.1 eint ; Enable global interrupt Mainloop bis.b #BIT1,&P1OUT ; Set P1.1 (LED on) call #Delay ; Call subroutine bic.b #BIT1,&P1OUT ; Reset P1.1 (LED off) call #Delay ; Call subroutine jmp Mainloop ;------------------------------------------------------------------------------ ; Subroutine for Delay ;------------------------------------------------------------------------------ Delay mov.w #2731,R4 ; Delay to register R4 Delay_1 dec R4 ; Decrement register R4 jnz Delay_1 ; Check if R4 down to zero ret ; Leave subroutine ;------------------------------------------------------------------------------ ; Subroutine for Clock initialisation ;------------------------------------------------------------------------------ SetupDOC bic.b #DCOR,&BCSCTL2 ; Select internal resistor bis.b #RSEL2+RSEL0,&BCSCTL1 ; Select nominal frequency range (5) bis.b #DCO1+DCO0,&DCOCTL ; Select frequency step (3) ; No frequency switching, no change required on MODx call #Delay SwitchCLK bic.w #OSCOFF,SR ; Turn on oscillator bis.b #XTS,&BCSCTL1 ; Switch to HF-mode to clear OFIFG ClearOFIFG bic.b #OFIFG,&IFG1 ; Clear OFIFG bic.b #XTS,&BCSCTL1 ; Select LF-mode call #Delay ; check whether OFIFG remains deactivated bit.b #OFIFG,&IFG1 ; after short waiting period jnz ClearOFIFG SetupCLK bis.b #XT2OFF,&BCSCTL1 ; Turn of XT2-Oscillator bic.b #XTS,&BCSCTL1 ; Select LF-mode bis.b #DIVA0,&BCSCTL1 ; Select divider for ACLK (2) bic.b #XT5V,&BCSCTL1 ; Reset XT5V for safety reason bis.b #DIVM0,&BCSCTL2 ; Select divider for MCLK (2) bis.b #DIVS0,&BCSCTL2 ; Select divider for SMCLK (2) bis.b #SELM0+SELM1,&BCSCTL2 ; Select source for MCLK (OSC) bic.b #SELS,&BCSCTL2 ; Select source for SMCLK (DCO) ret ;------------------------------------------------------------------------------ ; Subroutine for ADC12 initialisation ;------------------------------------------------------------------------------ ADC12INI bis.w #REF2_5V+REFON,&ADC12CTL0 ; Set reference generator to 2.5 V, activate generator call #Delay ; Wait time for reference voltage to stabilise bis.w #ADC12SSEL_3,&ADC12CTL1 ; Select MCLK as clock source bis.w #ADC12DIV_1,&ADC12CTL1 ; clock divider = 2 bis.w #SHP,&ADC12CTL1 ; Enable pulse mode bis.w #SHT1_8,&ADC12CTL0 ; Set sample-and-hold time to 256 ADC12CLK cycles bis.w #SHT0_8,&ADC12CTL0 ; Set sample-and-hold time to 256 ADC12CLK cycles bis.w #SHS_0,&ADC12CTL1 ; Internal oscillator as source for sample-input signal bis.w #ADC12ON,&ADC12CTL0 ; Activate ADC12 ret ;------------------------------------------------------------------------------ ; Subroutine for channel initialisation ;------------------------------------------------------------------------------ CHINI bis.b #BIT1,&P6SEL ; Enable A/D channel A1 bis.w #CONSEQ_2,&ADC12CTL1 ; Select Repeat-single-channel bis.w #CSTARTADD_0,&ADC12CTL1 ; Select conversion memory register bis.b #SREF_0,&ADC12MCTL0 ; Vr+ = Vref+ bis.b #INCH_1,&ADC12MCTL0 ; Read P6.1 bis.w #BIT0,&ADC12IE ; Enable Interrupt for MEM0 bis.w #MSC,&ADC12CTL0 ; Enable fast sampling ret ;------------------------------------------------------------------------------ ; Subroutine for erasing flash segments ;------------------------------------------------------------------------------ FlashErase dint ; Disable all interrupt FLASH1 bit.w #BUSY,&FCTL3 ; Test if timing generator busy jnz FLASH1 mov.w #FWKEY+FSSEL1+FN0,&FCTL2 ; Setup timing source mov.w #FWKEY,&FCTL3 ; Unlock flash for erase mov.w #FWKEY+ERASE,&FCTL1 ; Choose erase mode clr &04000h ; Erase segment FLASH2 bit.w #BUSY,&FCTL3 ; Test if timing generator busy jnz FLASH2 mov.w #FWKEY+LOCK,&FCTL3 ; Lock flash memory ret ;------------------------------------------------------------------------------ ; Subroutine for writing flash segments ;------------------------------------------------------------------------------ FlashWrite dint ; Disable all interrupts FLASH3 bit.w #BUSY,&FCTL3 ; Test if timing generator busy jnz FLASH3 mov.w #FWKEY+FSSEL1+FN0,&FCTL2 ; Setup timing source mov.w #FWKEY,&FCTL3 ; Unlock flash for writing mov.w #FWKEY+WRT,&FCTL1 ; Choose write mode mov.w @R5+,0(R7) ; Write FLASH4 bit.w #BUSY,&FCTL3 ; Test if timing generator busy jnz FLASH4 mov.w #FWKEY,&FCTL1 ; Clear write mode mov.w #FWKEY+LOCK,&FCTL3 ; Lock flash memory ret ;------------------------------------------------------------------------------ ; Interrupt service routine port2 ;------------------------------------------------------------------------------ P2_ISR dint ; Disable global interrupt bic.b #BIT1,&P2IE ; Disable Interrupt for P2.1 mov.b #0000h,&P2IFG ; Reset interrupt flag for P2.1 bis.b #BIT1,&P1OUT ; Enable LED call #ADC12INI ; Perform ADC12 initialisation call #CHINI ; Perform channel initialisation mov.w #100,R6 ; Number of samples to acquire mov.w #0A00h,R5 ; Start of RAM for conversion results eint CONVERT1 bis.w #ENC,&ADC12CTL0 ; Enable conversion CONVERT2 bis.w #ADC12SC,&ADC12CTL0 ; Start conversion IDLE cmp #0,R6 jne IDLE mov.w #0A00h,R5 mov.w #100,R6 mov.w #04000h,R7 ; Start of flash memory for conversion results CopyFlash call #FlashWrite ; Write to flash memory incd R7 ; Select next memory slot dec R6 ; Decrement counter jnz CopyFlash ; Compare again bis.b #BIT1,&P2IE ; Enable Interrupt for P2.1 eint ; Enable global interrupt bic.b #BIT1,&P1OUT ; Disable LED reti ; Return from interrupt ;------------------------------------------------------------------------------ ADC12_ISR ; Interrupt Service Routine for ADC12 ;------------------------------------------------------------------------------ CopyRAM incd R5 ; Select next memory slot dec R6 ; Decrement counter mov.w #ADC12MEM0,0(R5) ; Copy contents of MEM0 to memory reti ;------------------------------------------------------------------------------ ; Interrupt Vectors Used MSP430F16x ;------------------------------------------------------------------------------ ORG 0FFFEh ; MSP430 RESET Vector DW RESET ORG 0FFEEh ; ADC12 Interrupt Vector DW ADC12_ISR ORG 0FFE2h ; P2_ISR DW P2_ISR END