2012-09-06 James Lemke Catherine Moore Maciej W. Rozycki Nathan Froyd Nathan Sidwell gcc/ * config.gcc : New subconfig. * config/rs6000/constraints.md (kone1): Rewrite. * config/rs6000/constraints.md (kbic5): New constraint. * config/rs6000/constraints.md (kbit5, kmsk5): New constraints. * config/rs6000/constraints.md (kli20, koim5): Fix formatting. (kscP8, kuim7, kui16): Likewise. * config/rs6000/constraints.md (kscP8): New constraint. * config/rs6000/constraints.md (kscI8): New constraint. * config/rs6000/constraints.md (ksci8): Correct the expression matched against. Clarify documentation. * config/rs6000/constraints.md (kcrxx): New register constraint. * config/rs6000/constraints.md (ksci8): Handle 64 bit constants. * config/rs6000/constraints.md (ksci8): Check for valid negative constants. * config/rs6000/constraints.md (kcreg): New constraint. * config/rs6000/constraints.md (karegs, kli20, kmsd4, kmmd8, kone1, kuim7, kui16): New constraints. Alphabetize VLE constraints. * config/rs6000/constraints.md (koim5): Renamed from kimm5. (kuim5): New constraint. (ksci8): Unsigned. * config/rs6000/constraints.md (kregs): New constraint. (kimm5): New constraint. (ksci8): New constraint. * config/rs6000/crtresfpr.asm: Disable for VLE. * config/rs6000/crtresgpr.asm: Remove .text_vle section. * config/rs6000/crtresgpr.asm: Add VLE support. * config/rs6000/crtresxfpr.asm: Disable for VLE. * config/rs6000/crtresxgpr.asm: Unify VLE and BookE code. * config/rs6000/crtresxgpr.asm: Remove .text_vle section. * config/rs6000/crtresxgpr.asm: Add VLE support * config/rs6000/crtsavfpr.asm: Disable for VLE. * config/rs6000/crtsavgpr.asm: Remove .text_vle section. * config/rs6000/crtsavgpr.asm: Add VLE support * config/rs6000/driver-rs6000.c (asm_names): Add support for e200z0, e200z1, e200z2, e200z3, e200z5 and e200z7. * config/rs6000/e500crtres32gpr.asm: Port to VLE. * config/rs6000/e500crtres64gpr.asm: Likewise. * config/rs6000/e500crtres64gprctr.asm: Likewise. * config/rs6000/e500crtrest32gpr.asm: Likewise. * config/rs6000/e500crtrest64gpr.asm: Likewise. * config/rs6000/e500crtresx32gpr.asm: Likewise. * config/rs6000/e500crtresx64gpr.asm: Likewise. * config/rs6000/e500crtsav32gpr.asm: Likewise. * config/rs6000/e500crtsav64gpr.asm: Likewise. * config/rs6000/e500crtsav64gprctr.asm: Likewise. * config/rs6000/e500crtsavg32gpr.asm: Likewise. * config/rs6000/e500crtsavg64gpr.asm: Likewise. * config/rs6000/e500crtsavg64gprctr.asm: Likewise. * config/rs6000/e500crtsavgpr.asm: Unify VLE and BookE code. * config/rs6000/eabi-ci.asm: Unify VLE and BookE code. * config/rs6000/eabi-ci.asm: Add VLE support * config/rs6000/eabi-cn.asm: Unify VLE and BookE code. * config/rs6000/eabi-cn.asm: Add VLE support * config/rs6000/eabi.h (CC1_EXTRA_SPEC): Use -mfloat-gprs=single for te200z6 and te200z7. * config/rs6000/eabi.h (xxx): Add te200z*. (ASM_DEFAULT_SPEC): Add te200z*. * config/rs6000/eabi.h (CC1_EXTRA_SPEC): Add -tvle. (ASM_DEFAULT_SPEC): Likewise. * config/rs6000/eabivle.h: New file. * config/rs6000/option-defaults.h (cpu): Handle te200. * config/rs6000/option-defaults.h (OPTION_DEFAULTS_SPEC): Add support for -tvle. * config/rs6000/ppc-asm.h (ADD16I): New definition. (B): Likewise. (BDZ): Likewise. (BLR): Likewise. (LWZ): Likewise. (MFAR): Likewise. (MTAR): Likewise. (MFLR): Likewise. (MTLR): Likewise. (STW): Likewise. (STWU): Likewise. * config/rs6000/predicates.md (one_constant): New predicate. * config/rs6000/predicates.md (vle_and_operand): Handle se_bclri immediates. (vle_andc_operand): New predicate. (vle_or_operand): Handle se_bseti immediates. * config/rs6000/predicates.md (vle_or_operand): Rewrite. (vle_xor_operand): Update indentation. * config/rs6000/predicates.md (vle_reg_or_imm_operand): Rename to... (vle_add3_operand): ... this new predicate. Update comment. (non_add_cint_operand): Handle the VLE mode too. Update comment. * config/rs6000/predicates.md (vle_sd4_operand): Update comment. * config/rs6000/predicates.md (vle_and1_operand): Add missing supported immediates. (vle_and2_operand, vle_and3_operand): Unify into... (vle_andcmp_operand): ... this new predicate. * config/rs6000/predicates.md (vle_logical_cmphi_operand): New predicate. * config/rs6000/predicates.md (reg_or_neg_d_d8_operand): New predicate. * config/rs6000/predicates.md (vle_cc_reg_not_cr0_operand): Delete. * config/rs6000/predicates.md (rs6000_legitimate_offset_address_p): Update callers. * config/rs6000/predicates.md (vle_cc_reg_operand): New. * config/rs6000/predicates.md (vle_and1_operand): New. (vle_or_operand): New. (vle_xor_operand): New. (vle_and2_operand): New. (vle_and3_operand): New. (cc_reg_cr0_operand): New. * config/rs6000/predicates.md (vle_reg_or_imm_operand): New. (cc_reg_cr0_operand): New. * config/rs6000/predicates.md (vle_d8_operand): New predicate. (vle_sd4_operand): New predicate. * config/rs6000/predicates.md (vle_reg_operand): Rewrite to avoid warning. (vle_sub_operand1): New predicate. (vle_sub_operand2): New predicate. (vle_and_operand): New predicate. (vle_sci8_operand): New predicate. * config/rs6000/predicates.md (vle_add_operand): Use koim5. (andsi3_vle1): New define_insn. (andsi3_vle2): New define_insn. (andsi3_vle3): New define_insn. * config/rs6000/predicates.md (vle_reg_operand): New. (vle_add_operand): New. * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Add definitions for e200z1, e200z2, e200z7. * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Add builtin definition for __PPCVLE__. * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Add builtin_defines: "__PPCE200Z0__", "__PPCE200Z3__", and __PPCE200Z6__". * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Predefine __VLE__ for TARGET_VLE. * config/rs6000/rs6000-cpus.def: Likewise. * config/rs6000/rs6000-opts.h (processor_type): Insert VLE values. * config/rs6000/rs6000-protos.h (valid_sci8_immediate): New prototype. * config/rs6000/rs6000-protos.h (valid_vle_sd4_field): Declare. * config/rs6000/rs6000-tables.opt: Insert VLE processor types. * config/rs6000/rs6000.c (valid_sci8_immediate): New function. * config/rs6000/rs6000.c (rs6000_make_savres_rtx): Change gen_rtx_RETURN to ret_rtx. (rs6000_emit_epilogue): Likewise. (rs6000_output_mi_thunk): Likewise. * config/rs6000/rs6000.c (xorsi3_vle): Fix formatting. (iorsi3_vle): Likewise. * config/rs6000/rs6000.c (print_operand) <'o', 'r'>: New operand specifiers. * config/rs6000/rs6000.h (reg_class): Add VLE_REGS. (REG_CLASS_NAMES): Likewise. (REG_CLASS_CONTENTS): Likewise. (reg_class_enum): Likewise. * config/rs6000/rs6000.md (define_attr "cpu"): Add ppce200z[012367]. * config/rs6000/rs6000.opt (te200z*): Add options. * config/rs6000/constraints.md (ksci8, kscp8): Replace inline code with a call to valid_sci8_immediate. * config/rs6000/eabi.h (__PPC_EABI__): Predefine. * config/rs6000/sysv4.h (TEXT_SECTION_ASM_OP): Redefine to ".text". * config/rs6000/rs6000.c (output_e500_flip_gt_bit): Use %% to avoid invalid formatting error. * config/rs6000/rs6000.c (rs6000_trampoline_size): Set the VLE trampoline size. * config/rs6000/rs6000.c (rs6000_output_load_multiple): Add missing instruction prefixes for the VLE mode. * config/rs6000/rs6000.c (print_operand) <'e'>: Only print the prefix for VLE instructions. * config/rs6000/rs6000.c (rs6000_rtx_costs): Fix calculation for VLE-mode CONST_INT references. * config/rs6000/rs6000.c (print_operand) <'g'>: New operand specifier. <'o'>: Check the upper bound too. * config/rs6000/rs6000.c (rs6000_split_multireg_move): Use emit_insn for the calls to gen_move_update instructions. * config/rs6000/rs6000.c (rs6000_rtx_costs): Set the cost right for 32-bit negatives on 32-bit targets. * config/rs6000/rs6000.c (print_operand) <'e'>: Fix formatting. * config/rs6000/rs6000.c (output_cbranch): Correct the handling of short reverse-condition branches over long-distance ones. * config/rs6000/rs6000.c (rs6000_split_multireg_move): Unify VLE and non-VLE code. (rs6000_emit_allocate_stack): Likewise. Set the VLE-mode stack size restriction correctly. * config/rs6000/rs6000.c (print_operand): Print "16" for '?' if TARGET_VLE. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Change -tvle to -te200z*. * config/rs6000/rs6000.h (PRINT_OPERAND_PUNCT_VALID_P): Add '?'. * config/rs6000/rs6000.md (andsi3_vle): Add se_bclri. (andcsi3_vle): New insn pattern. (xorsi3_vle): Hide pattern's name. (iorsi3_vle): Likewise. Add se_bseti. * config/rs6000/predicates.md (zero_fp_constant): Fix description. (got_operand): Likewise. * config/rs6000/predicates.md (vle_reg_or_neg_imm_operand): New predicate. * config/rs6000/predicates.md (cmpi_cc_reg_vle_or_not_micro_cr0_operand): New predicate. (cc_reg_not_micro_cr0_operand): Simplify. (cmpi_cc_reg_not_micro_cr0_operand): Likewise. * config/rs6000/predicates.md (cmpi_cc_reg_operand): New predicate. (cmpi_cc_reg_not_cr0_operand): Likewise. (cmpi_cc_reg_not_micro_cr0_operand): Likewise. * config/rs6000/predicates.md (cc_reg_not_micro_cr0_operand): Fix formatting. * config/rs6000/predicates.md (vle_arith_cmpsi_operand): New. (vle_logical_cmpsi_operand): New. (vle_arith_cmphi_operand): New. (vle_cc_reg_not_cr0_operand): New. * config/rs6000/rs6000.c: Update to use the new macros throughout. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Handle the kcrxx constraint. (rs6000_init_hard_regno_mode_ok): Likewise. * config/rs6000/rs6000.c (output_vec_const_move): Add missing instruction prefixes for the VLE mode. (output_e500_flip_gt_bit): Likewise. * config/rs6000/rs6000.c (rs6000_emit_set_const): Fix formatting. * config/rs6000/rs6000.c (print_operand): Rename %c to %C. * config/rs6000/rs6000.c (rs6000_override_options): Remove MASK_MULHW from POWERPC_E200_MASK. (expand_block_move): Replace TARGET_VLE_STRING with TARGET_STRING. * config/rs6000/rs6000.c (print_operand): Handle the i specifier. * config/rs6000/rs6000.c (valid_vle_sd4_field): Accept pseudo registers too. * config/rs6000/rs6000.c (rs6000_override_options): Remove MASK_SOFT_FLOAT from e200z3, e200z6 and e200z7. Don't default TARGET_VLE to soft-float. (rs6000_register_move_cost): Handle new cpus. * config/rs6000/rs6000.c (rs6000_emit_cbranch): Disallow conditional returns in the VLE mode. Adjust comment to match code. * config/rs6000/rs6000.c (rs6000_preferred_reload_class): Adjust comment. (rs6000_secondary_reload_class): Delete cases for VLE_ALT_REGS and LR/CTR. (print_operand): Add case for '-' * config/rs6000/rs6000.c (valid_vle_sd4_field): Initialize `high'. Permit `base' to be one of r24-r31 as well. * config/rs6000/rs6000.c (rs6000_override_options): Handle e200 processors similarly to e500 processors. Define POWERPC_E200_MASK. [processor_target_table]: Change e200 processors to use it. (rs6000_savres_strategy): Account for VLE's smaller offset on load/store-multiple insns. * config/rs6000/rs6000.c (vle_code): Remove extra semicolon. (valid_vle_sd4_field): Reorganize for correctness. * config/rs6000/rs6000.c (rs6000_preferred_reload_class): Handle LR and CTR specially. (rs6000_secondary_reload_class): Indicate we can place anything into VLE_REGS. * config/rs6000/rs6000.c (init_hard_regno_mode_ok): Setup rs6000_regno_regclass differently for VLE. * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): Add vle_update argument. Update all callers. * config/rs6000/rs6000.c (rs6000_override_options): Enable MULHW instructions for VLE. * config/rs6000/rs6000.c (vle_code): Initialize to zero. (rs6000_override_options): Set to 1 for TARGET_VLE. (output_cbranch): Handle long branches for VLE. * config/rs6000/rs6000.c (rs6000_split_multireg_move): Call gen_movsi_update_vle. (rs6000_emit_allocate_stack): Call gen_movsi_update_stack_vle. * config/rs6000/rs6000.c (rs6000_secondary_reload): Disable moves moves between the alternate registers and the link or ctr registers. (rs6000_register_move_cost): Increase the cost of moves between alternate registers and the link or ctr registers. * config/rs6000/rs6000.c (print_operand): Add 'e' to print the "e_" suffix for non-indexed addresses. * config/rs6000/rs6000.c (print_operand): Print "se_" if '+' seen. * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Use the VLE_ALT_REG class. (rs6000_secondary_reload_class): Disallow moves between alternate registers for VLE-mode. (rs6000_register_move_cost): Increase the cost of moves between VLE_ALT_REGS. * config/rs6000/rs6000.c (rs6000_override_options): Add support for e200z0, e200z1, e200z2, e200z3, e200z5 and e200z7. Detect little endian mismatch. Use soft-float for vle compilations. * config/rs6000/rs6000.c (output_cbranch): Emit correct syntax for TARGET_VLE. * config/rs6000/rs6000.c (output_cbranch): Emit VLE mnemonic. (print_operand): Add support for '^'. * config/rs6000/rs6000.c (valid_vle_sd4_field): Ensure that the base register is a valid VLE register. * config/rs6000/rs6000.c (valid_vle_sd4_field): New function. * config/rs6000/rs6000.h (SELECT_CC_MODE): Handle ZERO_EXTRACT in the VLE mode. * config/rs6000/rs6000.h (VLE_TRAMPOLINE_SIZE): Define. (TARGET_32BIT_TRAMPOLINE_SIZE): Define. (TARGET_64BIT_TRAMPOLINE_SIZE): Define. * config/rs6000/rs6000.h (TARGET_VLE_MULHW): Remove macro. (TARGET_VLE_POPCNTB, TARGET_VLE_STRING): Likewise. * config/rs6000/rs6000.h (TARGET_VLE_ISEL): New macro. (TARGET_VLE_MULHW, TARGET_VLE_MULTIPLE): Likewise. (TARGET_VLE_POPCNTB, TARGET_VLE_POWERPC): Likewise. (TARGET_VLE_STRING, TARGET_VLE_ISEL64): Likewise. (TARGET_POWER_NOVLE): Likewise. * config/rs6000/rs6000.h (RS6000_CONSTRAINT_kcrxx): New enum value. * config/rs6000/rs6000.h (PRINT_OPERAND_PUNCT_VALID_P): Add '-'. * config/rs6000/rs6000.h (CR_REGNO_NOT_CR0_P): Define. (CR_REGNO4_THRU_7_P, VLE_CR_REGNO_P): Define. * config/rs6000/rs6000.h (VLE_CR_REGNO_NOT_CR0_P(N): New. * config/rs6000/rs6000-protos.h (rs6000_legitimate_offset_address_p): Add argument to prototype. * config/rs6000/rs6000.h (vle_code): Declare. * config/rs6000/rs6000.h (VLE_CR_REGNO_P): New. * config/rs6000/rs6000.h (CR0_REGNO_P): New. (VLE_CR_REGNO_P): New. * config/rs6000/rs6000.h (TARGET_NO_LWSYNC): Don't define for VLE. (FUNCTION_BOUNDARY): Define to 16 for VLE. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Don't pass -many if VLE. * config/rs6000/rs6000.h (PRINT_OPERAND_PUNCT_VALID_P): Allow '+'. * config/rs6000/rs6000.h (VLE_ALT_REGNO_P): Define. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Pass -mvle to the assembler. (processor_type): Add PPCE200Z0, PPCE200Z1, PPCE200Z2, PPCE200Z3, PPCE200Z6 and PPCE200Z7. * config/rs6000/rs6000.h (reg_class): Add VLE_CR_REGS. (REG_CLASS_NAMES): Likewise. (REG_CLASS_CONTENTS): Likewise. (reg_class_enum): Likewise. (PRINT_OPERAND_PUNCT): New punctuation '^'. * config/rs6000/rs6000.h (reg_class): Add VLE_ALT_REGS. (REG_CLASS_NAMES): Likewise. (REG_CLASS_CONTENTS): Likewise. (reg_class_enum): Likewise. * config/rs6000/rs6000.md: Likewise. * config/rs6000/sync.md: Likewise. * config/rs6000/rs6000.md (movsi_vle): Use the rs6000_nonimmediate_operand predicate. * config/rs6000/rs6000.md (extzvsi_vle): New pattern. * config/rs6000/rs6000.md (movsi_vle): Add se_bgeni and se_bmaski alternatives. Split loads of immediates that fall back to the "n" constraint. (movhi_vle, movqi_vle): Add se_bgeni and se_bmaski alternatives. Correct the condition of an unnamed split pattern to correct the handling of large constant loads encodeable with single VLE instructions. * config/rs6000/rs6000.md (add3): Correct the splitting of VLE-mode operations. Likewise an unnamed split pattern. * config/rs6000/rs6000.md (sub3): Use mode for the VLE-mode register operand. * config/rs6000/rs6000.md (sub3): Fix formatting. * config/rs6000/rs6000.md (neg_ltu): Use kscP8. (geu, geu_compare): Likewise. (plus_geu, and_neg_geu): Likewise. Likewise other four, unnamed patterns. * config/rs6000/rs6000.md (neg_geu): Update to use the kscI8 constraint. Likewise another, unnamed pattern. * config/rs6000/rs6000.md (movsf_softfloat_vle2): Rename to... (movsf_softfloat_vle): ... this pattern. Add some immediate and register alternatives. * config/rs6000/rs6000.md (movsf_softfloat_vle2): Fix formatting. * config/rs6000/rs6000.md (neg_ltu): Handle VLE mode immediates. (geu, geu_compare, plus_geu): Likewise. (neg_geu, and_neg_geu): Likewise. Likewise in four unnamed templates. * config/rs6000/rs6000.md: Likewise. Replace TARGET_VLE_MULHW and TARGET_VLE_POPCNTB with TARGET_MULHW and TARGET_POPCNTB, respectively. * config/rs6000/rs6000.md: Update to handle the limited choice of CR fields available to some instructions in the VLE mode throughout. * config/rs6000/rs6000.md (*movsf_softfloat_vle2): Generate the mr instruction. * config/rs6000/rs6000.md (andsi3_vle): Use %0 as the output operand's specifier consistently. * config/rs6000/rs6000.md (cceq_ior_compare): Add %^ to the instruction template. (return_and_restore_fpregs_): Likewise. Likewise in three unnamed templates. * config/rs6000/rs6000.md (lshrsi3_no_power): Add short register moves. Fix immediate shift count operand specifier. * config/rs6000/rs6000.md (ashlsi3_no_power): Correct O vs 0 typos in constraints. (lshrsi3_no_power): Likewise. * config/rs6000/rs6000.md (rotlsi3): Use e_rlwi for VLE immediate rotates. Convert to use a list of templates for alternatives. (rotlsi3_internal2, rotlsi3_internal3): Handle VLE rotates. (rotlsi3_internal4): Likewise. (rotlsi3_internal5): Disable this and the associated split pattern for VLE. (rotlsi3_internal6): Likewise. (rotlsi3_internal7): Handle VLE rotates. (rotlsi3_internal8): Disable this and the associated split pattern for VLE. (rotlsi3_internal9): Likewise. (rotlsi3_internal10): Handle VLE rotates. (rotlsi3_internal11): Disable this and the associated split pattern for VLE. (rotlsi3_internal12): Likewise. (move_from_CR_gt_bit): Handle VLE rotates. (move_from_CR_ov_bit): Likewise. Disable further unnamed insn, split and peephole patterns that require rlwinm. for VLE. Add %^ prefix to rlwinm in unnamed patterns supported for VLE. * config/rs6000/rs6000.md: Add short VLE encodings of HI->SI zero-extending moves. * config/rs6000/rs6000.md (addsi3_vle1): Use the L constraint instead of K. Update the corresponding alternative's immediate argument specifier accordingly. * config/rs6000/rs6000.md (addsi3_vle1): Fix formatting. * config/rs6000/rs6000.md (andsi3): Remove preparation statements. (andsi3_vle): Add standard register form and 2-argument immediate forms, disparage register variants. (andsi3_vle2): Add ksci8 immediate form, disparage register variants. (andsi3_vle3): Fix K and L form immediate argument specifiers, disparage register variants. (andsi3_mc): Disable for non-VLE, remove isa attributes. (andsi3_nomc, andsi3_internal0_nomc): Disable for non-VLE. * config/rs6000/rs6000.md (andsi3_vle): Fix formatting. (andsi3_vle2, andsi3_vle3): Likewise. * config/rs6000/rs6000.md (cmpsi_logical_vle): Use the correct CR predicate. Use the correct specifier for the unsigned constant integer argument. (cmpsi_arithmetic_vle1): Rename to... (cmpsi_arithmetic_vle): ... this new pattern. Use the correct CR predicate. (cmphi_logical_vle): Handle more operand classes. Correct operand references. (cmphi_arithmetic_vle): Adjust disparagement of alternatives. Correct operand references. (cmpsi_internal2): Restrict to non-VLE targets. * config/rs6000/rs6000.md (movsi_vle): Match the order of alternatives with other patterns. (movhi_vle): Likewise. Add long register and immediate forms. (movqi_vle): Likewise. Add link and counter register forms. * config/rs6000/rs6000.md (length): Correct limits for direct conditional branches. * config/rs6000/rs6000.md (movhi_vle): Add missing update instruction suffix specifiers. (movqi_vle): Likewise. (movsi_update1_vle): Fold into... (movsi_update1): ... this pattern. (movsi_update_vle): Remove 16-bit immediate offset alternative. Fold into... (movsi_update): ... this pattern. (movsi_update_stack_vle): Fold into... (movsi_update_stack): ... this pattern. (movhi_update_vle): Fold into... (movhi_update1): ... this pattern. (movhi_update2): Handle the VLE/non-VLE mode immediate offsets. (movhi_update3, movhi_update4): Likewise. (movqi_update_vle): Fold into... (movqi_update1): ... this pattern. (movqi_update2): Handle the VLE/non-VLE mode immediate offsets. (movqi_update3): Likewise. (allocate_stack): Handle the VLE-mode stack size restriction. * config/rs6000/rs6000.md (allocate_stack): Remove redundant range check. * config/rs6000/rs6000.md (allocate_stack): Fix formatting. * config/rs6000/rs6000.md (cbranch_vle): Update predicate and constraint and fold this VLE and the corresponding unnamed non-VLE pattern into... (cbranch_direct): ... this new pattern. (cbranch_vle2): Likewise into... (cbranch_reverse): ... this new pattern. (creturn_direct): New name for the existing conditional return pattern. Disable for VLE. (creturn_reverse): Likewise. * config/rs6000/rs6000.md (movqi_vle): Fix formatting of operands. * config/rs6000/rs6000.md (*movhi_vle): Add patterns to move to and from the link and counter registers. * config/rs6000/rs6000.md: Delete VLE-specific define_splits using it. (define_insn ""): Set isa attribute to disallow arbitrary CR regs for VLE. Many examples. (*addsi3_vle2): Merge with... (*add3_internal2): ...this. Allow pattern everywhere. (*add3_internal3): Allow pattern everywhere and add VLE-specific add insns. (*one_cmpl2_value): Merge with... (*one_cmpl2_internal): ...this. (ashlsi3_vle): Merge with... (ashlsi3_no_power): ...this. (ashlsi3): Don't check for VLE. (lshrsi3_vle): Merge with... (lshrsi3_no_power): ...this. (lshrsi3): Don't check for VLE. (ashrsi3_vle): Merge with... (ashrsi3_no_power): ...this. (ashrsi3): Don't check for VLE. (*cmp_lshrsi3_vle): Delete. (*scc_vle): Delete. (*atomic_andsi): Add VLE-specific alternative. * config/rs6000/rs6000.md (define_insn ""): Add %^ prefixes. Add se_ alternatives. (*cmphi_logical_vle2): Merge with... (define_insn ""): ...this. Rename to *cmphi_logical_powerpc. (*andsi3_vle): Remove unnecessary clobber. (*andsi3_internal2_mc): Add alternative with e_andi. Disable other dot-alternatives for vle. (*movsi_got_internal): Add %^ prefix. (*movsi_vle): Adjust formatting. Add cases for LR/CTR to general regs. (*movqi_vle): Add se_li case. (*cmpsi_logical_vle, *cmpsi_arithmetic_vle1): Add y/r/r case. (*neg_gtu): Add r/r/ksci8 case for VLE; disable other immediate alternative for VLE. (*return_vle): Merge into... (*return): ...this. Adjust length information. (*save_gpregs_, *save_fpregs_): Add %^ prefix. (*restore_gpregs_, *return_and_restore_gpregs): Likewise. (*return_vle_): Merge into... (*return_internal_): ...this. Adjust length information. * config/rs6000/rs6000.md (define_insn ""): Add operand number. (abs2_isel, nabs2_isel): Add alternatives for VLE. (*negsi2_vle): Combine with... (*neg2_internal) ...this. (*movhi_vle): Fix typo on alternative six. Adjust formatting. (*stmw,*lmw): Add %^ prefixes. * config/rs6000/rs6000.md (zero_extendqisi2_vle): Merge with unnamed insn. Add case for se_extzb and remove %X1 suffix from se_lbz insn. (extendqisi2_ppc): Add case for se_extsb. * config/rs6000/rs6000.md (isa): New attribute. (enabled): New attribute. (*cmphi_logical_vle2): New insn. (*addsi3_vle2, *movsi_vle2): Constrain operand 1 to operand 0. (andsi3_mc): Add %^ prefix. Set isa attribute. (andsi3_nomc, andsi3_internal0_nomc): Add %^ prefix. (rotlsi3_vle, rotlsi3_internal1): Merge into rotlsi3. Add special handling for TARGET_VLE. (define_insn "", lshrsi3_no_power): Add %^ prefixes. (*movsi_internal1, *movsi_internal1_single): Add %e prefix. (*movhi_internal, *movqi_internal, *movcc_vle): Likewise. (*movsf_softfloat_vle2): Likewise. (*eq, *eq_compare): Use gen_xor3. (*neg_eq): Likewise. (*leu, *leu_compare): Add case for r/r/ksci8. (*geu_compare): Likewise. * config/rs6000/rs6000.md: Add new split_insns for VLE that use VLE CR registers. Disable split_insns that use all of the CR registers for VLE. (*boolsi3_internal2_vle): New insn. (*boolsi3_internal2): Disable for VLE. (*cmpsi_logical_vle): Use vle_logical_cmpsi_operand for predicate. (*cmpsi_arithmetic_vle1): Use vle_arith_cmpsi_operand for predicate. (*cmphi_logical_vle): Use vle_reg_operand for predicate. (*cmphi_logical_vle): Use vle_arith_cmphi_operand for predicate. (*cmp_internal1): Disable for VLE. (unnamed instructions): Likewise. (*plus_eqsi_vle): New pattern. (*plus_eqsi): Disable for VLE. * config/rs6000/rs6000.md (*movsi_vle): Add an n->r move. * config/rs6000/rs6000.md (unnamed pattern): New pattern. * config/rs6000/rs6000.md (andsi3_vle3): Change matching constraint to lowest numbered operand. Update mode on the clobber. * config/rs6000/rs6000.md (unnamed instructions): Add %^ qualifier. * config/rs6000/rs6000.md (*movqi_vle): Update %X operand number on last alternative. (*movhi_vle): Likewise. * config/rs6000/rs6000.md (elf_low): Use addi without carry. * config/rs6000/rs6000.md: Temporarily disable logical splits for VLE. * config/rs6000/rs6000.md (doloop_end): Disable for VLE. * config/rs6000/rs6000.md (movsi_vle): Restore missing operands. * config/rs6000/rs6000.md (*adddi3_vle): New. (*adddi3_noppc64): Disable for VLE. (boolsi3_internal1): Likewise. * config/rs6000/rs6000.md (movsi_vle): Combine c and l constraints. (*sibcall_local32): VLE support. (unnamed peephole): Not valid for VLE. (*cbranch_vle): Tighten predicate. (*cbranch_vle2): Likewise. * config/rs6000/rs6000.md (length): Check VLE branch offsets. * config/rs6000/rs6000.md (movsi_vle): Add alternative. (movhi_vle): Handle indexed loads and stores. (movqi_vle): Likewise. * config/rs6000/rs6000.md (andsi3, xorsi3): Check for valid VLE immediates. * config/rs6000/rs6000.md (ashrsi3_vle): Add alternative. * config/rs6000/rs6000.md (cmpsi_logical_vle): Update predicate on operand 0. * config/rs6000/rs6000.md (cmpsi_logical_vle): Update constraint on operand0. Change operand numbers in output templates. * config/rs6000/rs6000.md (mulsi3): Call gen_mulsi3_vle. (mulsi3_vle): New pattern. (nop): Print "se_" prefix when appropriate. * config/rs6000/rs6000.md (*cmpsi_logical_vle): Add new alternatives. (*cmpsi_arithmetic_vle): Use the correct operands. Use (*scc_vle): New. (unnamed instruction): Print "e_suffix" when appropriate. (unnamed instruction): Likewise. (*plus_ne0si): Likewise. (*compare_plus_ne0si): Likewise. (*plus_ne0si_compare): Likewise. (*cceq_rev_compare): Likewise. (unnamed_instruction): Disable for VLE. * config/rs6000/rs6000.md (movsi_update_stack_vle): Use constraint r. * config/rs6000/rs6000.md (movsi_vle): Use constraint K. * config/rs6000/rs6000.md (*movsi_vle): Updated. (*movhi_vle): Updated. (*movqi_vle): Updated. (*movsi_vle2): New. (*movcc_vle): Many new alternatives. (*movsf_softfloat_vle2): New pattern. (*movsi_update_vle): Rename to movsi_update1_vle. (movsi_update_vle): New. (movsi_update_stack_vle): New. * config/rs6000/rs6000.md (*andsi3_vle): Add alternative. (andsi3_vle2): Rename from *andsi3_cr0_vle and rework. (andsi3_vle3): Rework. (xorsi3_vle): New. (iorsi3_vle): New. * config/rs6000/rs6000.md (insvsi): Emit "e_" prefix if VLE. (*insvsi_internal1): Likewise. (*insvsi_internal2): Likewise. (*insvsi_internal3): Likewise. (*insvsi_internal4): Likewise. (*insvsi_internal5): Likewise. (extzvsi): Likewise. (rlwinm): Likewise. (*extzvsi_internal1): Disable for VLE. (*extzvsi_internal2): Disable for VLE. (rotlsi3): Change to define_expand. (rotlsi3_vle): New insn pattern. (rotlsi3_internal1): New insn pattern. * config/rs6660/rs6000.md (*cmp_lshrsi3_vle): New pattern. (*ashrsi3_vle): Add alternative. (*subdi3_noppc64): Print the "e_" suffix where appropriate. (*negdi2_noppc64): Likewise. (ashrdi3_no_power): Likewise. * config/rs6000.md (*addsi3_vle1): Update constraints and output templates. (*addsi3_vle2): Likewise. (*add3_internal2): Disable for VLE. (*add3_internal3): Likewise. * config/rs6000/rs6000.md (*indirect_jump): Print "se_" prefix where appropriate. (*ctr_internal1): Print "e_" prefix where appropriate. (*ctr_internal2): Likewise. (*ctr_internal5): Likewise. (*ctr_internal6): Likewise. (Unnamed trap instruction): Likewise. * config/rs6000/rs6000.md (load_toc_v4_pic_si): Print "e_" prefix where appropriate. (load_toc_v4_PIC_1): Likewise. (load_toc_v4_PIC_1b): Likewise. (load_toc_v4_PIC_2): Likewise. (elf_high): Likewise. (elf_low): Likewise. (*call_local32): Likewise. (*call_value_local32): Likewise. (*call_indirect_nonlocal_sysv): Likewise. (*call_nonlocal_sysv): Likewise. (*call_nonlocal_sysv_secure): Likewise. (*call_value_indirect_nonlocal_sysv): Likewise. (*call_value_nonlocal_sysv): Likewise. (*sibcall_value_local32): Likewise. * config/rs6000/rs6000.md (*subsi3_vle1): Add alternatives. Disable unnamed subtract pattern for VLE. (sub3): Ensure constants are appropriate for VLE subtract insns. * config/rs6000/rs6000.md (zero_extendqisi2_vle): New. (*extendhisi2_vle): New. Add %e to unnamed zero_extend pattern. * config/rs6000/rs6000.md (*one_cmpl2_vle): Use se_not in output template. * config/rs6000/rs6000.md (tablejump): Use %+ prefix. * config/rs6000/rs6000.md (*movsi_vle): Use operand 1 for se_mfctr. * config/rs6000/rs6000.md (*movcc_vle): Use cc_reg_operand as predicate. (vle_scc): Remove inadvertant checkin. (*cbranch_vle): New define_insn. (*cbranch_vle2): Likewise. * config/rs6000/rs6000.md (*andsi3_vle): Add clobbers. (*andsi3_cr0_vle): Likewise. (*andsi3_vle3): Likewise. (*movsi_update_vle): Reorder. (return): Change from define_expand to define_insn. (*return_vle): New define_insn. (*return): New define_insn. * config/rs6000/rs6000.md (*movcc_vle): Use e_mcrf. * config/rs6000/rs6000.md (negsi2_vle): Use correct mnemonic. (ashlsi3): Handle TARGET_VLE. (lshrsi3): Likewise. (ashrsi3): Likewise. (call_value_local32): Likewise. (*call_value_nonlocal_sysv): Likewise. (ashlsi3_vle): New define_insn. (lshrsi3_vle): Likewise. (ashrsi3): Likewise. (movcc_vle): Likewise. (cmpsi_logical_vle): Likewise. (cmpsi_arithmetic_vle): Likewise. (cmphi_logical_vle): Likewise. (cmphi_arithmetic_vle): Likewise. (return_vle_): Likewise. (movsi_vle): Handle the move ctr instructions. * config/rs6000/rs6000.md (insv_vle, *movsi_vle, *movhi_vle, *movqi_vle, *movsi_update_vle, *movhi_update_vle, *movqi_update_vle): New define_insns. * config/rs6000/rs6000.md (addsi3_vle2): Use operand 1 for matching constraint. Set length and type attributes. (one_cmpl2): New define_expand. (one_cmpl2_vle): New define_insn. (one_cmpl2_internal): Renamed from one_cmpl2. (subsi3_vle1): New define_insn. (subsi3_vle2): New define_insn. (negsi2_vle): New define_insn. (andsi3_vle1): New define_insn. (andsi3_vle2): New define_insn. (andsi3_vle3): New define_insn. * config/rs6000/rs6000.md (addsi3_vle1): Adjust constraints. * config/rs6000/rs6000.md (addsi3_vle1): New define_insn. (addsi3_vle2): New define_insn. * config/rs6000/rs6000.opt (mvle): Add option. * config/rs6000/sol-ci.asm: Disable for VLE. * config/rs6000/sol-cn.asm: Disable for VLE. * config/rs6000/spe.md (frob___2): Likewise. (frob_ti__8_2): Likewise. (mov_si_e500_subreg0): Likewise. (mov_si_e500_subreg0_2): Likewise. (mov_si_e500_subreg4): Likewise. (mov_si_e500_subreg4_2): Likewise. (mov_sitf_e500_subreg8): Likewise. (mov_sitf_e500_subreg8_2): Likewise. (mov_sitf_e500_subreg12): Likewise. (mov_sitf_e500_subreg12_2): Likewise. (spe_fix_trunctfsi2_internal): Likewise. (cmptfeq_gpr): Likewise. Update the condition code operand's predicate and constraint. (tsttfeq_gpr): Likewise. (cmptfgt_gpr): Likewise. (tsttfgt_gpr): Likewise. (cmptflt_gpr): Likewise. (tsttflt_gpr): Likewise. * config/rs6000/spe.md (e500_cr_ior_compare): Add %^ prefix. (*save_gpregs_spe, *restore_gpregs_spe): Likewise. (*return_and_restore_gpregs): Likewise. * config/rs6000/sync.md (*atomic_andsi): Add %^ prefix. Disable last two alternatives for VLE. (*atomic_anddi) Add %+ prefix and %- suffix. (*sync_subshort_internal): Likewise. (*sync_boolcshort_internal): Likewise. (*sync_andsi_internal): Likewise. Disable CR0-setting alternatives for VLE. (*sync_boolsi_internal): Add VLE-specific alternative. Disable other immediate-using alternatives. (isync): Add %+ prefix. * config/rs6000/sysv4.h (CC1_EXTRA_SPEC): Add ref & default def. * config/rs6000/sysv4.h (TEXT_SECTION_ASM_OP): Define to .section .text_vle. * config/rs6000/sysv4.h: Conditionally define TEXT_SECTION_ASM_OP. * config/rs6000/t-eabivle: New file. * config/rs6000/tramp.asm (trampoline_initial): Pad the VLE sequence to a word boundary. * config/rs6000/tramp.asm (trampoline_initial) [__VLE__]: Bring in line with the !__VLE__ variant. (__trampoline_setup) [__VLE__]: Likewise. Fix a typo in .LCF0. Use e_bl to jump to abort. Fix formatting. * config/rs6000/tramp.asm: Add VLE support * doc/invoke.texi: Document VLE processor types. 2012-09-06 James Lemke Maciej W. Rozycki gcc/testsuite/ * lib/target-supports.exp (check_effective_target_vect_int): Disable for powerpc*-*-* in the VLE mode. (check_effective_target_powerpc_altivec_ok): Likewise. (check_effective_target_vect_float): Likewise. (check_effective_target_power_vle): New procedure. 2012-09-06 James Lemke Catherine Moore libgcc/ * configure.ac: Disable SPE assembly language routines that contain invalid VLE code. * configure: Regenerate. * config/rs6000/tramp.S (trampoline_initial,__trampoline_setup): Move from gcc/config/rs6000/tramp.asm. * config/rs6000/sol-ci.S (_init,_fini): Exclude for VLE. * config/rs6000/sol-cn.S (__CTOR_END__,__DTOR_END__, _ex_text1,_ex_range1): Exclude for VLE. * config/rs6000/crrtresxfpr.S (_restfpr_*_x): Exclude for VLE. * config/rs6000/crtresxgpr.S (restgpr_*_x): Modify for VLE. * config/rs6000/eabi-ci.S (__init,__fini): Modify for VLE. * config/rs6000/crtresfpr.S (_restfpr_*): Exclude for VLE. * config/rs6000/crtsavfpr.S (_savefpr_*): Exclude for VLE. * config/rs6000/crtresgpr.S (_restgpr_*): Modify for VLE. * config/rs6000/crtsavgpr.S (_savegpr_*): Modify for VLE. * longlong.h: Disable assembly versions for VLE.