Version: 1.0
AT91 SAM7 SCC I2S Or DSP mode
The goal of this
demonstration project is to demonstrate how to use the AT91 ARM-Based Software
Package.
This project runs a
configuration test to AT91SAM7S SSC peripheral and his corresponding Evaluation
Kit, the AT91SAM7S-EK.
//=============================================================================
//
IS2 mode Timing chronogram
//=============================================================================
// _ _ _
// TK
__| |_| |_| |_---------------------------------
// ____
_____________
// TF
|___________________________|
|
// ____ ___ ___ ___
___ ___
___
// TD
____|___|___|___|-----------|___|___|------|___|
//
n n-1
0 n 0
//
|
|
// Data | DATA_OUT_L
|DATA_OUT_R
//
DSP mode
#define AT91C_I2S_MASTER_TX_SETTING(nb_bit_by_slot,
nb_slot_by_frame)( +\
AT91C_SSC_CKS_DIV +\
AT91C_SSC_CKO_CONTINOUS +\
AT91C_SSC_CKG_NONE
+\
AT91C_SSC_START_FALL_RF +\
((1<<16) & AT91C_SSC_STTDLY) +\
((((nb_bit_by_slot*nb_slot_by_frame)/2)-1) <<24))
//* Configuration to set in the SSC Transmit Frame
Mode Register
//* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
//* nb_slot_by_frame : number of channels
#define AT91C_I2S_TX_FRAME_SETTING(nb_bit_by_slot,
nb_slot_by_frame)( +\
(nb_bit_by_slot-1) +\
AT91C_SSC_MSBF +\
(((nb_slot_by_frame-1)<<8) & AT91C_SSC_DATNB) +\
(((nb_bit_by_slot-1)<<16) & AT91C_SSC_FSLEN) +\
AT91C_SSC_FSOS_NEGATIVE)
//=============================================================================
//
DSP mode Timing chronogram
//=============================================================================
// _ _ _
// TK
_| |_| |_| |_---------------------------------
// ___
___
// TF
___|
|__________________________________| |
// _______ ___ ___
___ ___
___
// TD
_______|___|___|-----------|___|___|------|___|
//
n n-1
0 n 0
//
|
|
// Data | DATA_OUT_L
|DATA_OUT_R
//* Configuration to set in the SSC Transmit Clock
Mode Register
//* Parameters :
nb_bit_by_slot : 8, 16 or 32 bits
//* nb_slot_by_frame : number of
channels
#define AT91C_DSP_MASTER_TX_SETTING(nb_bit_by_slot,
nb_slot_by_frame)( +\
(unsigned
int)AT91C_SSC_CKS_DIV +\
(unsigned int)AT91C_SSC_CKO_CONTINOUS +\
(unsigned int)AT91C_SSC_START_FALL_RF +\
(unsigned int)((((nb_bit_by_slot*nb_slot_by_frame)/2)-1)<<24))
//* Configuration to set in the SSC Transmit Frame
Mode Register
//* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
//* nb_slot_by_frame : number of channels
#define AT91C_DSP_TX_FRAME_SETTING(nb_bit_by_slot,
nb_slot_by_frame)( +\
(nb_bit_by_slot-1) +\
AT91C_SSC_MSBF +\
(((nb_slot_by_frame-1)<<8) & AT91C_SSC_DATNB) +\
AT91C_SSC_FSOS_POSITIVE)