| Signal | Symbol | PIO controller | Description |
|---|---|---|---|
| A24 | (AT91C_PC22_A24 ) | PIOC Periph: A Bit: 22 | |
| NCS3_NANDCS | (AT91C_PC15_NCS3_NANDCS) | PIOC Periph: B Bit: 15 | |
| D10 | (AT91C_PC10_D10 ) | PIOC Periph: A Bit: 10 | |
| D11 | (AT91C_PC11_D11 ) | PIOC Periph: A Bit: 11 | |
| D12 | (AT91C_PC12_D12 ) | PIOC Periph: A Bit: 12 | |
| D13 | (AT91C_PC13_D13 ) | PIOC Periph: A Bit: 13 | |
| D14 | (AT91C_PC14_D14 ) | PIOC Periph: A Bit: 14 | |
| D15 | (AT91C_PC15_D15 ) | PIOC Periph: A Bit: 15 | |
| D16 | (AT91C_PB18_D16 ) | PIOB Periph: B Bit: 18 | |
| D17 | (AT91C_PB19_D17 ) | PIOB Periph: B Bit: 19 | |
| D18 | (AT91C_PB20_D18 ) | PIOB Periph: B Bit: 20 | |
| D19 | (AT91C_PB21_D19 ) | PIOB Periph: B Bit: 21 | |
| A1_NBS2 | (AT91C_PA1_A1_NBS2 ) | PIOA Periph: B Bit: 1 | |
| A1_NBS2 | (AT91C_PB1_A1_NBS2 ) | PIOB Periph: B Bit: 1 | |
| NCS2_CFCS1 | (AT91C_PA20_NCS2_CFCS1) | PIOA Periph: B Bit: 20 | |
| A16_BA0 | (AT91C_PB16_A16_BA0 ) | PIOB Periph: B Bit: 16 | |
| A16_BA0 | (AT91C_PA16_A16_BA0 ) | PIOA Periph: B Bit: 16 | |
| SDCKE | (AT91C_PA25_SDCKE ) | PIOA Periph: B Bit: 25 | |
| NBS3_CFIOW | (AT91C_PA18_NBS3_CFIOW) | PIOA Periph: B Bit: 18 | |
| A0_NBS0 | (AT91C_PA0_A0_NBS0 ) | PIOA Periph: B Bit: 0 | |
| A0_NBS0 | (AT91C_PB0_A0_NBS0 ) | PIOB Periph: B Bit: 0 | |
| D20 | (AT91C_PB22_D20 ) | PIOB Periph: B Bit: 22 | |
| D21 | (AT91C_PB23_D21 ) | PIOB Periph: B Bit: 23 | |
| D22 | (AT91C_PB24_D22 ) | PIOB Periph: B Bit: 24 | |
| D23 | (AT91C_PB25_D23 ) | PIOB Periph: B Bit: 25 | |
| D24 | (AT91C_PB26_D24 ) | PIOB Periph: B Bit: 26 | |
| D25 | (AT91C_PB27_D25 ) | PIOB Periph: B Bit: 27 | |
| D26 | (AT91C_PB28_D26 ) | PIOB Periph: B Bit: 28 | |
| NCS5_CFCE1 | (AT91C_PA22_NCS5_CFCE1) | PIOA Periph: B Bit: 22 | |
| D27 | (AT91C_PB29_D27 ) | PIOB Periph: B Bit: 29 | |
| D28 | (AT91C_PB30_D28 ) | PIOB Periph: B Bit: 30 | |
| D29 | (AT91C_PB31_D29 ) | PIOB Periph: B Bit: 31 | |
| RAS | (AT91C_PA29_RAS ) | PIOA Periph: B Bit: 29 | |
| SDWE | (AT91C_PA27_SDWE ) | PIOA Periph: B Bit: 27 | |
| D0 | (AT91C_PC0_D0 ) | PIOC Periph: A Bit: 0 | |
| D1 | (AT91C_PC1_D1 ) | PIOC Periph: A Bit: 1 | |
| D2 | (AT91C_PC2_D2 ) | PIOC Periph: A Bit: 2 | |
| D3 | (AT91C_PC3_D3 ) | PIOC Periph: A Bit: 3 | |
| D4 | (AT91C_PC4_D4 ) | PIOC Periph: A Bit: 4 | |
| D5 | (AT91C_PC5_D5 ) | PIOC Periph: A Bit: 5 | |
| D6 | (AT91C_PC6_D6 ) | PIOC Periph: A Bit: 6 | |
| D7 | (AT91C_PC7_D7 ) | PIOC Periph: A Bit: 7 | |
| NCS1_SDCS | (AT91C_PA26_NCS1_SDCS) | PIOA Periph: B Bit: 26 | |
| D8 | (AT91C_PC8_D8 ) | PIOC Periph: A Bit: 8 | |
| D9 | (AT91C_PC9_D9 ) | PIOC Periph: A Bit: 9 | |
| D30 | (AT91C_PA30_D30 ) | PIOA Periph: B Bit: 30 | |
| D31 | (AT91C_PA31_D31 ) | PIOA Periph: B Bit: 31 | |
| SDA10 | (AT91C_PA24_SDA10 ) | PIOA Periph: B Bit: 24 | |
| NCS6_CFCE2 | (AT91C_PA21_NCS6_CFCE2) | PIOA Periph: B Bit: 21 | |
| NRD_CFOE | (AT91C_PC22_NRD_CFOE) | PIOC Periph: B Bit: 22 | |
| NWAIT | (AT91C_PC16_NWAIT ) | PIOC Periph: B Bit: 16 | |
| A2 | (AT91C_PA2_A2 ) | PIOA Periph: B Bit: 2 | |
| A2 | (AT91C_PB2_A2 ) | PIOB Periph: B Bit: 2 | |
| A3 | (AT91C_PA3_A3 ) | PIOA Periph: B Bit: 3 | |
| A3 | (AT91C_PB3_A3 ) | PIOB Periph: B Bit: 3 | |
| A4 | (AT91C_PA4_A4 ) | PIOA Periph: B Bit: 4 | |
| A4 | (AT91C_PB4_A4 ) | PIOB Periph: B Bit: 4 | |
| A10 | (AT91C_PA10_A10 ) | PIOA Periph: B Bit: 10 | |
| A10 | (AT91C_PB10_A10 ) | PIOB Periph: B Bit: 10 | |
| A5 | (AT91C_PA5_A5 ) | PIOA Periph: B Bit: 5 | |
| A5 | (AT91C_PB5_A5 ) | PIOB Periph: B Bit: 5 | |
| A11 | (AT91C_PB11_A11 ) | PIOB Periph: B Bit: 11 | |
| A11 | (AT91C_PA11_A11 ) | PIOA Periph: B Bit: 11 | |
| A6 | (AT91C_PA6_A6 ) | PIOA Periph: B Bit: 6 | |
| A6 | (AT91C_PB6_A6 ) | PIOB Periph: B Bit: 6 | |
| A12 | (AT91C_PB12_A12 ) | PIOB Periph: B Bit: 12 | |
| A12 | (AT91C_PA12_A12 ) | PIOA Periph: B Bit: 12 | |
| A7 | (AT91C_PA7_A7 ) | PIOA Periph: B Bit: 7 | |
| A7 | (AT91C_PB7_A7 ) | PIOB Periph: B Bit: 7 | |
| A13 | (AT91C_PB13_A13 ) | PIOB Periph: B Bit: 13 | |
| A13 | (AT91C_PA13_A13 ) | PIOA Periph: B Bit: 13 | |
| A8 | (AT91C_PA8_A8 ) | PIOA Periph: B Bit: 8 | |
| A8 | (AT91C_PB8_A8 ) | PIOB Periph: B Bit: 8 | |
| A14 | (AT91C_PB14_A14 ) | PIOB Periph: B Bit: 14 | |
| A14 | (AT91C_PA14_A14 ) | PIOA Periph: B Bit: 14 | |
| A9 | (AT91C_PA9_A9 ) | PIOA Periph: B Bit: 9 | |
| A9 | (AT91C_PB9_A9 ) | PIOB Periph: B Bit: 9 | |
| NCS0 | (AT91C_PC23_NCS0 ) | PIOC Periph: B Bit: 23 | |
| A15 | (AT91C_PB15_A15 ) | PIOB Periph: B Bit: 15 | |
| A15 | (AT91C_PA15_A15 ) | PIOA Periph: B Bit: 15 | |
| NWR0_NWE_CFWE | (AT91C_PC21_NWR0_NWE_CFWE) | PIOC Periph: B Bit: 21 | |
| NCS4_CFCS0 | (AT91C_PA19_NCS4_CFCS0) | PIOA Periph: B Bit: 19 | |
| A18 | (AT91C_PC16_A18 ) | PIOC Periph: A Bit: 16 | |
| A17_BA1 | (AT91C_PB17_A17_BA1 ) | PIOB Periph: B Bit: 17 | |
| A17_BA1 | (AT91C_PA17_A17_BA1 ) | PIOA Periph: B Bit: 17 | |
| A19 | (AT91C_PC17_A19 ) | PIOC Periph: A Bit: 17 | |
| CAS | (AT91C_PA28_CAS ) | PIOA Periph: B Bit: 28 | |
| NCS7 | (AT91C_PC20_NCS7 ) | PIOC Periph: B Bit: 20 | |
| A25_CFRNW | (AT91C_PC23_A25_CFRNW) | PIOC Periph: A Bit: 23 | |
| NWR1_NBS1_CFIOR_NUB | (AT91C_PA23_NWR1_NBS1_CFIOR_NUB) | PIOA Periph: B Bit: 23 | |
| NANDOE | (AT91C_PC17_NANDOE ) | PIOC Periph: B Bit: 17 | |
| A20 | (AT91C_PC18_A20 ) | PIOC Periph: A Bit: 18 | |
| A21 | (AT91C_PC19_A21 ) | PIOC Periph: A Bit: 19 | |
| NANDWE | (AT91C_PC18_NANDWE ) | PIOC Periph: B Bit: 18 | |
| A22 | (AT91C_PC20_A22 ) | PIOC Periph: A Bit: 20 | |
| A23 | (AT91C_PC21_A23 ) | PIOC Periph: A Bit: 21 |
| Function | Description |
|---|---|
| AT91F_EBI_CfgPIO | Configure PIO controllers to drive EBI signals |
| Offset | Field | Description |
|---|---|---|
| 0x0 | EBI_CSA | EBI Chip Select Assignment Register |
| Offset | Name | Description | |||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | EBI_CS1A AT91C_EBI_CS1A | Chip Select 1 Assignment 0 = Chip Select 1 is assigned to the Static Memory Controller.n1 = Chip Select 1 is assigned to the SDRAM Controller.
| |||||||||
| 2 | EBI_CS2A AT91C_EBI_CS2A | Chip Select 2 Assignment 0 = Chip Select 2 is assigned to the Static Memory Controller and NCS2, NCS5 and NCS6 behave as defined by the SMC.n1 = Chip Select 2 is assigned to the Static Memory Controller and the CompactFlash Logic (second slot) is actived. Accesing the address space reserved to NCS5 and NCS6 may lead to an unpedictable outcome
| |||||||||
| 3 | EBI_CS3A AT91C_EBI_CS3A | Chip Select 3 Assignment 0 = Chip Select 3 is only assigned to the Static Memory Controller and NCS3 behaves as defined by the SMC2.n1 = Chip Select 3 is assigned to the Static Memory Controller and the NAND Flash Logic is activated.
| |||||||||
| 4 | EBI_CS4A AT91C_EBI_CS4A | Chip Select 4 Assignment Chip Select 4 is assigned to the Static Memory Controller and NCS2, NCS5 and NCS6 behave as defined by the SMC.n1 = Chip Select 4 is assigned to the Static Memory Controller and the CompactFlash Logic (first slot) is actived. Accesing the address space reserved to NCS5 and NCS6 may lead to an unpedictable outcome
| |||||||||
| 16 | EBI_NWPC AT91C_EBI_NWPC | NWait Pin Configuration 0 = The NWAIT device pin is not connected to the External Wait Request input of the Staitc Memory Controller ,this multiplexe pin can be used as a PIO 1 =The NWAIT device pin is connected to the External Wait Request input of the Staitc Memory Controller.
|