Memory Controller Interface Peripheral

MC (AT91S_MC) 0xFFFFFF00 (AT91C_BASE_MC)
Periph ID AICSymbolDescription
1 (AT91C_ID_SYS)System Peripheral

FunctionDescription
AT91F_MC_CfgPMCEnable Peripheral clock in PMC for MC


MC Software API (AT91S_MC)

OffsetFieldDescription
0x0MC_RCRMC Remap Control Register
0x4MC_ASRMC Abort Status Register
0x8MC_AASRMC Abort Address Status Register
0x10MC_PUIA[16] (MC_PUIA)MC Protection Unit Area
0x50MC_PUPMC Protection Unit Peripherals
0x54MC_PUERMC Protection Unit Enable Register
0x60MC0_FMR (MC_FMR)MC Flash Mode Register
0x64MC0_FCR (MC_FCR)MC Flash Command Register
0x68MC0_FSR (MC_FSR)MC Flash Status Register
0x6CMC0_VR (EFC_VR)MC Flash Version Register
0x70MC1_FMR (MC_FMR)MC Flash Mode Register
0x74MC1_FCR (MC_FCR)MC Flash Command Register
0x78MC1_FSR (MC_FSR)MC Flash Status Register
0x7CMC1_VR (EFC_VR)MC Flash Version Register

FunctionDescription
AT91F_MC_EFC0_PerformCmdPerform EFC Command
AT91F_MC_EFC0_GetModeRegReturn MC EFC Mode Regsiter
AT91F_MC_EFC1_CfgModeRegConfigure the EFC Mode Register of the MC controller
AT91F_MC_EFC0_IsInterruptMaskedTest if EFC MC Interrupt is Masked
AT91F_MC_EFC1_GetStatusReturn MC EFC Status
AT91F_MC_EFC0_CfgModeRegConfigure the EFC Mode Register of the MC controller
AT91F_MC_EFC1_IsInterruptMaskedTest if EFC MC Interrupt is Masked
AT91F_MC_EFC1_IsInterruptSetTest if EFC MC Interrupt is Set
AT91F_MC_EFC1_GetModeRegReturn MC EFC Mode Regsiter
AT91F_MC_EFC_ComputeFMCNReturn MC EFC Mode Regsiter
AT91F_MC_EFC0_IsInterruptSetTest if EFC MC Interrupt is Set
AT91F_MC_EFC1_PerformCmdPerform EFC Command
AT91F_MC_RemapMake Remap
AT91F_MC_EFC0_GetStatusReturn MC EFC Status

MC Register Description

MC: AT91_REG MC_RCR MC Remap Control Register

OffsetNameDescription
0MC_RCB
AT91C_MC_RCB
Remap Command Bit
0: No effect.
1: This Command Bit acts on a toggle basis: writing a 1 alternatively cancels and restores the remapping of the page zero memory devices.

MC: AT91_REG MC_ASR MC Abort Status Register

OffsetNameDescription
0MC_UNDADD
AT91C_MC_UNDADD
Undefined Addess Abort Status
0: The last abort is not due to the access of an undefined address in the address space.
1: The last abort is due to the access of an undefined address in the address space.
1MC_MISADD
AT91C_MC_MISADD
Misaligned Addess Abort Status
0: During the last aborted access, the address was not unaligned.
1: During the last aborted access, the address was unaligned.
2MC_MPU
AT91C_MC_MPU
Memory protection Unit Abort Status
0: The last abort is not due to the MPU.
1: The last abort is due to the MPU.
9..8MC_ABTSZ
AT91C_MC_ABTSZ
Abort Size Status
This field gives the size of the aborted access of the current master.
ValueLabelDescription
0MC_ABTSZ_BYTE
AT91C_MC_ABTSZ_BYTE

Byte
1MC_ABTSZ_HWORD
AT91C_MC_ABTSZ_HWORD

Half-word
2MC_ABTSZ_WORD
AT91C_MC_ABTSZ_WORD

Word
11..10MC_ABTTYP
AT91C_MC_ABTTYP
Abort Type Status
This field gives the type of the aborted access of the current master.
ValueLabelDescription
0MC_ABTTYP_DATAR
AT91C_MC_ABTTYP_DATAR

Data Read
1MC_ABTTYP_DATAW
AT91C_MC_ABTTYP_DATAW

Data Write
2MC_ABTTYP_FETCH
AT91C_MC_ABTTYP_FETCH

Code Fetch
16MC_MST0
AT91C_MC_MST0
Master 0 Abort Source
0: The last abort was not due to the Master 0.
1: The last abort was due to the Master 0.
17MC_MST1
AT91C_MC_MST1
Master 1 Abort Source
0: The last abort was not due to the Master 1.
1: The last abort was due to the Master 1.
24MC_SVMST0
AT91C_MC_SVMST0
Saved Master 0 Abort Source
0: No abort due to the Master 0 occurred since the last read of MC_ASR or it is notified in the bit MST0.
1: At least one abort due to the Master 0 occurred since the last read of MC_ASR.
25MC_SVMST1
AT91C_MC_SVMST1
Saved Master 1 Abort Source
0: No abort due to the Master 1 occurred since the last read of MC_ASR or it is notified in the bit MST1.
1: At least one abort due to the Master 1 occurred since the last read of MC_ASR.

MC: AT91_REG MC_AASR MC Abort Address Status Register


This register contains the address of the last aborted access

MC: AT91_REG MC_PUIA MC Protection Unit Area

OffsetNameDescription
1..0MC_PROT
AT91C_MC_PROT
Protection
The area protection mode is defined as per the following table:
ValueLabelDescription
0MC_PROT_PNAUNA
AT91C_MC_PROT_PNAUNA

Privilege: No Access, User: No Access
1MC_PROT_PRWUNA
AT91C_MC_PROT_PRWUNA

Privilege: Read/Write, User: No Access
2MC_PROT_PRWURO
AT91C_MC_PROT_PRWURO

Privilege: Read/Write, User: Read Only
3MC_PROT_PRWURW
AT91C_MC_PROT_PRWURW

Privilege: Read/Write, User: Read/Write
7..4MC_SIZE
AT91C_MC_SIZE
Internal Area Size
ValueLabelDescription
0MC_SIZE_1KB
AT91C_MC_SIZE_1KB

Area size 1KByte
1MC_SIZE_2KB
AT91C_MC_SIZE_2KB

Area size 2KByte
2MC_SIZE_4KB
AT91C_MC_SIZE_4KB

Area size 4KByte
3MC_SIZE_8KB
AT91C_MC_SIZE_8KB

Area size 8KByte
4MC_SIZE_16KB
AT91C_MC_SIZE_16KB

Area size 16KByte
5MC_SIZE_32KB
AT91C_MC_SIZE_32KB

Area size 32KByte
6MC_SIZE_64KB
AT91C_MC_SIZE_64KB

Area size 64KByte
7MC_SIZE_128KB
AT91C_MC_SIZE_128KB

Area size 128KByte
8MC_SIZE_256KB
AT91C_MC_SIZE_256KB

Area size 256KByte
9MC_SIZE_512KB
AT91C_MC_SIZE_512KB

Area size 512KByte
10MC_SIZE_1MB
AT91C_MC_SIZE_1MB

Area size 1MByte
11MC_SIZE_2MB
AT91C_MC_SIZE_2MB

Area size 2MByte
12MC_SIZE_4MB
AT91C_MC_SIZE_4MB

Area size 4MByte
13MC_SIZE_8MB
AT91C_MC_SIZE_8MB

Area size 8MByte
14MC_SIZE_16MB
AT91C_MC_SIZE_16MB

Area size 16MByte
15MC_SIZE_64MB
AT91C_MC_SIZE_64MB

Area size 64MByte
27..10MC_BA
AT91C_MC_BA
Internal Area Base Address
These bits define the Base Address of the area. Note that the Area Base Address must be aligned with respect to the size of that area.

MC: AT91_REG MC_PUP MC Protection Unit Peripherals

OffsetNameDescription
1..0MC_PROT
AT91C_MC_PROT
Protection
The area protection mode is defined as per the following table:
ValueLabelDescription
0MC_PROT_PNAUNA
AT91C_MC_PROT_PNAUNA

Privilege: No Access, User: No Access
1MC_PROT_PRWUNA
AT91C_MC_PROT_PRWUNA

Privilege: Read/Write, User: No Access
2MC_PROT_PRWURO
AT91C_MC_PROT_PRWURO

Privilege: Read/Write, User: Read Only
3MC_PROT_PRWURW
AT91C_MC_PROT_PRWURW

Privilege: Read/Write, User: Read/Write

MC: AT91_REG MC_PUER MC Protection Unit Enable Register

OffsetNameDescription
0MC_PUEB
AT91C_MC_PUEB
Protection Unit enable Bit
0: The Memory Controller Protection Unit is disabled.
1: The Memory Controller Protection Unit is enabled.

MC: AT91S_EFC MC0 Embedded Flash Controller Interface

MC: AT91S_EFC MC1 Embedded Flash Controller Interface