$regfile = "2313def.dat"
$crystal = 3690000

                          ' 74xx165
                          ' hard wire CE_N (SR pin 15) to GND
                          
sclk_sr_in alias portd.0  ' connect to CP   (SR pin 2)
lclk_sr_in alias portd.1  ' connect to PL_N (SR pin 1)
data_sr_in alias pind.2   ' connect to Q7   (SR pin 9)

config sclk_sr_in = output 
config lclk_sr_in = output
config data_sr_in = input

reset sclk_sr_in
set   lclk_sr_in

                          ' 74xx595
                          ' hard wire OE (SR pin 13) to VCC
                          
lclk_sr_out alias portb.4 ' connect to STCP (SR pin 12)
data_sr_out alias portb.5 ' connect to DS   (SR pin 14)
mr_sr_out   alias portb.6 ' connect to MR_N (SR pin 10)
sclk_sr_out alias portb.7 ' connect to SHCP (SR pin 11)

config portb = output

reset mr_sr_out
reset lclk_sr_out
reset data_sr_out
reset sclk_sr_out

set mr_sr_out  ' set master reset to high (MR is low active)

dim data_in  as byte
dim data_out as byte

do
   reset lclk_sr_in  ' latch clock low
   waitms 1
   set   lclk_sr_in  ' latch clock high
   waitms 1
   
   shiftin data_sr_in, sclk_sr_in, data_in, 1
   
   data_out = not data_in
   
   shiftout data_sr_out, sclk_sr_out, data_out, 1
   
   waitms 1
   set lclk_sr_out   ' latch clock high
   waitms 1
   reset lclk_sr_out ' latch clock low
   
   waitms 10
loop
end