*****************************************************************
* Modifiziertes Grundmodell:
* ============
*
* To improve convergence in LTSpice:
*   H&E-Sources replaced by shunted B-Sources
*   LIMIT() replaced by soft limit UpLim/DnLim
*   Series resistance added to C_PAR
*   VDR voltage calculation simplified
*
* Minor Changes:
*   Include R_SERIES within L_SERIES
*   Parameter Uliml/Ulimh replaces E_SW_L/E_SW_H
*   Upper current limit moved to B_I_SENSE
*   Linear resistance R_LIN added to suppress
*   simulation artifacts at zero crossing
*   Extended with low/high decision to support MLV-E Series model too
*
*================================================================

.SUBCKT SIOV 1 2 PARAMS: T=1 C=1pF L=1nH
+  B1=1 B2=1 B3=0 B4=0
+  B1L={B1} B2L={B2} B3L={B3} B4L={B4}
+  B1H={B1} B2H={B2} B3H={B3} B4H={B4}

.param tis=10n, Ris=10k, Cis=tis/Ris		;tau, R and C current sense
.param logRis=log10(Ris)			;match log10(i)-X with Ris
.param tvar=100p, Rvar=1, Cvar=tvar/Rvar	;tau, R and C main source, Rvar=1 calculates much faster, but
						;affects pulse current and frequency response seriously
.param Ilim=100n				;linear range current limit
.param Uliml=ui_siovh(Ilim*Ris)			;linear range voltage limit
.param Ulimsl=Uliml*10m 			;soft limit zone
.param Rlinl=Uliml/Ilim				;resulting linear resistance
.param Rlincl=Rlinl/Ris				;to calculate real linear voltage from boosted is node

.param Ulimh=ui_siovl(Ilim*Ris)			;upper range
.param Ulimsh=Ulimh*10m
.param Rlinh=Ulimh/Ilim				
.param Rlinch=Rlinh/Ris

* Circuit
L_SERIES   1   4   {L} Rser=100n
V_I_SENSE  4   5   0
B_I_SENSE  0   is  I=UpLim(I(V_I_SENSE), 10Meg, 10k) ;upper soft limit
C_I_SENSE  is  0   {Cis} Rpar={Ris}
C_PAR      4   2   {C} Rser=1m
R_LIN      5   2   {Rlinl} 			;use lower range 
B_VAR      2   5   I=T*(if(abs(I(V_I_SENSE))<=1m, b_varl(V(is)), b_varh(V(is))))/Rvar ;match source resistance
C_VAR      5   2   {Cvar} Rpar={Rvar}

* Main function, lower (<=1mA) and upper range for MLV-E Series
*   calculates linear range and the VDR curve using absolute values of i (mirrored at i0), combines both with
*   soft limits and returns the properly signed voltage
.func b_varl(i) sgn(i)*UpLim(abs(i)*Rlincl, DnLim(ui_siovl(abs(i)), Uliml, Ulimsl), Ulimsl)
.func b_varh(i) sgn(i)*UpLim(abs(i)*Rlinch, DnLim(ui_siovh(abs(i)), Ulimh, Ulimsh), Ulimsh)

* General SIOV U(I) characteristic, parameter i expected to be 10k times the actual value
*   at least there is no difference in LTspice, but the calculation
*   is probably more accurate for low currents
.func ui_siovl(i) PWR(10,
+ B1L+
+ B2L*(LOG10(i)-logRis)+
+ B3L*EXP(-LOG10(i)+logRis)+
+ B4L*EXP(LOG10(i)-logRis)
+ )

.func ui_siovh(i) PWR(10,
+ B1H+
+ B2H*(LOG10(i)-logRis)+
+ B3H*EXP(-LOG10(i)+logRis)+
+ B4H*EXP(LOG10(i)-logRis)
+ )

.ENDS