Open On-Chip Debugger 0.10.0-dev-00004-gcef2a8c-dirty (2017-08-31-14:07)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
srst_only separate srst_nogate srst_open_drain connect_assert_srst
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 950 kHz
adapter_nsrst_delay: 100
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v27 API v2 M v15 VID 0x0483 PID 0x374B
Info : using stlink api v2
Info : Target voltage: 3.248915
Info : Stlink adapter speed set to 950 kHz
Info : STM32F107VCTx.cpu: hardware has 6 breakpoints, 4 watchpoints
Info : Stlink adapter speed set to 950 kHz
adapter speed: 950 kHz
STM32F107VCTx.cpu: target state: halted
target halted due to debug-request, current mode: Thread 
xPSR: 0x01000000 pc: 0x08001674 msp: 0x20010000
Info : Stlink adapter speed set to 4000 kHz
adapter speed: 4000 kHz
** Programming Started **
auto erase enabled
Info : device id = 0x10016418
Info : flash size = 256kbytes
STM32F107VCTx.cpu: target state: halted
target halted due to breakpoint, current mode: Thread 
xPSR: 0x61000000 pc: 0x2000003a msp: 0x20010000
wrote 6144 bytes from file Debug/Lucon_V2_Master.elf in 0.328608s (18.259 KiB/s)
** Programming Finished **
** Verify Started **
STM32F107VCTx.cpu: target state: halted
target halted due to breakpoint, current mode: Thread 
xPSR: 0x61000000 pc: 0x2000002e msp: 0x20010000
verified 6004 bytes in 0.109202s (53.692 KiB/s)
** Verified OK **
** Resetting Target **
Info : Stlink adapter speed set to 950 kHz
adapter speed: 950 kHz
in procedure 'program' 
in procedure 'reset' called at file "embedded:startup.tcl", line 507
in procedure 'ocd_bouncer'