Version 4
SHEET 1 1740 680
WIRE 240 80 112 80
WIRE 464 80 240 80
WIRE -32 96 -64 96
WIRE 80 96 48 96
WIRE -64 128 -64 96
WIRE 80 128 80 96
WIRE 96 128 80 128
WIRE 256 128 192 128
WIRE 256 144 256 128
WIRE 256 208 -64 208
WIRE 464 208 464 160
WIRE 464 208 256 208
WIRE 256 224 256 208
FLAG 256 224 0
FLAG 80 96 Vbl
FLAG 240 80 Vwl
SYMBOL voltage -64 112 R0
WINDOW 0 -40 56 Left 2
WINDOW 3 -131 147 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 -123 80 Left 2
SYMATTR InstName Vbitline
SYMATTR Value PWL(0 0 10m 0 10.1m 3 10.5m 3 10.51m 0)
SYMATTR SpiceLine Rser=1k Cpar=1n
SYMBOL voltage 464 64 R0
WINDOW 0 -43 57 Left 2
WINDOW 3 -266 242 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 19 83 Left 2
SYMATTR InstName Vwordline
SYMATTR Value PWL(0 0 5m 0 5.1m 3 6m 3 6.5m 0 10.3m 0 10.31m 3 10.4m 3 10.41m 0 10.6m 0 10.61m 3 10.7m 3 10.71m 0)
SYMATTR SpiceLine Rser=1k
SYMBOL polcap 240 144 R0
WINDOW 3 34 32 Left 2
SYMATTR Value 1p
SYMATTR InstName C1
SYMATTR Description Capacitor
SYMATTR Type cap
SYMATTR SpiceLine V=16 Irms=0 Rser=11 Lser=0
SYMBOL nmos 192 80 R90
SYMATTR InstName M2
SYMATTR Value 2N7002
SYMBOL res 64 80 R90
WINDOW 0 -1 55 VBottom 2
WINDOW 3 -59 -81 VTop 2
SYMATTR InstName R1
SYMATTR Value R=if(time<10.51m, 1, 1000Meg)
TEXT -144 24 Left 2 !.tran 15m