library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.Std_logic_Unsigned.ALL;

entity Wochentagsberechnung is
	 generic( E,R,T,Z : natural :=4);
    Port ( reset : in  STD_LOGIC;
           start : in  STD_LOGIC;
           D ,M ,C ,Y : in  bit_vector (7 downto 0);
			  W : out bit_vector (7 downto 0));

end Wochentagsberechnung;

architecture Behavioral of Wochentagsberechnung is

signal M1 : bit_vector (7 downto 0);
signal D1, M2, C1 , Y1  : std_logic_vector (7 downto 0);
signal SUM ,C2 ,Y2: unsigned (7 downto 0);

begin 

process (M)
	begin 


--Umwandlung des Eingangssignales M in einen Vorberechneten Wert
--über die Formel [2,6*M-0,2] um einen Rechenschritt zu sparen 
--M wird zu M19

	case M is
		when "00000001" => M1 <= "00011111";	--Januar 	01->31
		when "00000010" => M1 <= "00011100";	--Februar 	02->28
		when "00000011" => M1 <= "00000010";	--März 		03->02
		when "00000100" => M1 <= "00000101";	--April 		04->05
		when "00000101" => M1 <= "00000111";	--Mai 		05->07
		when "00000110" => M1 <= "00001010"; 	--Juni 		06->10
		when "00000111" => M1 <= "00001100"; 	--Juli 		07->12
		when "00001000" => M1 <= "00001111";	--August 	08->15
		when "00001001" => M1 <= "00010010";	--September 09->18
		when "00001010" => M1 <= "00010100";	--Oktober 	10->20
		when "00001011" => M1 <= "00010111"; 	--November 	11->23
		when "00001100" => M1 <= "00011001";	--Dezember 	12->25
		when others => M1 <= "00000000";
		end case;

end process;

   M2 <= To_StdLogicVector(M1);
	D1 <= To_StdLogicVector(D);
	C1 <= To_StdLogicVector(C);
	Y1 <= To_StdLogicVector(Y);	
	
	
--Allgemeine Wochentagsformel nach Gauß	
	
	C2 <= unsigned(C1)*0.25;
	Y2 <= unsigned(Y1)*0.25;
	SUM <= (unsigned(D1) + unsigned(M2) + unsigned(Y1) + unsigned(Y2) + unsigned(C2) - 2 * unsigned(C1)) mod 7;
	
	
--Umwandlung des Ergebnis (SUM) in Bit
	
	W <= To_bitvector(std_logic_vector(SUM));

end Behavioral;