struct reg_rcc {
	volatile unsigned long cr;			/* 0 - clock control */
	volatile unsigned long cfgr;		/* 4 - clock config */
	volatile unsigned long cir;			/* 8 - clock interrupt */
	volatile unsigned long apb2rstr;	/* 0c - peripheral reset */
	volatile unsigned long apb1rstr;	/* 10 - peripheral reset */
	volatile unsigned long ahbenr;		/* 14 - peripheral enable */
	volatile unsigned long apb2enr;		/* 18 - peripheral enable */
	volatile unsigned long apb1enr;		/* 1c - peripheral enable */
	volatile unsigned long bdcr;		/* 20 - xx */
	volatile unsigned long csr;			/* 24 - xx */
	volatile unsigned long ahbstr;		/* 28 - xx */
};

#define RCC_BASE	(struct rcc *) 0x40021000

/* RCC_CR */
#define RCC_HSION 		(1<<0)
#define RCC_HSIRDY		(1<<1)
#define RCC_HSITRIM0    (1<<3)
#define RCC_HSITRIM1    (1<<4)
#define RCC_HSITRIM2	(1<<5)
#define RCC_HSITRIM3	(1<<6)
#define RCC_HSITRIM4	(1<<7)
#define RCC_HSICAL0		(1<<8)
#define RCC_HSICAL1		(1<<9)
#define RCC_HSICAL2		(1<<10)
#define RCC_HSICAL3		(1<<11)
#define RCC_HSICAL4		(1<<12)
#define RCC_HSICAL5		(1<<13)
#define RCC_HSICAL6		(1<<14)
#define RCC_HSICAL7		(1<<15)
#define RCC_HSEON		(1<<16)
#define RCC_HSERDY		(1<<17)
#define RCC_HSEBYP		(1<<18)
#define RCC_CSSON		(1<<19)
#define RCC_PLLON		(1<<24)
#define RCC_PLLRDY		(1<<25)
#define RCC_PLL2ON		(1<<26)
#define RCC_PLL2RDY		(1<<27)
#define RCC_PLL3ON		(1<<28)
#define RCC_PLL3RDY		(1<<29)

/* RCC_CFGR */
#define RCC_SW0			(1<<0)
#define RCC_SW1			(1<<1)
#define RCC_SWS0		(1<<2)
#define RCC_SWS1		(1<<3)
#define RCC_HPRE0		(1<<4)
#define RCC_HPRE1		(1<<5)
#define RCC_HPRE2		(1<<6)
#define RCC_HPRE3		(1<<7)
#define RCC_PPRE10		(1<<8)
#define RCC_PPRE11		(1<<9)
#define RCC_PPRE12		(1<<10)
#define RCC_PPRE20		(1<<11)
#define RCC_PPRE21		(1<<12)
#define RCC_PPRE22		(1<<13)
#define RCC_ADCPRE0		(1<<14)
#define RCC_ADCPRE1		(1<<15)
#define RCC_PLLSRC		(1<<16)
#define RCC_PLLXTPRE	(1<<17)
#define RCC_PLLMUL0		(1<<18)
#define RCC_PLLMUL1		(1<<19)
#define RCC_PLLMUL2		(1<<20)
#define RCC_PLLMUL3		(1<<21)
#define RCC_OTGFSPRE	(1<<22)
#define RCC_MCO0		(1<<24)
#define RCC_MCO1		(1<<25)
#define RCC_MCO2		(1<<26)
#define RCC_MCO3		(1<<27)

/* RCC_CIR */
#define RCC_LSIRDYF		(1<<0)
#define RCC_LSERDYF		(1<<1)
#define RCC_HSIRDYF		(1<<2)
#define RCC_HSERDYF		(1<<3)
#define RCC_PLLRDYF		(1<<4)
#define RCC_PLL2RDYF	(1<<5)
#define RCC_PLL3RDYF	(1<<6)
#define RCC_CSSF		(1<<7)
#define RCC_LSIRDYIE	(1<<8)
#define RCC_LSERDYIE	(1<<9)
#define RCC_HSIRDYIE	(1<<10)
#define RCC_HSERDYIE	(1<<11)
#define RCC_PLLRDYIE	(1<<12)
#define RCC_PLL2RDYIE	(1<<13)
#define RCC_PLL3RDYIE	(1<<14)
#define RCC_LSIRDYC		(1<<16)
#define RCC_LSERDYC		(1<<17)
#define RCC_HSIRDYC		(1<<18)
#define RCC_HSERDYC		(1<<19)
#define RCC_PLLRDYC		(1<<20)
#define RCC_PLL2RDYC	(1<<21)
#define RCC_PLL3RDYC	(1<<22)
#define RCC_CSSC		(1<<23)