Summary

 Design Name  top_level
 Fitting Status  Successful
 Software Version  J.40
 Device Used  XC9572-15-PC44
 Date   9-12-2008, 2:07PM

RESOURCES SUMMARY
Macrocells Used Pterms Used Registers Used Pins Used Function Block Inputs Used
48/72  (67%) 307/360  (86%) 28/72  (39%) 28/34  (83%) 110/144  (77%)

PIN RESOURCES
Signal Type Required Mapped
 Input  2  2
 Output  8  8
 Bidirectional  17  17
 GCK  1  1
 GTS  0  0
 GSR  0  0
 DGE  0  0
Pin Type Used Total
 I/O   24  29
 GCK/IO  3  3
 GTS/IO  0  2
 GSR/IO  1  1

GLOBAL RESOURCES
 Signal mapped onto global clock net (GCK1)  CLK
 Signal mapped onto global clock net (GCK3)  /CLK

POWER DATA
 Macrocells in high performance mode (MCHP)  48
 Macrocells in low power mode (MCLP)  0
 Total macrocells used (MC)  48