Synthesis Messages - Errors, Warnings, and Infos |
New |
WARNING Xst:2211 - "D:/XilinxISEProjects/TTD/calc.vhd" line 104:
Instantiating black box module <constants>. |
|
WARNING Xst:2211 - "D:/XilinxISEProjects/TTD/calc.vhd" line 115:
Instantiating black box module <mu1>. |
|
WARNING Xst:819 - "D:/XilinxISEProjects/TTD/calc.vhd" line 150:
One or more signals are missing in the process sensitivity list. To enable
synthesis of FPGA/CPLD hardware, XST will assume that all necessary
signals are present in the sensitivity list. Please note that the result
of the synthesis may differ from the initial design specification. The
missing signals are: <u0>, <const_doutb>, <mu1_product>,
<v0>, <a1_sum> |
|
WARNING Xst:819 - "D:/XilinxISEProjects/TTD/a1.vhd" line 39: One or
more signals are missing in the process sensitivity list. To enable
synthesis of FPGA/CPLD hardware, XST will assume that all necessary
signals are present in the sensitivity list. Please note that the result
of the synthesis may differ from the initial design specification. The
missing signals are: <a1_a>, <a1_b> |
|
WARNING Xst:647 - Input <clk> is never used. This port will be
preserved and left unconnected if it belongs to a top-level block or it
belongs to a sub-block and the hierarchy of this sub-block is
preserved. |
|
WARNING Xst:647 - Input <w> is never used. This port will be
preserved and left unconnected if it belongs to a top-level block or it
belongs to a sub-block and the hierarchy of this sub-block is
preserved. |
|
WARNING Xst:647 - Input <v0<20>> is never used. This port
will be preserved and left unconnected if it belongs to a top-level block
or it belongs to a sub-block and the hierarchy of this sub-block is
preserved. |
|
WARNING Xst:653 - Signal <const_wea<0>> is used but never
assigned. This sourceless signal will be automatically connected to value
0. |
|
WARNING Xst:646 - Signal <const_doutb<20>> is assigned but
never used. This unconnected signal will be trimmed during the
optimization process. |
|
WARNING Xst:653 - Signal <const_dina> is used but never
assigned. This sourceless signal will be automatically connected to value
000000000000000000000. |
|
WARNING Xst:653 - Signal <const_addra> is used but never
assigned. This sourceless signal will be automatically connected to value
000000. |
|
WARNING Xst:646 - Signal <a1_sum<39:6>> is assigned but
never used. This unconnected signal will be trimmed during the
optimization process. |
|
WARNING Xst:737 - Found 40-bit latch for signal <a1_a>. Latches
may be generated from incomplete case or if statements. We do not
recommend the use of latches in FPGA/CPLD designs, as they may lead to
timing problems. |
|
WARNING Xst:737 - Found 40-bit latch for signal <a1_b>. Latches
may be generated from incomplete case or if statements. We do not
recommend the use of latches in FPGA/CPLD designs, as they may lead to
timing problems. |
|
WARNING Xst:737 - Found 6-bit latch for signal <lttd>. Latches
may be generated from incomplete case or if statements. We do not
recommend the use of latches in FPGA/CPLD designs, as they may lead to
timing problems. |
|
WARNING Xst:737 - Found 1-bit latch for signal <start>. Latches
may be generated from incomplete case or if statements. We do not
recommend the use of latches in FPGA/CPLD designs, as they may lead to
timing problems. |
|
WARNING Xst:737 - Found 6-bit latch for signal <const_addrb>.
Latches may be generated from incomplete case or if statements. We do not
recommend the use of latches in FPGA/CPLD designs, as they may lead to
timing problems. |
|
INFO Xst:2371 - HDL ADVISOR - Logic functions respectively driving the
data and gate enable inputs of this latch share common terms. This
situation will potentially lead to setup/hold violations and, as a result,
to simulation problems. This situation may come from an incomplete case
statement (all selector values are not covered). You should carefully
review if it was in your intentions to describe such a latch. |
|
WARNING Xst:737 - Found 20-bit latch for signal <mu1_b>. Latches
may be generated from incomplete case or if statements. We do not
recommend the use of latches in FPGA/CPLD designs, as they may lead to
timing problems. |
|
INFO Xst:2371 - HDL ADVISOR - Logic functions respectively driving the
data and gate enable inputs of this latch share common terms. This
situation will potentially lead to setup/hold violations and, as a result,
to simulation problems. This situation may come from an incomplete case
statement (all selector values are not covered). You should carefully
review if it was in your intentions to describe such a latch. |
|
WARNING Xst:737 - Found 20-bit latch for signal <mu1_a>. Latches
may be generated from incomplete case or if statements. We do not
recommend the use of latches in FPGA/CPLD designs, as they may lead to
timing problems. |
|
INFO Xst:2371 - HDL ADVISOR - Logic functions respectively driving the
data and gate enable inputs of this latch share common terms. This
situation will potentially lead to setup/hold violations and, as a result,
to simulation problems. This situation may come from an incomplete case
statement (all selector values are not covered). You should carefully
review if it was in your intentions to describe such a latch. |
|
WARNING Xst:1426 - The value init of the FF/Latch 0 hinder the
constant cleaning in the block start. You should achieve better results by
setting this init to 1. |
|
WARNING Xst:1293 - FF/Latch <0> has a constant value of 0 in
block <2>. This FF/Latch will be trimmed during the optimization
process. |
|
WARNING Xst:1293 - FF/Latch <0> has a constant value of 0 in
block <3>. This FF/Latch will be trimmed during the optimization
process. |
|
WARNING Xst:1293 - FF/Latch <0> has a constant value of 0 in
block <4>. This FF/Latch will be trimmed during the optimization
process. |
|
WARNING Xst:1293 - FF/Latch <0> has a constant value of 0 in
block <5>. This FF/Latch will be trimmed during the optimization
process. |
|
INFO Xst:2261 - The FF/Latch <const_addrb_2> in Unit
<calc> is equivalent to the following 3 FFs/Latches, which will
be removed : <const_addrb_3> <const_addrb_4>
<const_addrb_5> |
|
WARNING Xst:1426 - The value init of the FF/Latch start hinder the
constant cleaning in the block calc. You should achieve better results
by setting this init to 1. |
|
WARNING Xst:1293 - FF/Latch <const_addrb_2> has a constant value
of 0 in block <calc>. This FF/Latch will be trimmed during the
optimization process. |
|
WARNING Xst:2677 - Node <a1_b_6> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_7> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_8> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_9> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_10> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_11> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_12> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_13> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_14> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_15> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_16> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_17> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_18> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_19> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_20> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_21> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_22> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_23> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_24> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_25> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_26> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_27> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_28> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_29> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_30> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_31> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_32> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_33> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_34> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_35> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_36> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_37> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_38> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_b_39> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_6> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_7> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_8> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_9> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_10> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_11> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_12> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_13> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_14> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_15> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_16> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_17> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_18> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_19> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_20> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_21> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_22> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_23> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_24> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_25> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_26> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_27> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_28> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_29> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_30> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_31> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_32> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_33> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_34> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_35> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_36> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_37> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_38> of sequential type is
unconnected in block <calc>. |
|
WARNING Xst:2677 - Node <a1_a_39> of sequential type is
unconnected in block <calc>. |
|
INFO Xst:2169 - HDL ADVISOR - Some clock signals were not
automatically buffered by XST with BUFG/BUFR resources. Please use the
buffer_type constraint in order to insert these buffers to the clock
signals to help prevent skew problems. |
|