Iterations:        100
Instructions:      500
Total Cycles:      164
Total uOps:        600

Dispatch Width:    4
uOps Per Cycle:    3.66
IPC:               3.05
Block RThroughput: 1.5


Instruction Info:
[1]: #uOps
[2]: Latency
[3]: RThroughput
[4]: MayLoad
[5]: MayStore
[6]: HasSideEffects (U)

[1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 1      8     0.50    *                   vmovsd	(%rdi), %xmm0
 1      8     0.50    *                   vmovsd	(%rdi), %xmm1
 1      3     0.50                        vmulsd	%xmm1, %xmm0, %xmm0
 1      1     0.50           *            vmovsd	%xmm0, (%rdi)
 2      1     0.50                  U     retq


Resources:
[0]   - ZnAGU0
[1]   - ZnAGU1
[2]   - ZnALU0
[3]   - ZnALU1
[4]   - ZnALU2
[5]   - ZnALU3
[6]   - ZnDivider
[7]   - ZnFPU0
[8]   - ZnFPU1
[9]   - ZnFPU2
[10]  - ZnFPU3
[11]  - ZnMultiplier


Resource pressure per iteration:
[0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   
1.50   1.50   0.50    -      -     0.50    -     0.50   0.50    -      -      -     

Resource pressure by instruction:
[0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   Instructions:
0.42   0.58    -      -      -      -      -      -      -      -      -      -     vmovsd	(%rdi), %xmm0
0.97   0.03    -      -      -      -      -      -      -      -      -      -     vmovsd	(%rdi), %xmm1
 -      -      -      -      -      -      -     0.50   0.50    -      -      -     vmulsd	%xmm1, %xmm0, %xmm0
0.11   0.89    -      -      -      -      -      -      -      -      -      -     vmovsd	%xmm0, (%rdi)
 -      -     0.50    -      -     0.50    -      -      -      -      -      -     retq