STPC Loader

Goal

Intended to be used as a primary loader, it:

How to use

There is one loader per STPC associated with a board (typically including the Super I/O initialization and the PCI IRQ routing table).

It has to be configured (at least to know how to run the secondary loader) and loaded on top of the flash (it handles the reset vector).

The secondary loader may be launched in real- or protected-mode. The CPU context depends on this mode:

See the Initialization sequence chapter for a complete explanation of what the loader does and the Parameters chapter to know how to configure it.

Identification

The loader contains an identification section. This section is 32-byte long, located at the end of the binary file. It can be addressed either from the ROM (FFFFFFE0h) or from the shadow copy under 1MB (000FFFE0h).

Offset Type Description Value
00h dword Signature 63707453h ('Stpc')
04h word Version 0100h (MMmm)
06h byte STPC 0=Client, 1=Consumer, 2=Industrial, 3=Consumer-S, 4=Elite, 5=Consumer-II/C4, 6=Atlas, 7=Consumer-II/C5, 8=Vega
15h 8 bytes Date MM/DD/YY

Parameters

The loader contains parameters which are intended to be:

Tracing

The loader supports 2 tracing features:

See Initialization sequence to know the post codes as well as the COM strings.

This section is 16-byte long, located at FFFFFFD0h / 000FFFD0h.

Offset Type Description Comment Default value (see note)
00h word Port for PostCode   80h
02h word Port for debug COM May be 0 to do not have COM output. 3F8h
04h word Speed for debug COM Value of the UART divisor latch registers 12 (9600 bauds)

Note: may be different depending on the board or the STPC.

Secondary loader

These parameters control the way the secondary loader has to be run:

This section is 32-byte long, located at FFFFFFB0h / 000FFFB0h.

Offset Type Description Default value
00h dword Physical address of a region to copy into RAM FFFF0000h
04h dword Physical address of the RAM destination 00010000h
08h dword Number of bytes to copy. May be 0 (no copy) 64KB - loader size
0Ch dword Physical address of the secondary loader to jump to 00010000h
10h dword Bit 0: '1' to launch the secondary loader in protected mode
All other bits: '0'
00000000h

STPC configuration

These parameters control the STPC configuration.

This section is 16-byte long, located at FFFFFFA0h / 000FFFA0h.

Offset Type Description Default value
00h byte Frame buffer size in 128KB block (max 4MB)
If 0, VGA controller is disabled
20h (4MB)
01h byte CPU configuration:
Bit 0: '1' to enable L1 cache
486 only: bit 1: '1' to enable L1 cache in write-back mode
486 only: bit 2: '1' to enable the no lock feature
All others bits: '0'
486: 07h
586: 01h
02h word Graphics/memory clock MNP register value. 0 to keep the default 00h
04h dword Memory configuration:
SDRAM controller:
   Bits 0-3: read clock delay
   Bit 4: 1=CRTC latch
   Bit 5: 1=GE latch
   Bit 6: 1=host latch
   Bit 7: 1=registered DIMM
   Bit 8: 0=8mA, 1=16mA
   Bits 16-18: CAS latency (in cycle)
   Bits 19-20: RAS precharge (in cycle)
   Bits 21-23: RAS to CAS delay (in cycle)
   Bits 24-27: RAS cycle time (in cycle)
   Bit 31: 1=Keep RAS active

FPM/EDO controller:
   Bits 0-1: bank 0
   Bits 2-3: bank 1
   Bits 4-5: bank 2
   Bits 6-7: bank 3
      00: FPM 60ns
      01: FPM 70ns
      10: EDO 60ns
      11: EDO 70ns
   Bit 8: 1=Keep RAS active
SDRAM: 887B0100h











FPM/EDO: 000001FFh

Initialization sequence

This initialization sequence is as follows:

Description BIOS Writer's Guide Parameter Post code COM string
Initialize the STPC with default values DefaultConfig   01h  
Initialize the board components (super I/O...)        
Set memory / graphics clock   Parameter   Init
Start the DRAM refresh StartRefresh      
Initialize basic I/O devices (PICs, Timer, DMAs)        
Enable flat mode EnableFlatMode   02h  
Enable gate A20 EnableGateA20      
Detect DRAM configuration DetectMemorySize   03h
F3h if no memory found
Mem
Set memory timings SetMemoryTiming Parameter    
Set frame buffer to min(requested, installed RAM - 1MB)   Parameter 04h
F4h if only 1MB of RAM installed
Fb
Copy loader code in shadow, enable its cacheability and continue execution from RAM ShadowRegion   06h Shd
Enable CPU L1 cache   Parameter 08h Opt
486 only: set CPU L1 cache in write-back mode EnableL1WriteBack Parameter    
486 only: enable CPU no lock feature EnableCpuNoLock Parameter    
Optimize cache timings        
Set ISA timings to 1WS SetIsaTimings      
Enable ISA & PCI buffering for read/write EnableIsaBuffering
EnablePciBuffering
     
If frame buffer != 0, enable VGA controller else disable it (less power consumption) EnableOnChipVga
DisableOnChipVga
Parameter    
Set the PCI IRQ routing (update the PCI devices) SetPciIrqRouting   0Bh Pci
Copy the secondary loader into RAM if requested   Parameters 0Eh Cpy
Switch to protected mode if requested   Parameter 0Fh Ldr
Launch the secondary loader   Parameter    

Update history

Release Description
1.00 First release