.nolist .include "tn2313def.inc" ; Define device ATtiny2313 .list .macro WriteSram ; (register, const) ldi XL, low(SRAM_START) ldi XH, high(SRAM_START) ldi rmp, 0 j0: cpi rmp, @1 breq j1 st X+, @0 inc rmp rjmp j0 j1: ldi XL, low(SRAM_START) ldi XH, high(SRAM_START) .endmacro .macro LongJump ; (rstate, const ,label) cpi @0, @1 brne j0 rjmp @2 j0: .endmacro .macro LoadMidiByteX ; (b0=2, b1=1),register movw YL, XL ;wenn negativ, dann in subrout rein sbiw YL, @0 cpi YL, SRAM_START brpl j1 rcall subrout j1: ;lade aus sramstelle ld @1, Y .endmacro .macro CompSetEQ ; (rcomp, const, rstate, stateconst) cpi @0, @1 brne j0 ldi @2, @3 j0: .endmacro .macro CompSetNEQ ; (rcomp, const, rstate, stateconst) cpi @0, @1 breq j0 ldi @2, @3 j0: .endmacro .macro CompSetREQ ; (rcomp, rcomp2, rstate, stateconst) cp @0, @1 brne j0 ldi @2, @3 j0: .endmacro .macro CompSetRNEQ ; (rcomp, rcomp2, rstate, stateconst) cp @0, @1 breq j0 ldi @2, @3 j0: .endmacro ; ***Konstanten*** .equ F_CPU = 10000000 .equ F_ICR = 256 .equ PWM = F_CPU/F_ICR .equ BAUD = 31250 .equ BRC = (F_CPU/16/BAUD)-1 .equ MAXBUF = 40 ; ***Defs*** .def rsreg = r15 .def rmp = r16 .def rpkl2 = r17 .def rudr = r18 .def rpkh2 = r19 .def rstate = r20 .def rmp2 = r21 .def rpkl = r22 .def rpkh = r23 .def rbuf = r24 .def rflag = r25 .def rZero = r0 .def rbufmax = r1 .def rp1l = r3 .def rp1h = r4 .def rp2l = r5 .def rp2h = r6 .def rp3l = r7 .def rp3h = r8 .def rp4l = r9 .def rp4h = r10 .def rkey1 = r11 .def rkey2 = r12 .def rkey3 = r13 ; ***SRAM*** .dseg .org SRAM_START .cseg .org 000000 ;Vectorinit rjmp Main ; Reset vector reti ; INT0 reti ; INT1 reti ; ICP1 reti ; OC1A reti ; OVF1 ersatz! ; rjmp time ; OVF1 reti ; OVF0 rjmp uartrx_isr ; URXC reti ; UDRE reti ; UTXC reti ; ACI reti ; PCI reti ; OC1B reti ; OC0A reti ; OC0B reti ; USI_START reti ; USI_OVF reti ; ERDY reti ; WDT ;ISRs here uartrx_isr: in rsreg, SREG cp rbufmax, XL cpc rZero, XH breq clrX uartrx_isr2: in rudr, UDR st X+, rudr out SREG, rsreg reti clrX: ldi XL, LOW(SRAM_START) ldi XH, HIGH(SRAM_START) rjmp uartrx_isr2 ;uartrx_clr: ; in rudr, UDR ; clr rudr2 ; clr rudr3 ; out SREG, rsreg ; reti ;Grade obsolet, bei Timerinterrupt ;time: ;Daten aus dem Flash holen ; lpm rmp, Z+ ; ;OCR1A schreiben, erst H, dann L ; out OCR1AH, r2 ; out OCR1AL, rmp ; reti ;Main prog Main: ;init Stack pointer ldi rmp,LOW(RAMEND) out SPL,rmp ;init SRAM pointer ;ldi XL, LOW(SRAM_START) ;ldi XH, HIGH(SRAM_START) WriteSram rZero, 50 ;init Zero register ldi rmp, 0 mov rZero, rmp ;init Buffer fuer uart ldi rmp, LOW(SRAM_START)+MAXBUF mov rbufmax, rmp ;DDB init sbi DDRB, DDB3 ;UART RX init ldi rmp, HIGH(BRC) out UBRRH, rmp ldi rmp, LOW(BRC) out UBRRL, rmp ldi rmp, (1< 5 mal lsr mov rmp, rp1h lsr rmp ;lsr rmp ;lsr rmp ;lsr rmp ;lsr rmp ;Position der Daten auf der LUT ldi ZH, HIGH(daten*2) ldi ZL, LOW(daten*2) add ZL, rmp adc ZH, rZero ; Lade Daten aus Lookup table lpm rmp, Z ;2. Phasenakkumulation add rp2l, rpkl2 adc rp2h, rpkh2 mov rmp2, rp2h lsr rmp2 ;lsr rmp2 ;lsr rmp2 ;lsr rmp2 ;lsr rmp2 ldi ZH, HIGH(daten*2) ldi ZL, LOW(daten*2) add ZL, rmp2 adc ZH, rZero lpm rmp2, Z ;Die 2 Phasen addieren add rmp, rmp2 ;OCR1A schreiben, erst H, dann L ;Interrupts ausmachen vorher cli out OCR1AH, rZero out OCR1AL, rmp sei ;Endlicher Automat ; T_T ; |o o| ; |_-_| ; |=[:::]=| ; ]=' [___] '=[ ; /+|_|+\ ; |x| |x| ; cpi rstate, 0 breq s0 cpi rstate, 1 breq s1 cpi rstate, 2 breq s2 cpi rstate, 3 breq s3 cpi rstate, 4 breq s4 ;breq kann nur 7 bit Spruenge!? LongJump rstate, 5, s5 LongJump rstate, 6, s6 LongJump rstate, 7, s7 LongJump rstate, 8, s8 LongJump rstate, 9, s9 rjmp loop2 ;Keyaus state s0: ;Poll for keyon ;2 = Byte0 vom Midi (On/Off) ;1 = Byte1 vom Midi (Taste) LoadMidiByteX 3, rmp CompSetEQ rmp, 0x90, rstate, 1 ;else... rjmp keyoff ;Zwischenstate ;um playkey zu laden s1: ;lade Taste1 aus sram LoadMidiByteX 2, rbuf ld rkey1, Y ldi rstate, 2 rjmp playkey ;Eine Taste spielt state, was nun? s2: ;lade Taste1 aus sram laden LoadMidiByteX 2,rmp CompSetREQ rmp, rkey1, rstate, 3 CompSetRNEQ rmp, rkey1, rstate, 4 rjmp loop2 ;Moeglicherweise wurde ;eine Taste losgelassen state s3: ldi rstate, 2 LoadMidiByteX 3, rmp CompSetEQ rmp, 0x80, rstate, 0 rjmp loop2 ;Moeglicherweise wurde eine ;weitere Taste gedrueckt s4: ldi rstate, 2 LoadMidiByteX 3, rmp CompSetEQ rmp, 0x90, rstate, 5 rjmp loop2 ;Zwichenstate um die 2. Taste abzuspielen s5: LoadMidiByteX 2, rbuf ;adiw Y, 1 ;ld rbuf, Y ld rkey2, Y ldi rstate, 6 rjmp playkey2 ;2 Tasten spielen, was nun? s6: LoadMidiByteX 2, rmp CompSetREQ rmp, rkey2, rstate, 7 CompSetREQ rmp, rkey1, rstate, 8 CompSetRNEQ rmp, rkey2, rstate, 9 rjmp loop2 ;die aktuellere der beiden Tasten wurde losgelassen s7: ldi rstate, 6 LoadMidiByteX 3, rmp CompSetEQ rmp, 0x80, rstate, 2 rjmp key2off ;die alte Taste wurde losgelassen ;funktioniert nicht zuverlaessig s8: ldi rstate, 6 LoadMidiByteX 3, rmp CompSetEQ rmp, 0x80, rstate, 0 ;rkey2 wird zu rkey1 ;dazu rkey2 in den sram druecken ;sbiw XL, 2 ;st X, rkey2 ;adiw XL, 2 cpse rstate, rZero rjmp loop2 rjmp key3off s9: ldi rstate, 5 rjmp loop2 loop2: ;wait for TOV1 in rmp, TIFR sbrs rmp, TOV1 rjmp loop2 ;clear TIFR out TIFR, rmp rjmp loop keyoff: ldi rpkl, 0 ldi rpkh, 0 mov rp1l, rZero mov rp1h, rZero rjmp loop2 key2off: cpi rstate, 2 brne weiter ldi rpkl2, 0 ldi rpkh2, 0 mov rp2l, rZero mov rp2h, rZero weiter: rjmp loop2 key3off: ldi rpkl2, 0 ldi rpkh2, 0 mov rp2l, rZero mov rp2h, rZero rjmp loop2 ;key3off: cpi rstate, 1 ; brne weiter2 ; ;alter key aus ; ldi rpkl, 0 ; ldi rpkh, 0 ; mov rp1l, rZero ; mov rp1h, rZero ; ;tralala, der neue Key ; sbiw XL, 3 ; ldi rmp, 0x90 ; st X+, rmp ; st X, rkey2 ; adiw XL, 2 ; ; ;rjmp playkey weiter2: rjmp loop2 playkey: ldi ZH, HIGH(keys*2) ldi ZL, LOW(keys*2) ;Welche Daten? Ein C4 ist Taste 49 bei ;einem Midikeyboard, in meiner Tabelle ;ist das aber Taste 40... aus rudr2 ;kommt direkt die Tastenzahl ;9 abziehen subi rbuf, 9 ;verdoppeln da Woerter statt bytes lsl rbuf ;nun springen zum richtigen Arraypunkt add ZL, rbuf adc ZH, rZero ;laden in phasensummanden lpm rpkl, Z+ lpm rpkh, Z rjmp loop2 playkey2: ldi ZH, high(keys*2) ldi ZL, low(keys*2) subi rbuf, 9 lsl rbuf add ZL, rbuf adc ZH, rZero lpm rpkl2, Z+ lpm rpkh2, Z rjmp loop2 subrout: cpi YL, SRAM_START-2 breq setmaxbuf1 cpi YL, SRAM_START-1 breq setmaxbuf2 rjmp loop2 ;Warnung an mich: ich hab keinen Uebertrag... ;was beim attiny2313 egal ist... setmaxbuf1: ldi YL, LOW(SRAM_START)+MAXBUF-2 ldi YH, HIGH(SRAM_START) ret setmaxbuf2: ldi YL, LOW(SRAM_START)+MAXBUF-1 ldi YH, HIGH(SRAM_START) ret ;hier mein 128bit Rechteckston zum debuggen daten: ;.db 0, 0, 0 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,0 ;.db 0, 0, 0 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,0 ;.db 0, 0, 0 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,0 ;.db 0, 0, 0 , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,0 ;.db 120, 120, 120, 120,120, 120, 120, 120,120, 120, 120, 120,120, 120, 120, 120 ;.db 120, 120, 120, 120,120, 120, 120, 120,120, 120, 120, 120,120, 120, 120, 120 ;.db 120, 120, 120, 120,120, 120, 120, 120,120, 120, 120, 120,120, 120, 120, 120 ;.db 120, 120, 120, 120,120, 120, 120, 120,120, 120, 120, 120,120, 120, 120, 120 .db 0,1,3,5, .db 8,11,15,19, .db 23,28,34,40, .db 45,52,58,64 .db 70,76,83,88, .db 94,100,105,109, .db 113,117,120,123, .db 125,127,128,128, .db 128,127,125,123, .db 120,117,113,109, .db 105,100,94,88, .db 83,76,70,64, .db 58,52,45,40, .db 34,28,23,19, .db 15,11,8,5, .db 3,1,0,0, .db 0,1,3,5, .db 8,11,15,19, .db 23,28,34,40, .db 45,52,58,64, .db 70,76,83,88, .db 94,100,105,109, .db 113,117,120,123, .db 125,127,128,128, .db 128,127,125,123, .db 120,117,113,109, .db 105,100,94,88, .db 83,76,70,64, .db 58,52,45,40, .db 34,28,23,19, .db 15,11,8,5, .db 3,1,0,0, ; Hier die Phasendelta Tabelle hz/pwm ; 88 Eintraege fuer 88 Klaviertasten keys: .dw 23,24,26,27,29,31,33,35,37,39,41,44,46,49,52,55 .dw 58,62,65,69,73,78,82,87,92,98,104,110,116,123,130,138 .dw 146,155,164,174,185,196,207,219,233,246,261,277,293,310,329,348 .dw 369,391,414,439,465,493,522,553,586,621,658,697,738,782,829,878 .dw 930,985,1044,1106,1172,1241,1315,1394,1476,1564,1657,1756,1860,1971,2088,2212 .dw 2344,2483,2631,2787,2953,3128,3314,3511