mm_master_bfm_0
altera_avalon_mm_master_bfm v20.1
|
clk_main
|
clk |
mm_master_bfm_0 |
| clk |
| clk_reset |
| clk_reset |
|
|
m0 |
uart
|
|
|
s1 |
Parameters
| AV_ADDRESS_W |
32 |
| AV_SYMBOL_W |
8 |
| AV_NUMSYMBOLS |
4 |
| AV_BURSTCOUNT_W |
3 |
| AV_READRESPONSE_W |
8 |
| AV_WRITERESPONSE_W |
8 |
| USE_READ |
1 |
| USE_WRITE |
1 |
| USE_ADDRESS |
1 |
| USE_BYTE_ENABLE |
0 |
| USE_BURSTCOUNT |
0 |
| USE_READ_DATA |
1 |
| USE_READ_DATA_VALID |
1 |
| USE_WRITE_DATA |
1 |
| USE_BEGIN_TRANSFER |
0 |
| USE_BEGIN_BURST_TRANSFER |
0 |
| USE_ARBITERLOCK |
0 |
| USE_LOCK |
0 |
| USE_DEBUGACCESS |
0 |
| USE_WAIT_REQUEST |
1 |
| USE_TRANSACTIONID |
0 |
| USE_WRITERESPONSE |
0 |
| USE_READRESPONSE |
0 |
| USE_CLKEN |
0 |
| ASSERT_HIGH_RESET |
1 |
| ASSERT_HIGH_WAITREQUEST |
1 |
| ASSERT_HIGH_READ |
1 |
| ASSERT_HIGH_WRITE |
1 |
| ASSERT_HIGH_BYTEENABLE |
1 |
| ASSERT_HIGH_READDATAVALID |
1 |
| ASSERT_HIGH_ARBITERLOCK |
1 |
| ASSERT_HIGH_LOCK |
1 |
| AV_CONSTANT_BURST_BEHAVIOR |
1 |
| AV_BURST_LINEWRAP |
0 |
| AV_BURST_BNDR_ONLY |
1 |
| AV_ALWAYS_BURST_MAX_BURST |
0 |
| AV_MAX_PENDING_READS |
0 |
| AV_MAX_PENDING_WRITES |
0 |
| AV_FIX_READ_LATENCY |
1 |
| AV_READ_WAIT_TIME |
1 |
| AV_WRITE_WAIT_TIME |
0 |
| REGISTER_WAITREQUEST |
1 |
| AV_REGISTERINCOMINGSIGNALS |
1 |
| ADDRESS_UNITS |
SYMBOLS |
| VHDL_ID |
0 |
| deviceFamily |
UNKNOWN |
| generateLegacySim |
false |
|
Software Assignments(none) |